PM3351 ELAN 1X100

DATA SHEET

PMC-970113

ISSUE 3

SINGLE PORT FAST ETHERNET SWITCH

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE

CONTENTS

FEATURES............................................................................................................ 1

BLOCK DIAGRAM ................................................................................................. 3

DESCRIPTION ...................................................................................................... 4

Introduction .................................................................................................... 5

Switch Processor ........................................................................................... 5

Multi-channel DMA Processor........................................................................ 6

Ethernet/IEEE 802.3 MAC Interface .............................................................. 6

Expansion Port............................................................................................... 6

Local Memory Controller ................................................................................ 7

Clocking and Test .......................................................................................... 7

TYPICAL SYSTEM APPLICATION........................................................................ 8

Low-cost 10/100 Mbit/s Switching Hub .......................................................... 8

PRIMARY FEATURES AND BENEFITS ............................................................... 9

Wire-speed frame switching........................................................................... 9

Combined Input- and Output-buffered switch ................................................ 9

Modular design. ............................................................................................. 9

Advanced switching features ......................................................................... 9

Spanning tree bridging capabilities .............................................................. 10

Management and monitoring support .......................................................... 10

Autoconfiguration via Local PROM/EEPROM.............................................. 10

PIN DIAGRAM ..................................................................................................... 12

208-Pin Quad Flat Pack Pin Diagram .......................................................... 12

PIN DESCRIPTION ............................................................................................. 13

Functional Grouping..................................................................................... 15

PCI Expansion Bus Interface ....................................................................... 16

MII Interface Pins ......................................................................................... 17

Local Memory Interface ............................................................................... 18

Clock Inputs and Outputs............................................................................. 19

Miscellanous Inputs and Outputs................................................................. 20

PM3351 ELAN 1X100

DATA SHEET

PMC-970113

ISSUE 3

SINGLE PORT FAST ETHERNET SWITCH

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE

DC CHARACTERISTICS ..................................................................................... 21

Absolute Maximum Ratings ......................................................................... 21

Recommended Operating Conditions .......................................................... 21

D.C. Characteristics ..................................................................................... 22

AC CHARACTERISTICS ..................................................................................... 23

PCI Bus Interface......................................................................................... 24

MII Interface ................................................................................................. 25

Memory Interface ......................................................................................... 27

15 nS SRAM AC Timing ......................................................................... 27
150 ns EEPROM/EPROM AC Timing .................................................... 28
60 ns EDO DRAM AC Timing................................................................. 29

Clocking ....................................................................................................... 31

Miscellaneous .............................................................................................. 31

FUNCTIONAL DESCRIPTION............................................................................. 32

Overview ...................................................................................................... 32

System Components.................................................................................... 32

System Block Diagram ........................................................................... 33
System Memory Map.............................................................................. 34

Device Internal Blocks ................................................................................. 37

Switch Processor .................................................................................... 37
100Mbit/s Ethernet MAC Interface ......................................................... 38

Multichannel DMA Controller ....................................................................... 43

Memory Controller ....................................................................................... 46

PCI Expansion Port...................................................................................... 47

Watchdog Timer Facility ......................................................................... 51
Device Configuration .............................................................................. 52
System Bootstrap Image ........................................................................ 54
Configuration Parameters....................................................................... 60
Self Test and Error Reporting ................................................................. 61

Data Structures ............................................................................................ 63

Switch Processor Operating Environment .............................................. 64
Packet Buffers ........................................................................................ 68
Data Descriptors ..................................................................................... 71
Transfer Rings ........................................................................................ 74
Local Port Descriptor and Port Descriptor Counters............................... 76
Expansion Port Descriptor Table ............................................................ 84
Address Hash Table ............................................................................... 86
Free Pools .............................................................................................. 94

PM3351 ELAN 1X100

DATA SHEET

PMC-970113

ISSUE 3

SINGLE PORT FAST ETHERNET SWITCH

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE

iii

Spanning Tree Support Data Structures................................................. 96
RTOS Requirements .............................................................................. 97
UDP/IP Protocol Stack Requirements .................................................... 97
SNMP Requirements .............................................................................. 97
Storage Requirements............................................................................ 97

Switching System Initialization ................................................................... 100

Frame Switching Process .......................................................................... 101

Address Learning and Aging...................................................................... 115

Local Address Learning ........................................................................ 116
Remote Learning Process .................................................................... 117
Default Hash Bucket............................................................................. 118

Buffer and Queue Management................................................................. 122

Buffer Management .............................................................................. 123
Transmit FIFO Management ................................................................ 124
Broadcast Rate Limiting ....................................................................... 125

Statistics Collection .................................................................................... 126

Messaging Protocol ................................................................................... 128

Spanning Tree Operation........................................................................... 129

RTOS Operation ........................................................................................ 129

UDP/IP Protocol Stack Operation .............................................................. 129

SNMP Operation........................................................................................ 129

Device Interface via PCI ............................................................................ 129

Frame Transfer to Non-ELAN Devices ................................................. 129
Participation in Address Learning ......................................................... 129
Participation in the Messaging Protocol................................................ 129
Accessing Variables and Statistics ....................................................... 129
Byte Ordering ....................................................................................... 129
Default Byte Ordering ........................................................................... 130
Alternate Byte Ordering ........................................................................ 131
ELAN 1x100 / ELAN 8x10 Expansion Bus Data Transfer Rates .......... 131

PCI REGISTER/MEMORY ACCESS ................................................................. 137

PCI Configuration Space ........................................................................... 137

PCI Configuration Registers ................................................................. 138

PCI Memory Space .................................................................................... 147

Local Memory Access........................................................................... 148
Device Control/Status Registers........................................................... 148
Device Configuration Registers ............................................................ 150
Device Debug Registers ....................................................................... 155
Request and Acknowledge Counter Registers ..................................... 155

Электронный компонент: PM3351-SW