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Электронный компонент: PM5366-PI

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PRELIMINARY
PM5366 TEMAP-84
DATASHEET
PMC-2010672
ISSUE 1
HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER
AND M13 MULTIPLEXER
PMC-Sierra, Inc.
105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000
PM5366
TEMAP-84
HIGH DENSITY 84/63 CHANNEL VT/TU
MAPPER AND M13 MULTIPLEXER
DATASHEET
PROPRIETARY AND CONFIDENTIAL
PRELIMINARY
ISSUE 1: APRIL 2001
PRELIMINARY
PM5366 TEMAP-84
DATASHEET
PMC-2010672
ISSUE 1
HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER
AND M13 MULTIPLEXER
PROPRIETARY AND CONFIDENTIAL
i
CONTENTS
1
FEATURES .............................................................................................. 1
2
APPLICATIONS ..................................................................................... 13
3
REFERENCES....................................................................................... 14
4
APPLICATION EXAMPLES ................................................................... 18
5
BLOCK DIAGRAM ................................................................................. 21
5.1
TOP LEVEL BLOCK DIAGRAM .................................................. 21
5.2
DS3/E3 FRAMER ONLY BLOCK DIAGRAM............................... 22
6
DESCRIPTION ...................................................................................... 23
7
PIN DIAGRAM ....................................................................................... 27
8
PIN DESCRIPTION................................................................................ 28
9
FUNCTIONAL DESCRIPTION............................................................... 61
9.1
TRANSPARENT VIRTUAL TRIBUTARIES ................................. 61
9.2
THE TRIBUTARY INDEXING ...................................................... 62
9.3
T1 PERFORMANCE MONITORING ........................................... 64
9.4
E1 PERFORMANCE MONITORING........................................... 67
9.5
T1/E1 PERFORMANCE DATA ACCUMULATION....................... 73
9.6
T1/E1 HDLC RECEIVER............................................................. 73
9.7
T1/E1 RECEIVE AND TRANSMIT DIGITAL JITTER
ATTENUATORS .......................................................................... 74
9.8
T1/E1 PSEUDO RANDOM BINARY SEQUENCE GENERATION
AND DETECTION (PRBS).......................................................... 79
9.9
DS3 FRAMER (DS3-FRMR) ....................................................... 79
9.10 DS3 BIT ORIENTED CODE DETECTION .................................. 81
PRELIMINARY
PM5366 TEMAP-84
DATASHEET
PMC-2010672
ISSUE 1
HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER
AND M13 MULTIPLEXER
PROPRIETARY AND CONFIDENTIAL
ii
9.11 DS3/E3 HDLC RECEIVER (RDLC)............................................. 82
9.12 DS3/E3 PERFORMANCE MONITOR ACCUMULATOR (DS3/E3-
PMON) ........................................................................................ 82
9.13 DS3 TRANSMITTER (DS3-TRAN).............................................. 83
9.14 DS3/E3 HDLC TRANSMITTERS ................................................ 85
9.15 DS3 PSEUDO RANDOM PATTERN GENERATION AND
DETECTION (PRGD).................................................................. 86
9.16 M23 MULTIPLEXER (MX23) ....................................................... 86
9.17 DS2 FRAMER (DS2 FRMR)........................................................ 87
9.18 M12 MULTIPLEXER (MX12) ....................................................... 89
9.19 E3 FRAMER................................................................................ 90
9.20 E3 TRANSMITTER ..................................................................... 92
9.21 E3 TRAIL TRACE BUFFER......................................................... 94
9.22 TRIBUTARY PAYLOAD PROCESSOR (VTPP) .......................... 94
9.23 RECEIVE TRIBUTARY PATH OVERHEAD PROCESSOR
(RTOP) ........................................................................................ 96
9.24 RECEIVE TRIBUTARY TRACE BUFFER (RTTB)....................... 98
9.25 RECEIVE TRIBUTARY BIT ASYNCHRONOUS DEMAPPER
(RTDM)........................................................................................ 99
9.26 RECEIVE TRIBUTARY BYTE SYNCHRONOUS DEMAPPER . 102
9.27 DS3 MAPPER DROP SIDE (D3MD) ......................................... 103
9.28 TRANSMIT TRIBUTARY PATH OVERHEAD PROCESSOR
(TTOP) ...................................................................................... 106
9.29 TRANSMIT REMOTE ALARM PROCESSOR (TRAP).............. 107
9.30 TRANSMIT TRIBUTARY BIT ASYNCHRONOUS MAPPER
(TTMP) ...................................................................................... 108
PRELIMINARY
PM5366 TEMAP-84
DATASHEET
PMC-2010672
ISSUE 1
HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER
AND M13 MULTIPLEXER
PROPRIETARY AND CONFIDENTIAL
iii
9.31 TRANSMIT TRIBUTARY BYTE SYNCHRONOUS MAPPER ... 109
9.32 DS3 MAPPER ADD SIDE (D3MA) ............................................ 109
9.33 EXTRACT SCALEABLE BANDWIDTH INTERCONNECT
(EXSBI) ...................................................................................... 111
9.34 INSERT SCALEABLE BANDWIDTH INTERCONNECT
(INSBI)........................................................................................112
9.35 FLEXIBLE BANDWIDTH PORTS ..............................................113
9.36 JTAG TEST ACCESS PORT......................................................113
9.37 MICROPROCESSOR INTERFACE ...........................................115
10
NORMAL MODE REGISTER DESCRIPTION ..................................... 138
11
TEST FEATURES DESCRIPTION ...................................................... 139
11.1 JTAG TEST PORT .................................................................... 142
12
OPERATION ........................................................................................ 149
12.1 TRIBUTARY INDEXING ............................................................ 149
12.2 CLOCK AND FRAME SYNCHRONIZATION CONSTRAINTS .. 151
12.3 DS3 FRAME FORMAT.............................................................. 154
12.4 SERVICING INTERRUPTS....................................................... 156
12.5 USING THE PERFORMANCE MONITORING FEATURES ...... 156
12.6 USING THE INTERNAL DS3 OR E3 HDLC TRANSMITTER ... 160
12.7 USING THE INTERNAL DS3 OR E3 DATA LINK RECEIVER .. 164
12.8 T1/E1 LOOPBACK MODES...................................................... 168
12.9 DS3 AND E3 LOOPBACK MODES........................................... 170
12.10 TELECOM BUS MAPPER/DEMAPPER LOOPBACK MODES. 173
12.11 SBI BUS DATA FORMATS ........................................................ 174
PRELIMINARY
PM5366 TEMAP-84
DATASHEET
PMC-2010672
ISSUE 1
HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER
AND M13 MULTIPLEXER
PROPRIETARY AND CONFIDENTIAL
iv
12.12 JTAG SUPPORT ....................................................................... 196
13
FUNCTIONAL TIMING......................................................................... 204
13.1 DS3 LINE SIDE INTERFACE TIMING ...................................... 204
13.2 DS3 AND E3 SYSTEM SIDE INTERFACE TIMING .................. 208
13.3 TELECOM DROP BUS INTERFACE TIMING........................... 212
13.4 TELECOM ADD BUS INTERFACE TIMING.............................. 215
13.5 SONET/SDH SERIAL ALARM PORT TIMING .......................... 218
13.6 SBI DROP BUS INTERFACE TIMING ...................................... 219
13.7 SBI ADD BUS INTERFACE TIMING ......................................... 220
14
ABSOLUTE MAXIMUM RATINGS ....................................................... 222
15
D.C. CHARACTERISTICS ................................................................... 223
16
MICROPROCESSOR INTERFACE TIMING CHARACTERISTICS..... 226
17
TEMAP-84 TIMING CHARACTERISTICS ........................................... 230
18
ORDERING AND THERMAL INFORMATION...................................... 252
19
MECHANICAL INFORMATION............................................................ 253