BUV47, BUV47A
NPN SILICON POWER TRANSISTORS
P R O D U C T I N F O R M A T I O N
1
AUGUST 1978 - REVISED MARCH 1997
Copyright 1997, Power Innovations Limited, UK
Information is current as of publication date. Products conform to specifications in accordance
with the terms of Power Innovations standard warranty. Production processing does not
necessarily include testing of all parameters.
q
Rugged Triple-Diffused Planar Construction
q
9 A Continuous Collector Current
q
1000 Volt Blocking Capability
SOT-93 PACKAGE
(TOP VIEW)
Pin 2 is in electrical contact with the mounting base.
MDTRAA
B
C
E
1
2
3
absolute maximum ratings
at 25C case temperature (unless otherwise noted)
NOTE
1: This value applies for t
p
5 ms, duty cycle
2%.
RATING
SYMBOL
VALUE
UNIT
Collector-emitter voltage (V
BE
= -2.5 V)
BUV47
BUV47A
V
CEX
850
1000
V
Collector-emitter voltage (R
BE
= 10
)
BUV47
BUV47A
V
CER
850
1000
V
Collector-emitter voltage (I
B
= 0)
BUV47
BUV47A
V
CEO
400
450
V
Continuous collector current
I
C
9
A
Peak collector current (see Note 1)
I
CM
15
A
Continuous base current
I
B
3
A
Peak base current
I
BM
6
A
Continuous device dissipation at (or below) 25C case temperature
P
tot
120
W
Operating junction temperature range
T
j
-65 to +150
C
Storage temperature range
T
stg
-65 to +150
C
BUV47, BUV47A
NPN SILICON POWER TRANSISTORS
2
AUGUST 1978 - REVISED MARCH 1997
P R O D U C T I N F O R M A T I O N
NOTES: 2. Inductive loop switching measurement.
3. These parameters must be measured using pulse techniques, t
p
= 300 s, duty cycle
2%.
4. These parameters must be measured using voltage-sensing contacts, separate from the current carrying contacts.
Voltage and current values shown are nominal; exact values vary slightly with transistor parameters.
electrical characteristics at 25C case temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
CEO(sus)
Collector-emitter
sustaining voltage
I
C
= 200 mA
L = 25 mH
(see Note 2)
BUV47
BUV47A
400
450
V
V
(BR)EBO
Base-emitter
breakdown voltage
I
E
= 50 mA
I
C
= 0
(see Note 3)
7
30
V
I
CES
Collector-emitter
cut-off current
V
CE
= 850 V
V
CE
= 1000 V
V
CE
= 850 V
V
CE
= 1000 V
V
BE
= 0
V
BE
= 0
V
BE
= 0
V
BE
= 0
T
C
= 125C
T
C
= 125C
BUV47
BUV47A
BUV47
BUV47A
0.15
0.15
1.5
1.5
mA
I
CER
Collector-emitter
cut-off current
V
CE
= 850 V
V
CE
= 1000 V
V
CE
= 850 V
V
CE
= 1000 V
R
BE
= 10
R
BE
= 10
R
BE
= 10
R
BE
= 10
T
C
= 125C
T
C
= 125C
BUV47
BUV47A
BUV47
BUV47A
0.4
0.4
3.0
3.0
mA
I
EBO
Emitter cut-off
current
V
EB
= 5 V
I
C
= 0
1
mA
V
CE(sat)
Collector-emitter
saturation voltage
I
B
= 1 A
I
B
= 2.5 A
I
C
= 5 A
I
C
= 8 A
(see Notes 3 and 4)
1.5
3.0
V
V
BE(sat)
Base-emitter
saturation voltage
I
B
= 1 A
I
C
= 5 A
(see Notes 3 and 4)
1.6
V
f
t
Current gain
bandwidth product
V
CE
= 10 V
I
C
= 0.5 A
f = 1 MHz
8
MHz
C
ob
Output capacitance
V
CB
= 20 V
I
C
= 0
f = 0.1 MHz
105
pF
thermal characteristics
PARAMETER
MIN
TYP
MAX
UNIT
R
JC
Junction to case thermal resistance
1
C/W
resistive-load-switching characteristics at 25C case temperature
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
t
on
Turn on time
I
C
= 5 A
V
CC
= 150 V
I
B(on)
= 1 A
(see Figures 1 and 2)
I
B(off)
= -1 A
1.0
s
t
s
Storage time
3.0
s
t
f
Fall time
0.8
s
inductive-load-switching characteristics at 25C case temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
t
sv
Voltage storage time
I
C
= 5 A
T
C
= 100C
I
B(on)
= 1 A
(see Figures 3 and 4)
V
BE(off)
= -5 V
4.0
s
t
fi
Current fall time
0.4
s
3
AUGUST 1978 - REVISED MARCH 1997
BUV47, BUV47A
NPN SILICON POWER TRANSISTORS
P R O D U C T I N F O R M A T I O N
PARAMETER MEASUREMENT INFORMATION
Figure 1. Resistive-Load Switching Test Circuit
Figure 2. Resistive-Load Switching Waveforms
tp
F
100
V
1
680
F
V1
V cc = 250 V
+25 V
BD135
47
100
120
15
82
100
BD136
680
F
TUT
T
t
p
= 20
s
Duty cycle = 1%
V
1
= 15 V, Source Impedance = 50
V
CC
0%
C
B
90%
10%
A
10%
90%
10%
90%
E
F
D
I B
IC
I
B(on)
I B(off)
0%
dI
B
dt
2 A/
s
A - B = t
d
B - C = t
r
E - F = t
f
D - E = t
s
A - C = t
on
D - F = t
off
BUV47, BUV47A
NPN SILICON POWER TRANSISTORS
4
AUGUST 1978 - REVISED MARCH 1997
P R O D U C T I N F O R M A T I O N
PARAMETER MEASUREMENT INFORMATION
Figure 3. Inductive-Load Switching Test Circuit
Figure 4. Inductive-Load Switching Waveforms
RB
(on)
V
BE(off)
Vclamp = 400 V
vcc
H
180
33
+5V
D45H11
BY205-400
BY205-400
2N2222
BY205-400
5X BY205-400
BY205-400
1 k
68
1 k
47
2N2904
D44H11
100
270
V Gen
+5V
1 k
0.02
F
TUT
1 pF
33
Adjust pw to obtain I
C
For I
C
< 6 A V
CC
= 50 V
For I
C
6 A V
CC
= 100 V
Base Current
A (90%)
I
B(on)
IB
Collector Voltage
Collector Current
D (90%)
E (10%)
F (2%)
C
B
90%
10%
V
CE
I
C(on)
A - B = t
sv
B - C = t
rv
D - E = t
fi
E - F = t
ti
B - E = t
xo
NOTES: A. Waveforms are monitored on an oscilloscope with the following characteristics: t
r
< 15 ns, R
in
> 10
, C
in
< 11.5 pF.
B. Resistors must be noninductive types.
5
AUGUST 1978 - REVISED MARCH 1997
BUV47, BUV47A
NPN SILICON POWER TRANSISTORS
P R O D U C T I N F O R M A T I O N
TYPICAL CHARACTERISTICS
Figure 5.
Figure 6.
Figure 7.
Figure 8.
TYPICAL DC CURRENT GAIN
vs
COLLECTOR CURRENT
I
C
- Collector Current - A
01
10
10
h
FE
- Typical DC Current Gain
10
10
100
TCP762AA
V
CE
= 5 V
T
C
= 125C
T
C
= 25C
T
C
= -65C
COLLECTOR-EMITTER SATURATION VOLTAGE
vs
BASE CURRENT
I
B
- Base Current - A
0
05
10
15
20
25
V
CE(sat)
- Collector-Emitter Saturation Voltage - V
0
10
20
30
40
50
TCP762AB
I
C
= 8 A
I
C
= 6 A
I
C
= 4 A
I
C
= 2 A
T
C
= 25C
COLLECTOR-EMITTER SATURATION VOLTAGE
vs
BASE CURRENT
I
B
- Base Current - A
0
05
10
15
20
25
V
CE(sat)
- Collector-Emitter Saturation Voltage - V
0
01
02
03
04
05
TCP762AK
T
C
= 100C
I
C
= 8 A
I
C
= 6 A
I
C
= 4 A
I
C
= 2 A
COLLECTOR CUT-OFF CURRENT
vs
CASE TEMPERATURE
T
C
- Case Temperature - C
-80 -60 -40 -20
0
20
40
60
80 100 120 140
I
CES
- Collector Cut-off Current - A
0001
001
01
10
10
TCP762AC
BUV47A
V
CE
= 1000 V
BUV47
V
CE
= 850 V
BUV47, BUV47A
NPN SILICON POWER TRANSISTORS
6
AUGUST 1978 - REVISED MARCH 1997
P R O D U C T I N F O R M A T I O N
MAXIMUM SAFE OPERATING REGIONS
Figure 9.
THERMAL INFORMATION
Figure 10.
MAXIMUM FORWARD-BIAS
SAFE OPERATING AREA
V
CE
- Collector-Emitter Voltage - V
10
10
100
1000
I
C
- Collector Current - A
001
0.1
10
10
100
SAP762AA
BUV47
BUV47A
t
p
= 100
s
t
p
= 1 ms
t
p
= 10 ms
DC Operation
THERMAL RESPONSE JUNCTION TO CASE
vs
POWER PULSE DURATION
t
1
- Power Pulse Duration -s
10
-5
10
-4
10
-3
10
-2
10
-1
Z
JC
/ R
JC
- Normalised Transient Thermal Impedance
0001
001
01
10
TCP762AD
t1
t2
duty cycle = t1/t2
Read time at end of t1,
T
J(max)
- T
C
= P
D(peak)
R
JC(max)
Z
JC
R
JC
( )
5%
10%
20%
50%
2%
1%
0%
7
AUGUST 1978 - REVISED MARCH 1997
BUV47, BUV47A
NPN SILICON POWER TRANSISTORS
P R O D U C T I N F O R M A T I O N
SOT-93
3-pin plastic flange-mount package
This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when operated in high humidity conditions. Leads require no additional
cleaning or processing when used in soldered assembly.
MECHANICAL DATA
SOT-93
ALL LINEAR DIMENSIONS IN MILLIMETERS
4,90
4,70
1,37
1,17
0,78
0,50
2,50 TYP.
15,2
14,7
12,2 MAX.
16,2 MAX.
18,0 TYP.
31,0 TYP.
1,30
1,10
11,1
10,8
4,1
4,0
3,95
4,15
1
2
3
NOTE A: The centre pin is in electrical contact with the mounting tab.
MDXXAW
BUV47, BUV47A
NPN SILICON POWER TRANSISTORS
8
AUGUST 1978 - REVISED MARCH 1997
P R O D U C T I N F O R M A T I O N
IMPORTANT NOTICE
Power Innovations Limited (PI) reserves the right to make changes to its products or to discontinue any
semiconductor product or service without notice, and advises its customers to verify, before placing orders, that the
information being relied on is current.
PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with PI's standard warranty. Testing and other quality control techniques are utilized to the extent PI
deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except as mandated by government requirements.
PI accepts no liability for applications assistance, customer product design, software performance, or infringement
of patents or services described herein. Nor is any license, either express or implied, granted under any patent
right, copyright, design right, or other intellectual property right of PI covering or relating to any combination,
machine, or process in which such semiconductor products or services might be or are used.
PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE
SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS.
Copyright 1997, Power Innovations Limited
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