RDC

R8032S

RDC Semiconductor Co. Version: 1.1

R8032S 8-BIT MCU IP SPECIFICATION

1. DESIGN SPECIFICATION

RISC Architecture

Synchronous Design

Static Design

Synthesizable

Silicon proved (0~66 MHz at 0.5um process)

RTL Code with verilog format

Application

-DSC,CF Card, CD ROM Controller, Pattern Recognition, LCD Moniter

Controller, USB Device Controller, Scanner Controller, MP3 Controller,
Modem Controller, Voice Recognition, ...etc.

Instruction compatible with generic 8051

256 byte scratchpad RAM interface

Two external interrupts

Memory Addressing Capability

-64K Byte external RAM & ROM

8-bit I/O port x 4 (P0~P3)

16-bit timer/counter x3

Full duplex UART x1

Data Pointer x1

Watch Dog Timer x1

Support Power Down and Idle Mode

Power Down waked up by Interrupt

2.FEATURES

RDC

R8032S

RDC Semiconductor Co. Version: 1.1

3.GENERAL DESCRIPTION

The 8032S is a high-performance 8051 family compatible micro-controller based on RISC
architecture & Pipeline design. This IP Specification of interface timing, external Data
Memory read / write timing and external Program Memory read timing are different from that
of the standard 80C52. But instruction-set is fully compatible with standard 8051 family.

4.FUNCTIONAL DESCRIPTION

Memory
The R8032S manipulates operands in four memory spaces. There are 64K-byte Program
Memory space, 64K-byte External Data Memory space, 256-byte Internal Data Memory, and
with a 16-bit Program Counter space. The Internal Data Memory address space is further
divided into the 256-byte Internal Data RAM and 128-byte Special Function Register address
space. The up 128-bytes RAM can reach by indirect addressing. Four Register Banks, 128
addressable bits, and the stack reside in the Internal Data RAM.

I/O ports
The R8032S has 8-bit I/O ports. The four ports provide 32 I/O lines to interface to the
external world. All four ports are both byte and bit addressable. Port 0 is used as a Address/
Data bus and Port 2 is used as the upper 8-bits address when external program is running or
external memory/device is accessed. Port 3 contains special control signals such as the read
and write strobes. Port 1 is used for both I/O and external interrupts.

Interrupts
In the R8032S there are six hardware resources that generate an interrupt request. The starting
addresses of the interrupt service program for each interrupt source are like standard 8052.
The external interrupt request inputs (

INT

) can be programmed for either negative

edge or low level-activated operation.

3 Timers / Counters
The R8032S has three 16-bit timers/counters that are same as the timers of the standard 8051
family. The R8032S has two additional watchdog timers for system failure monitor.

Serial I/O ports
The R8032S has 1~2 programmable, full-duplex serial I/O ports that the function is same as

RDC

R8032S

RDC Semiconductor Co. Version: 1.1

that of 8051 family and dependent on requirement.

Power Management
The R8032S default support IDLE and POWER-DOWN modes of operation. In the IDLE
mode, the CPU core is stopped operation while the peripherals continue operating. In the
POWER-DOWN mode, all the clocks are stopped. The power-down mode can be waked up
by

INT

external interrupt with level trigger. The extra power management can be

found on PMR register in SFR.

Watch Dog Timers Interrupt / Reset
The R8032S creates one programmable watchdog timers to monitor system failure. That is
maximum

2 .

RDC

R8032S

RDC Semiconductor Co. Version: 1.1

5.MEMORY ORGANIZATION

In the R8032S the memory is organized as three address spaces and the program counter.
The memory spaces shown in memory map.

16-bit Program Counter

64k-byte Program Memory address space

64k-byte External Data Memory address space

256-byte Internal Data Memory address

The 16-bit Program Counter register provides the R8032S with its 64k addressing capabilities.
The program Counter allows the user to execute calls and branches to any location within the
Program Memory space. There are no instructions that permit program execution to move
from the Program Memory space to any of the data memory spaces.

R8032S hasn't internal Program Memory, thus the EA pin should be tied low. The 64k-byte
Program Memory address space is located in the external space. The 64k-byte External Data
Memory address space is automatically accessed when the MOVX instruction is executed.
The Internal Data Memory space is subdivided into a 256-byte Internal Data RAM address
Space and a 128-byte Special Function Resister address space as shown in the SFRs Map.
The Internal Data RAM address space is 0 to 255. Four 8-Register Banks occupy locations
0 through 31. The stack can be located anywhere in the Internal Data RAM address space.
In addition, 128 bit locations of the on-chip RAM are accessible through Direct Addressing.

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