RDC
RISC DSP Controller
R8800
RDC Semiconductor Co.
Rev:1.7
Subject to change without notice
2
Contents
-----------------------------------------------------------------------------------
page
- Features
-------------------------------------------------------------------------------------------
4
- Block Diagram
---------------------------------------------------------------------------------
4
- Pin Configuration
----------------------------------------------------------------------------- 5
- PQFP and LQFP Pin-Out Table
------------------------------------------------------- 7
- Pin Description
--------------------------------------------------------------------------------- 8
- Basic Application System Block
-------------------------------------------------------13
- Oscillator Characteristics
----------------------------------------------------------------14
- Read/Write timing Diagram
------------------------------------------------------------16
- Execution Unit
---------------------------------------------------------------------------------18
=
General Register
-------------------------------------------------------------------------18
=
Segment Register
-------------------------------------------------------------------------18
=
Instruction Pointer and Status Flags Register
---------------------------------19
=
Address Generation
---------------------------------------------------------------------20
- Peripheral Control Block Register
---------------------------------------------------21
- System Clock Block
-------------------------------------------------------------------------23
- Reset
-----------------------------------------------------------------------------------------------24
- Bus Interface Unit
---------------------------------------------------------------------------26
=
Memory and I/O Interface
------------------------------------------------------------26
=
Data Bus
-------------------------------------------------------------------------------------26
=
Wait States
---------------------------------------------------------------------------------27
=
Bus Hold
------------------------------------------------------------------------------------28
- Chip Select Unit
------------------------------------------------------------------------------30
=
UCS
-----------------------------------------------------------------------------------------30
=
LCS
-----------------------------------------------------------------------------------------31
=
MCSx
--------------------------------------------------------------------------------------32
=
PCSx
----------------------------------------------------------------------------------------33
- Interrupt Controller Unit
----------------------------------------------------------------36
=
Master Mode and Slave Mode
-------------------------------------------------------36
=
Interrupt Vector, Type and Priority
-----------------------------------------------37
=
Interrupt Request
------------------------------------------------------------------------38
=
Interrupt Acknowledge
----------------------------------------------------------------38
=
Programming the Registers
-------------------------------------------------39
RDC
RISC DSP Controller
R8800
RDC Semiconductor Co.
Rev:1.7
Subject to change without notice
3
- DMA Unit
---------------------------------------------------------------------------------------52
=
DMA Operation
------------------------------------------------------------------------52
=
External Request
-----------------------------------------------------------------------57
- Timer Control Unit
--------------------------------------------------------------------------59
= Watchdog Timer
---------------------------------------------------------------------63
=
Timer/Counter Unit Output Mode
-----------------------------------------------64
- Asynchronous Serial Port
----------------------------------------------------------------65
- Synchronous Serial Port
------------------------------------------------------------------69
= Synchronous Serial Port Operation
-----------------------------------------71
- PIO Unit
------------------------------------------------------------------------------------------73
=
PIO Multi-Function Pin List Table
----------------------------------------------73
- PSRAM Control Unit
----------------------------------------------------------------------76
- Instruction Set Opcodes and Clock Cycle
----------------------------------------77
=
R8800 Execution Timings
---------------------------------------------------------81
- DC Characteristics
--------------------------------------------------------------------------82
- AC Characteristics
--------------------------------------------------------------------------84
- Package Information
-----------------------------------------------------------------------93
- Revision History
------------------------------------------------------------------------------95
RDC
RISC DSP Controller
R8800
RDC Semiconductor Co.
Rev:1.7
Subject to change without notice
4
16-Bit Microcontroller with 16-bit external data bus
Features
Five-stage pipelines
RISC architecture
Static design & Synthesizable design
Bus interface
- Multiplexed address and data bus which
is compatible with 80C186 microprocessor
- Supports nonmultiplexed address bus [A19 : A0]
- 1MByte memory address space
- 64K byte I/O space
Software is compatible with the 80C186
microprocessor
Support one Asynchronous serial channel & one
Synchronous serial channel
Supports 32 PIO pins
PSRAM (Pseudo static RAM) interface with
auto-refresh control
Three independent 16-bit timers and Timer 1 can
be programmed as a watchdog timer
The Interrupt controller with five maskable
external interrupts and one nonmaskable external
interrupt
Two independent DMA channels
Programmable chip-select logic for Memory
or I/O bus cycle decoder
Programmable wait-state generator
Support CPU ID
Block Diagram
DMA
Unit
PSRAM
Control
Unit
Chip
Select
Unit
Refresh
Control
Unit
Bus
Interface
Unit
PIO
Unit
Synchronous
Serial Interface
Timer Control
Unit
Interrupt
Control Unit
Clock and
Power
Management
Asynchro-
nous Serial
Port
Instruction
Queue (64bits)
Instruction
Decoder
Register
File
General,
Segment,
Eflag Register
ALU
(Special,
Logic,
Adder,
BSF)
Micro
ROM
EA / LA
Address
Control Signal
Execution
Unit
X1
X2
CLKOUTA
CLKOUTB
INT4
INT0
TMRIN0
TMROUT0
TMRIN1
TMROUT1
DRQ0
DRQ1
TXD
RXD
SCLK
SDEN0 SDEN1
SDATA
A19~A0
AD15~AD0
ALE
BHE/ADEN
WR
WLB
WHB
RD
VCC
GND
LCS/ONCE0
MCS3/RFSH
UCS/ONCE1
PCS5/A1
PCS6/A2
ARDY
SRDY
S2~S0
DT/R
DEN
HOLD
HLDA
S6/CLKDIV2
UZI
INT3/INTA1/IRQ
INT2/INTA0
INT1/SELECT
NMI
RST
MCS2-MCS0
PCS3-PCS0
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