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Электронный компонент: HD151TS405SS

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Regarding the change of names mentioned in the document, such as Hitachi
Electric and Hitachi XX, to Renesas Technology Corp.
The semiconductor operations of Mitsubishi Electric and Hitachi were transferred to Renesas
Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog
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Renesas Technology Home Page: http://www.renesas.com
Renesas Technology Corp.
Customer Support Dept.
April 1, 2003
To all our customers
Cautions
Keep safety first in your circuit designs!
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Remember to give due consideration to safety when making your circuit designs, with appropriate
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Notes regarding these materials
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contained therein.
HD151TS405SS
Mother Board Clock Generator
for SiS 645/645DX/648/648DX/650/651/655/660 P4 Chipset
ADE-205-689C (Z)
Rev.3
Oct. 2002
Description
The HD151TS405 is a high-performance, low-skew, low-jitter, PC motherboard Clock generator. It is
specifically designed for SiS 645/645DX/648/648DX/650/651/655/660 Pentium4 chip set.
Features
1 memory clock up to 200 MHz (DDR200/266/333/400 Support).
2 differential pairs of current mode control CPU clock.
6 PCI clocks and 2 PCI_F clocks @3.3 V, 33.3 MHz typ.
2 copies of AGP clock @3.3V, 66.6 MHz typ.
2 Zclock @3.3 V, up to 133.3 MHz.
1 copy of 48 MHz for USB @3.3 V
24 MHz / 48 MHz selectable clock @3.3 V
3 copies of 14.318 MHz reference clock @3.3 V
Power save and clock stop function.
Programmable clock output skew control function.
I
2
C
TM
serial port programming.
Spread Spectrum modulation (0.5% or 0.25%).
48pin SSOP (300 mils).
Supports 3
DDR DIMM application with clock buffer HD74CDCV851 (SSOP48pin)
Supports 2
DDR DIMM Micro-ATX application with clock buffer HD74CDCV852 (SSOP28pin)
Ordering Information
Part Name
Package Type
Package Code
Package
Abbreviation
Taping
Abbreviation (Quantity)
HD151TS405SSEL
SSOP-48 pin
SS
EL (1,000 pcs / Reel)
Note: Please consult the sales office for the above package availability.
Note:
I
2
C is a trademark of Philips Corporation.
Pentium is registered trademark of Intel Corporation
HD151TS405SS
Rev.3, Oct. 2002, page 2 of 29
Key Specifications
Supply Voltages: VDD = 3.3 V 5%
Clock cycle to cycle jitter = |250 ps|
CPU clock group Skew = 150 ps max
AGP clock group Skew = 175 ps max
PCI clock group Skew = 500 ps max
CPU(early) to PCI, AGP & ZCLK offset = 1 to 4 ns (typ. 2ns)
HD151TS405SS
Rev.3, Oct. 2002, page 3 of 29
Pin Arrangement
1
2
3
4
5
6
7
8
9
10
VDDREF
*FS0/REF0
*FS1/REF1
*FS2/REF2
GNDREF
X1
X2
GNDZ
ZCLK1
VDDZ
PCI_STP#
VDDPCI
FS3*/PCI_F0
FS4*/PCI_F1
PCI0
PCI1
GNDPCI
VDDPCI
PCI2
PCI3
PCI4
PCI5
GNDPCI
ZCLK0
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
GND48
24_48MHz/MULTISEL*
48MHz
VDDAGP
AGPCLK1
VDDA
GNDAGP
PD#/VTT_PWRGD
GNDA
CPU0C
CPU0T
GNDCPU
AGPCLK0
VDDCPU
CPU1C
CPU1T
GNDSD
VDDSD
SDCLK
VDD48
SDATA
SCLK
IREF
CPU_STP#
(Top view)
* Latch input / multi function pin.
Note:
FS0, 1, 2, 3, 4 = 120 k
Internal Pull-down.
PCI
_
STP#, MULTISEL, PD#, CPU
_
STP# = 120 k
Internal Pull-up.