Document Outline
- Cover
- Cautions
- Preface
- List of Items Revised or Added for This Version
- Contents
- Section 1 Overview
- 1.1 Overview
- 1.2 Internal Block Diagram
- 1.3 Pin Arrangement and Functions
- 1.3.1 Pin Arrangement
- 1.3.2 Pin Functions
- Section 2 CPU
- 2.1 Overview
- 2.1.2 Address Space
- 2.1.3 Register Configuration
- 2.2 Register Descriptions
- 2.2.1 General Registers
- 2.2.2 Control Registers
- 2.2.3 Initial Register Values
- 2.3 Data Formats
- 2.3.1 Data Formats in General Registers
- 2.3.2 Memory Data Formats
- 2.4 Addressing Modes
- 2.4.1 Addressing Modes
- 2.4.2 Effective Address Calculation
- 2.5 Instruction Set
- 2.5.1 Data Transfer Instructions
- 2.5.2 Arithmetic Operations
- 2.5.3 Logic Operations
- 2.5.4 Shift Operations
- 2.5.5 Bit Manipulations
- 2.5.6 Branching Instructions
- 2.5.7 System Control Instructions
- 2.5.8 Block Data Transfer Instruction
- 2.6 Basic Operational Timing
- 2.6.1 Access to On-Chip Memory (RAM, ROM)
- 2.6.2 Access to On-Chip Peripheral Modules
- 2.7 CPU States
- 2.7.1 Overview
- 2.7.2 Program Execution State
- 2.7.3 Program Halt State
- 2.7.4 Exception-Handling State
- 2.8 Memory Map
- 2.9 Application Notes
- 2.9.1 Notes on Data Access
- 2.9.2 Notes on Bit Manipulation
- 2.9.3 Notes on Use of the EEPMOV Instruction
- Section 3 Exception Handling
- 3.1 Overview
- 3.2 Reset
- 3.2.1 Overview
- 3.2.2 Reset Sequence
- 3.2.3 Interrupt Immediately after Reset
- 3.3 Interrupts
- 3.3.1 Overview
- 3.3.2 Interrupt Control Registers
- 3.3.3 External Interrupts
- 3.3.4 Internal Interrupts
- 3.3.5 Interrupt Operations
- 3.3.6 Interrupt Response Time
- 3.4 Application Notes
- 3.4.1 Notes on Stack Area Use
- 3.4.2 Notes on Rewriting Port Mode Registers
- Section 4 Clock Pulse Generators
- 4.1 Overview
- 4.1.1 Block Diagram
- 4.1.2 System Clock and Subclock
- 4.2 System Clock Generator
- 4.3 Subclock Generator
- 4.4 Prescalers
- 4.5 Note on Oscillators
- Section 5 Power-Down Modes
- 5.1 Overview
- 5.1.1 System Control Registers
- 5.2 Sleep Mode
- 5.2.1 Transition to Sleep Mode
- 5.2.2 Clearing Sleep Mode
- 5.3 Standby Mode
- 5.3.1 Transition to Standby Mode
- 5.3.2 Clearing Standby Mode
- 5.3.3 Oscillator Settling Time after Standby Mode is Cleared
- 5.3.4 Transition to Standby Mode and Port Pin States
- 5.3.5 Notes on External Input Signal Changes before/after Standby Mode
- 5.4 Watch Mode
- 5.4.1 Transition to Watch Mode
- 5.4.2 Clearing Watch Mode
- 5.4.3 Oscillator Settling Time after Watch Mode is Cleared
- 5.4.4 Notes on External Input Signal Changes before/after Watch Mode
- 5.5 Subsleep Mode
- 5.5.1 Transition to Subsleep Mode
- 5.5.2 Clearing Subsleep Mode
- 5.6 Subactive Mode
- 5.6.1 Transition to Subactive Mode
- 5.6.2 Clearing Subactive Mode
- 5.6.3 Operating Frequency in Subactive Mode
- 5.7 Active (medium-speed) Mode
- 5.7.1 Transition to Active (medium-speed) Mode
- 5.7.2 Clearing Active (medium-speed) Mode
- 5.7.3 Operating Frequency in Active (medium-speed) Mode
- 5.8 Direct Transfer
- 5.8.1 Direct Transfer Overview
- 5.8.2 Calculation of Direct Transfer Time before Transition
- 5.8.3 Notes on External Input Signal Changes before/after Direct Transition
- Section 6 ROM
- 6.1 Overview
- 6.2 Overview of Flash Memory
- 6.2.1 Features
- 6.2.2 Block Diagram
- 6.2.3 Flash Memory Operating Modes
- 6.2.4 Pin Configuration
- 6.2.5 Register Configuration
- 6.3 Flash Memory Register Descriptions
- 6.3.1 Flash Memory Control Register 1 (FLMCR1)
- 6.3.2 Flash Memory Control Register 2 (FLMCR2)
- 6.3.3 Erase Block Register (EBR)
- 6.3.4 Mode Control Register (MDCR)
- 6.3.5 System Control Register 3 (SYSCR3)
- 6.4 On-Board Programming Modes
- 6.4.1 Boot Mode
- 6.4.2 User Program Mode
- 6.5 Flash Memory Programming/Erasing
- 6.5.1 Program Mode
- 6.5.2 Program-Verify Mode
- 6.5.3 Erase Mode
- 6.5.4 Erase-Verify Mode
- 6.6 Flash Memory Protection
- 6.6.1 Hardware Protection
- 6.6.2 Software Protection
- 6.6.3 Error Protection
- 6.7 Interrupt Handling during Flash Memory Programming and Erasing
- 6.8 Flash Memory Writer Mode
- 6.8.1 Writer Mode Setting
- 6.8.2 Socket Adapter and Memory Map
- 6.8.3 Writer Mode Operation
- 6.8.4 Memory Read Mode
- 6.8.5 Auto-Program Mode
- 6.8.6 Auto-Erase Mode
- 6.8.7 Status Read Mode
- 6.8.8 Status Polling
- 6.8.9 Writer Mode Transition Time
- 6.8.10 Notes on Memory Programming
- 6.9 Flash Memory Programming and Erasing Precautions
- 6.10 Notes when Converting the F-ZTAT Application Software to the Mask-ROM Versions
- Section 7 RAM
- Section 8 I/O Ports
- 8.1 Overview
- 8.2 Port 1
- 8.2.1 Overview
- 8.2.2 Register Configuration and Description
- 8.2.3 Pin Functions
- 8.2.4 Pin States
- 8.2.5 MOS Input Pull-Up
- 8.3 Port 2
- 8.3.1 Overview
- 8.3.2 Register Configuration and Description
- 8.3.3 Pin Functions
- 8.3.4 Pin States
- 8.4 Port 3 (H8/3857 Series Only)
- 8.4.1 Overview
- 8.4.2 Register Configuration and Description
- 8.4.3 Pin Functions
- 8.4.4 Pin States
- 8.4.5 MOS Input Pull-Up
- 8.5 Port 4
- 8.5.1 Overview
- 8.5.2 Register Configuration and Description
- 8.5.3 Pin Functions
- 8.5.4 Pin States
- 8.6 Port 5
- 8.6.1 Overview
- 8.6.2 Register Configuration and Description
- 8.6.3 Pin Functions
- 8.6.4 Pin States
- 8.6.5 MOS Input Pull-Up
- 8.7 Port 9 [Chip-Internal I/O port]
- 8.7.1 Overview
- 8.7.2 Register Configuration and Description
- 8.7.3 Pin Functions
- 8.7.4 Pin States
- 8.8 Port A [Chip-Internal I/O port]
- 8.8.1 Overview
- 8.8.2 Register Configuration and Description
- 8.8.3 Pin Functions
- 8.8.4 Pin States
- 8.9 Port B
- 8.9.1 Overview
- 8.9.2 Register Configuration and Description
- Section 9 Timers
- 9.1 Overview
- 9.2 Timer A
- 9.2.1 Overview
- 9.2.2 Register Descriptions
- 9.2.3 Timer Operation
- 9.2.4 Timer A Operation States
- 9.3 Timer B
- 9.3.1 Overview
- 9.3.2 Register Descriptions
- 9.3.3 Timer Operation
- 9.3.4 Timer B Operation States
- 9.4 Timer C (H8/3857 Series Only)
- 9.4.1 Overview
- 9.4.2 Register Descriptions
- 9.4.3 Timer Operation
- 9.4.4 Timer C Operation States
- 9.5 Timer F
- 9.5.1 Overview
- 9.5.2 Register Descriptions
- 9.5.3 Interface with the CPU
- 9.5.4 Timer Operation
- 9.5.5 Application Notes
- 9.6 Watchdog Timer [H8/3857F and H8/3854F Only]
- 9.6.1 Overview
- 9.6.2 Register Descriptions
- 9.6.3 Operation
- 9.6.4 Watchdog Timer Operating Modes
- Section 10 Serial Communication Interface
- 10.1 Overview
- 10.2 SCI1 (H8/3857 Series Only)
- 10.2.1 Overview
- 10.2.2 Register Descriptions
- 10.2.3 Operation
- 10.2.4 Interrupts
- 10.2.5 Application Notes
- 10.3 SCI3
- 10.3.1 Overview
- 10.3.2 Register Descriptions
- 10.3.3 Operation
- 10.3.4 Operation in Asynchronous Mode
- 10.3.5 Operation in Synchronous Mode
- 10.3.6 Multiprocessor Communication Function
- 10.3.7 Interrupts
- 10.3.8 Application Notes
- Section 11 14-Bit PWM (H8/3857 Series Only)
- 11.1 Overview
- 11.1.1 Features
- 11.1.2 Block Diagram
- 11.1.3 Pin Configuration
- 11.1.4 Register Configuration
- 11.2 Register Descriptions
- 11.2.1 PWM Control Register (PWCR)
- 11.2.2 PWM Data Registers U and L (PWDRU, PWDRL)
- 11.3 Operation
- Section 12 A/D Converter
- 12.1 Overview
- 12.1.1 Features
- 12.1.2 Block Diagram
- 12.1.3 Pin Configuration
- 12.1.4 Register Configuration
- 12.2 Register Descriptions
- 12.2.1 A/D Result Register (ADRR)
- 12.2.2 A/D Mode Register (AMR)
- 12.2.3 A/D Start Register (ADSR)
- 12.3 Operation
- 12.3.1 A/D Conversion Operation
- 12.3.2 Start of A/D Conversion by External Trigger Input
- 12.4 Interrupts
- 12.5 Typical Use
- 12.6 Application Notes
- Section 13 Dot Matrix LCD Controller (H8/3857 Series)
- 13.1 Overview
- 13.1.1 Features
- 13.1.2 Block Diagram
- 13.1.3 Pin Configuration
- 13.1.4 Register Configuration
- 13.2 Register Descriptions
- 13.2.1 Index Register (IR)
- 13.2.2 Control Register 1 (LR0)
- 13.2.3 Control Register 2 (LR1)
- 13.2.4 Address Register (LR2)
- 13.2.5 Frame Frequency Setting Register (LR3)
- 13.2.6 Display Data Register (LR4)
- 13.2.7 Display Start Line Register (LR5)
- 13.2.8 Blink Register (LR6)
- 13.2.9 Blink Start Line Register (LR8)
- 13.2.10 Blink End Line Register (LR9)
- 13.2.11 Contrast Control Register (LRA)
- 13.3 Operation
- 13.3.1 System Overview
- 13.3.2 CPU Interface
- 13.3.3 LCD Drive Pin Functions
- 13.3.4 Display Memory Configuration and Display
- 13.3.5 Display Data Output
- 13.3.6 Register and Display Memory Access
- 13.3.7 Scroll Function
- 13.3.8 Blink Function
- 13.3.9 Module Standby Mode
- 13.3.10 Power-On and Power-Off Procedures
- 13.3.11 Power Supply Circuit
- 13.3.12 LCD Drive Power Supply Voltages
- 13.3.13 LCD Voltage Generation Circuit
- 13.3.14 Contrast Control Circuit
- 13.3.15 LCD Drive Bias Selection Circuit
- Section 14 Dot Matrix LCD Controller (H8/3854 Series)
- 14.1 Overview
- 14.1.1 Features
- 14.1.2 Block Diagram
- 14.1.3 Pin Configuration
- 14.1.4 Register Configuration
- 14.2 Register Descriptions
- 14.2.1 Index Register (IR)
- 14.2.2 Control Register 1 (LR0)
- 14.2.3 Control Register 2 (LR1)
- 14.2.4 Address Register (LR2)
- 14.2.5 Frame Frequency Setting Register (LR3)
- 14.2.6 Display Data Register (LR4)
- 14.3 Operation
- 14.3.1 System Overview
- 14.3.2 CPU Interface
- 14.3.3 LCD Drive Pin Functions
- 14.3.4 Display Memory Configuration and Display
- 14.3.5 Display Data Output
- 14.3.6 Register and Display Memory Access
- 14.3.7 Module Standby Mode
- 14.3.8 Power-On and Power-Off Procedures
- 14.3.9 Power Supply Circuit
- 14.3.10 LCD Drive Power Supply Voltages
- 14.3.11 LCD Voltage Generation Circuit
- 14.3.12 LCD Drive Bias Selection Circuit
- Section 15 Electrical Characteristics (H8/3857 Series)
- 15.1 H8/3855, H8/3856, and H8/3857 Absolute Maximum Ratings (Standard Specifications)
- 15.2 H8/3855, H8/3856, and H8/3857 Electrical Characteristics (Standard Specifications)
- 15.2.1 Power Supply Voltage and Operating Range
- 15.2.2 DC Characteristics
- 15.2.3 AC Characteristics
- 15.2.4 A/D Converter Characteristics
- 15.2.5 LCD Characteristics
- 15.2.6 Flash Memory Characteristics
- 15.3 Operation Timing
- 15.4 Output Load Circuit
- 15.5 Usage Note
- Section 16 Electrical Characteristics (H8/3854 Series)
- 16.1 H8/3852, H8/3853, and H8/3854 Absolute Maximum Ratings (Standard Specifications)
- 16.2 H8/3852, H8/3853, and H8/3854 Electrical Characteristics (Standard Specifications)
- 16.2.1 Power Supply Voltage and Operating Range
- 16.2.2 DC Characteristics
- 16.2.3 AC Characteristics
- 16.2.4 A/D Converter Characteristics
- 16.2.5 LCD Characteristics
- 16.2.6 Flash Memory Characteristics
- 16.3 Operation Timing
- 16.4 Output Load Circuit
- 16.5 Usage Note
- Appendix A CPU Instruction Set
- A.1 Instructions
- A.2 Operation Code Map
- A.3 Number of Execution States
- Appendix B Internal I/O Registers
- B.1 Register Addresses
- B.1.1 H8/3857 Series Addresses
- B.1.2 H8/3854 Series Addresses
- B.2 Register Descriptions
- Appendix C I/O Port Block Diagrams
- C.1 Block Diagram of Port 1
- C.2 Block Diagram of Port 2
- C.3 Block Diagram of Port 3 (H8/3857 Series Only)
- C.4 Block Diagram of Port 4
- C.5 Block Diagram of Port 5
- C.6 Block Diagram of Port 9
- C.7 Block Diagram of Port A
- C.8 Block Diagram of Port B
- Appendix D Port States in the Different Processing States
- Appendix E List of Product Codes
- Appendix F Package Dimensions
- Colophon
Regarding the change of names mentioned in the document, such as Hitachi
Electric and Hitachi XX, to Renesas Technology Corp.
The semiconductor operations of Mitsubishi Electric and Hitachi were transferred to Renesas
Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog
and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.)
Accordingly, although Hitachi, Hitachi, Ltd., Hitachi Semiconductors, and other Hitachi brand
names are mentioned in the document, these names have in fact all been changed to Renesas
Technology Corp. Thank you for your understanding. Except for our corporate trademark, logo and
corporate statement, no changes whatsoever have been made to the contents of the document, and
these changes do not constitute any alteration to the contents of the document itself.
Renesas Technology Home Page: http://www.renesas.com
Renesas Technology Corp.
Customer Support Dept.
April 1, 2003
To all our customers
Cautions
Keep safety first in your circuit designs!
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Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i)
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Hitachi Single-Chip Microcomputer
H8/3857 Series
H8/3857
HD6433857, HCD6433857
H8/3856
HD6433856, HCD6433856
H8/3855
HD6433855, HCD6433855
H8/3857F-ZTATTM
HD64F3857, HCD64F3857
H8/3854 Series
H8/3854
HD6433854, HCD6433854
H8/3853
HD6433853, HCD6433853
H8/3852
HD6433852, HCD6433852
H8/3854F-ZTATTM
HD64F3854, HCD64F3854
Hardware Manual
ADE-602-175A
Rev. 2.0
3/5/03
Hitachi, Ltd.
The revision list can be viewed directly by
clicking the title page.
The revision list summarizes the locations of
revisions and additions. Details should always
be checked by referring to the relevant text.
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi's or any third party's
patent, copyright, trademark, or other intellectual property rights for information contained in
this document. Hitachi bears no responsibility for problems that may arise with third party's
rights, including intellectual property rights, in connection with use of the information
contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you
have received the latest product standards or specifications before final design, purchase or
use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability.
However, contact Hitachi's sales office before using the product in an application that
demands especially high quality and reliability or where its failure or malfunction may directly
threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear
power, combustion control, transportation, traffic, safety equipment or medical equipment for
life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi
particularly for maximum rating, operating supply voltage range, heat radiation characteristics,
installation conditions and other characteristics. Hitachi bears no responsibility for failure or
damage when used beyond the guaranteed ranges. Even within the guaranteed ranges,
consider normally foreseeable failure rates or failure modes in semiconductor devices and
employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi
product does not cause bodily injury, fire or other consequential damage due to operation of
the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document
without written approval from Hitachi.
7. Contact Hitachi's sales office for any questions regarding this document or Hitachi
semiconductor products.
Preface
The H8/300L Series of single-chip microcomputers has the high-speed H8/300L CPU at its core,
with many necessary peripheral functions on-chip. The H8/300L CPU instruction set is compatible
with the H8/300 CPU.
The H8/3857 Series has the following on-chip peripheral functions required for system
configuration: a maximum 1,280-dot display LCD controller, four types of timers, a 14-bit PWM,
a 2-channel serial communication interface, and an 8-channel A/D converter.
The H8/3854 Series has the following on-chip peripheral functions required for system
configuration: a maximum 640-dot display LCD controller, three types of timers, a single-channel
serial communication interface, and a 4-channel A/D converter.
Both series can be used as embedded microcomputers in systems requiring LCD display.
The H8/3857, H8/3856, H8/3855, H8/3854, H8/3853, and H8/3852 are available in mask ROM
versions, and the H8/3857 and H8/3854 are also available in an F-ZTATTM* version which allows
programs to be written after the chip is mounted on a board.
Note: * F-ZTAT (Flexible Zero Turn-Around Time) is a trademark of Hitachi, Ltd.
This manual describes the hardware of the H8/3857 Series and H8/3854 Series. For details on the
H8/3857 Series and H8/3854 Series instruction set, refer to the H8/300L Series Programming
Manual.
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