Rev.5.00, Jan.28.2004, page 1 of 7
HD74HCT1G08
2input AND Gate
REJ03D01940500Z
(Previous ADE-205-304C (Z))
Rev.5.00
Jan.28.2004
Description
The HD74HCT1G08 is high-speed CMOS two input AND gate using silicon gate CMOS process. With
CMOS low power dissipation, it provides high-speed equivalent to LSTTL series. The internal circuit of
three stages construction with buffer provides wide noise margin and stable output.
Features
The basic gate function is lined up as Renesas uni logic series.
Supplied on emboss taping for high-speed automatic mounting.
TTL compatible input level.
Supply voltage range : 4.5 to 5.5 V
Operating temperature range : 40 to +85C
|I
OH
| = I
OL
= 2 mA (min)
Ordering Information
Part Name
Package Type
Package Code
Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74HCT1G08CME CMPAK-5 pin
CMPAK-5V
CM
E (3,000 pcs/reel)
HD74HCT1G08
Rev.5.00, Jan.28.2004, page 2 of 7
Outline and Article Indication
HD74HCT1G08
Marking
= Control code
F 2
Index band
CMPAK5
Function Table
Inputs
A
B
Output Y
L
L
L
H
L
L
L
H
L
H
H
H
H : High level
L : Low level
Pin Arrangement
(Top view)
5
4
V
CC
1
2
3
IN B
IN A
GND
OUT Y
HD74HCT1G08
Rev.5.00, Jan.28.2004, page 3 of 7
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Test Conditions
Supply voltage range
V
CC
0.5 to 7.0
V
Input voltage range
*1
V
I
0.5 to V
CC
+ 0.5
V
Output voltage range
*1, 2
V
O
0.5 to V
CC
+ 0.5
V
Output : H or L
Input clamp current
I
IK
20
mA
V
I
< 0 or V
I
> V
CC
Output clamp current
I
OK
20
mA
V
O
< 0 or V
O
>V
CC
Continuous output current
I
O
25
mA
V
O
= 0 to V
CC
Continuous current through
V
CC
or GND
I
CC
or I
GND
25
mA
Maximum power dissipation
at Ta = 25C (in still air)
*3
P
T
200
mW
Storage temperature
Tstg
65 to 150
C
Notes:
The absolute maximum ratings are values which must not individually be exceeded, and
furthermore, no two of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current
ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150C.
Recommended Operating Conditions
Item
Symbol
Min
Max
Unit
Test Conditions
Supply voltage range
V
CC
4.5
5.5
V
Input voltage range
V
I
0
5.5
V
Output voltage range
V
O
0
V
CC
V
Output current
I
OL
--
2
mA
V
CC
= 4.5 to 5.5 V
I
OH
--
2
V
CC
= 4.5 to 5.5 V
Input rise / fall time
(0.3 V to 2.7 V)
t
r
, t
f
0
500
ns
V
CC
= 4.5 to 5.5 V
Operating temperature
Ta
40
85
C
Note: Unused or floating inputs must be held high or low.
HD74HCT1G08
Rev.5.00, Jan.28.2004, page 4 of 7
Electrical Characteristics
T
a
= 25C
T
a
= 40 to 85C
Item
Symbol
V
CC
(V)
Min
Typ
Max
Min
Max
Unit Test Conditions
V
IH
4.5 to
5.5
2.0
--
--
2.0
--
Input voltage
V
IL
4.5 to
5.5
--
--
0.8
--
0.8
V
4.5
4.4
4.5
--
4.4
--
I
OH
= 20
A
V
OH
4.5
4.18
4.31
--
4.13
--
I
OH
= 2 mA
4.5
--
0.0
0.1
--
0.1
I
OL
= 20
A
Output voltage
V
OL
4.5
--
0.17
0.26
--
0.33
V
V
IN
=
V
IH
or V
IL
I
OL
= 2 mA
Input current
I
IN
5.5
--
--
0.1
--
1.0
A
V
IN
= V
CC
or GND
Operating
current
I
CC
5.5
--
--
1.0
--
10.0
A
V
IN
= V
CC
or GND
Quiescent
supply current
I
CCT
5.5
--
--
2.0
--
2.9
mA
One input V
IN
= 2.4 V,
other input V
CC
or GND
HD74HCT1G08
Rev.5.00, Jan.28.2004, page 5 of 7
Switching Characteristics
Ta = 25C
Item
Symbol Min
Typ
Max
Unit
Test Conditions
Output rise / fall time
t
TLH
t
THL
--
5
10
ns
Test circuit
t
PLH
--
7.5
12
Propagation delay time
t
PHL
--
9.5
17
ns
Test circuit
(C
L
= 15 pF, t
r
= t
f
= 6 ns, V
CC
= 5 V)
Ta = 25C
Ta = 40 to 85C
Item
Symbol
V
CC
(V)
Min
Typ
Max Min
Max
Unit Test Conditions
Output rise / fall time
t
TLH
t
THL
4.5
--
14
25
--
31
ns
Test circuit
t
PLH
4.5
--
10.0 16
--
20
Propagation delay time
t
PHL
4.5
--
16.0 27
--
31
ns
Test circuit
Input capacitance
C
IN
--
--
2.5
5
--
5
pF
Equivalent capacitance
C
PD
--
--
10
--
--
--
pF
(C
L
= 50 pF, t
r
= t
f
= 6 ns)
Note: C
PD
is equivalent capacitance inside of the IC calculated from the operating current without load (see
test circuit). The average operating current without load is calculated according to the expression
below.
I
CC
(opr) = C
PD
V
CC
f
IN
+ I
CC
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