DR3100-1

433.92 MHz

Transceiver

Module

The DR3100-1 transceiver module is ideal for short-range wireless data applications where ro-

bust operation, small size and low power consumption are required. The DR3100-1 utilizes

RFM's TR3000 amplifier-sequenced hybrid (ASH) architecture to achieve this unique blend of

characteristics. The receiver section of the TR3000 is sensitive and stable. A wide dynamic

range log detector provides robust performance in the presence of on-channel interference or

noise. Two stages of SAW filtering provide excellent receiver out-of-band rejection. The transmit-

ter includes provisions for both on-off keyed (OOK) and amplitude-shift keyed (ASK) modula-

tion. The transmitter employs SAW filtering to suppress output harmonics, facilitating compliance

with ETSI I-ETS 300 220 and similar regulations. The DR3100-1 includes the TR3000 plus all

configuration components in a ready-to-use PCB assembly, excellent for prototyping and

intermediate volume production runs.

Rating

Value

Units

Power Supply and All Input/Output Pins

-0.3 to +4.0

Non-Operating Case Temperature

-50 to +100

Soldering Temperature (10 seconds)

230

Absolute Maximum Ratings

· Designed for Short-Range Wireless Data Communications
· Supports 115.2 kbps Encoded Data Transmissions
· 3 V, Low Current Operation plus Sleep Mode
· Ready to Use OEM Module

Electrical Characteristics, 115.2 kbps Amplitude-Shift Keyed

Characteristic

Sym

Notes

Minimum

Typical

Maximum

Units

Operating Frequency

433.72

434.12

MHz

Modulation Type

OOK

Data Rate

115.2

kbps

Receiver Performance (ASK @ 115.2 kbps)

Input Current, 3 Vdc Supply

4.8

Input Signal for 10

-4

BER, 25 °C

-85

dBm

Rejection, ±30 MHz

REJ

Transmitter Performance (ASK @ 115.2 kbps)

Peak Input Current, 3 Vdc Supply

Peak Output Power

1.2

Turn On/Turn Off Time

OFF

1.1/1.1

µs

Sleep to Receive Switch Time (15 ms sleep, -76 dBm signal)

µs

Sleep Mode Current

0.75

µA

Transmit to Receive Switch Time (15 ms transmit, -76 dBm signal)

TOR

µs

Receive to Transmit Switch Time

RTO

µs

Power Supply Voltage Range

2.7

3.5

Vdc

Operating Ambient Temperature

-40

+85

Pin

Name

Description

AGC/VCC

This pin is connected directly to the transceiver AGCCAP pin, which controls the AGC reset operation. To enable

AGC operation (required for ASK transmission) an external capacitor is placed between this pin and ground. The

capacitor sets the minimum time the AGC will hold-in once it is engaged. The hold-in time is set to avoid AGC

chattering. For a given hold-in time t

AGH

, the capacitor value C

AGC

is:

AGC

= 19.1* t

AGH

, where t

AGH

is in µs and C

AGC

is in pF

For 115.2 kbps operation, a 2200 pF ±10% ceramic capacitor should be used at this pin. The value of C

AGC

given

above provides a hold-in time between t

AGH

and 2.65* t

AGH

, depending on operating voltage, temperature, etc. The

hold-in time is chosen to allow the AGC to ride through the longest run of zero bits that can occur in a received

data stream. The AGC hold-in time can be greater than the peak detector decay time, as discussed below. How-

ever, the AGC hold-in time should not be set too long, or the receiver will be slow in returning to full sensitivity

once the AGC is engaged by noise or interference. AGC operation also depends on a functioning peak detector,

as discussed below. The AGC capacitor is discharged in the transceiver power-down (sleep) mode and in the

transmit modes.

PK DET

This pin is connected directly to the transceiver PKDET pin. This pin controls the peak detector operation. An ex-

ternal capacitor between this pin and ground sets the peak detector attack and decay times, which have a fixed

1:1000 ratio. For 115.2 kbps applications, the attack time constant should be set to 0.24 µs with a 0.001 µF ca-

pacitor to ground. (This adequately matches the peak detector decay time constant of 240 µs to the time constant

of the 0.0027 µF coupling capacitor C3.) A ±10% ceramic capacitor should be used at this pin. The peak detector

is used to drive the "dB-below-peak" data slicer and the AGC release function. The AGC hold-in time can be ex-

tended beyond the peak detector decay time with the AGC capacitor, as discussed above. The peak detector ca-

pacitor is discharged in the transceiver power-down (sleep) mode and in the transmit modes. See the description

of Pin 3 below for further information.

RX BBO

This pin is connected directly to the transceiver BBOUT pin. On the circuit board, BBOUT also drives the trans-

ceiver CMPIN pin through C3, a 0.0027 µF coupling capacitor (t

BBC

= 173 µs). RX BBO can also be used to drive

an external data recovery process (DSP, etc.). The nominal output impedance of this pin is 1 K. The RX BBO sig-

nal changes about 10 mV/dB, with a peak-to-peak signal level of up to 675 mV. The signal at RX BBO is riding on

a 1.1 Vdc value that varies somewhat with supply voltage and temperature, so it should be coupled through a ca-

pacitor to an external load. A load impedance of 50 K to 500 K in parallel with no more than 10 pF is recom-

mended. Note the AGC reset function is driven by the signal applied to CMPIN through C3. When the transceiver

is in power-down (sleep) or in a transmit mode, the output impedance of this pin becomes very high, preserving

the charge on the coupling capacitor(s). The value of C3 on the circuit board has been chosen to match typical

data encoding schemes at 115.2 kbps. If C3 is modified to support different data rates and/or encoding schemes,

make the value of the peak detector capacitor about 1/3 the value of C3.

RX DATA

RX DATA is connected directly to the transceiver data output pin, RXDATA. This pin will drive a 10 pF, 500 K par-

allel load. The peak current available from this pin increases with the receiver low-pass filter cutoff frequency. In

the power-down (sleep) or transmit modes, this pin becomes high impedance. If required, a 1000 K pull-up or

pull-down resistor can be used to establish a definite logic state when this pin is high impedance (do not connect

the pull-up resistor to a supply voltage higher than 3.5 Vdc or the transceiver will be damaged). This pin must be

buffered to successfully drive low-impedance loads.

TX IN

The TX IN pin is connected to the transceiver TXMOD pin through a 4.7 K resistor on the circuit board. Additional

series resistance will often be required between the modulation source and the TX IN pin, depending on the de-

sired output power and peak modulation voltage (4.3 K typical for a peak modulation voltage of 3 volts). Saturated

output power requires about 250 µA of drive current. Peak output power P

for a 3 Vdc supply is approximately:

= 19.75*((V

TXH

0.9)/(R

+ 4.7))

, where P

is in mW, peak modulation voltage V

TXH

is in volts and

external modulation resistor R

is in kilohms

This pin must be held low in the receive and sleep modes. Please refer to section 2.9 of the ASH Transceiver De-

signer's Guide for additional information.

Pin Descriptions

GND

This is a ground pin.

GND

This is a ground pin.

LPF ADJ

This pin is the receiver low-pass filter bandwidth adjust, and is connected directly to the transceiver LPFADJ pin.

R6 on the circuit board (12 K) is connected between LPFADJ and ground will be in parallel with any external resis-

tor connected to LPF ADJ. The filter bandwidth is set by the parallel resistance of R6 and the external resistor (if

used). The equivalent resistor value can range from 12 K to 820 ohms, providing a filter 3 dB bandwidth f

LPF

from

120 kHz to 1.8 MHz. The 3 dB filter bandwidth is determined by:

LPF

= 1445/ (12*R

LPF

/(12 + R

LPF

)), where R

LPF

is in kilohms, and f

LPF

is in kHz

A ±5% resistor should be used to set the filter bandwidth. This will provide a 3 dB filter bandwidth between f

LPF

and 1.3* f

LPF

with variations in supply voltage, temperature, etc. The filter provides a three-pole, 0.05 degree

equiripple phase response. The peak drive current available from RXDATA increases in proportion to the filter

bandwidth setting. As shipped, the transceiver module is set up for nominal 115.2 kbps operation. Refer to sec-

tions 1.4.3, 2.5.1 and 2.6.1 in the ASH Transceiver Designer's Guide for additional information on data rate adjust-

ments.

VCC

This is the positive supply voltage pin for the module. The operating voltage range is 2.7 to 3.5 Vdc. It is also pos-

sible to use Pin 1 as the Vcc input. Please refer to the Pin 1 description above.

GND

This is a ground pin.

CTR1

CTR1 is connected to the CNTRL1 control pin on the transceiver. CTR1 and CTR0 select the transceiver operat-

ing modes. CTR1 and CTR0 both high place the unit in the receive mode. CTR1 and CTR0 both low place the unit

in the power-down (sleep) mode. CTR1 high and CTR0 low place the unit in the ASK transmit mode. CTR1 low

and CTR0 high place the unit in the OOK transmit mode. CTR1 is a high-impedance input (CMOS compatible).

This pin must be held at a logic level; it cannot be left unconnected. At turn on, the voltage on this pin and CTR0

should rise with VCC until VCC reaches 2.7 Vdc (receive mode). Thereafter, any mode can be selected.

CTR0

CTR0 is connected to the CNTRL0 control pin on the transceiver CTR0 is used with CTR1 to control the operating

modes of the transceiver. CTR0 is a high-impedance input (CMOS compatible). This pin must be held at a logic

level; it cannot be left unconnected. At turn on, the voltage on this pin and CTR1 should rise with VCC until VCC

reaches 2.7 Vdc (receive mode). Thereafter, any mode can be selected.

RFIO

RFIO is the RF input/output pin. A matching circuit for a 50 ohm load (antenna) is implemented on the circuit

board between this pin and the transceiver SAW filter transducer.

RF GND

This pin is the RF ground (return) to be used in conjunction with the RFIO pin. For example, when connecting the

transceiver module to an external antenna, the coaxial cable ground is connected this pin and the coaxial cable

center conductor is connected to RFIO.

D a t a I n

D a t a O u t

3 V d c

R / T

1 1 5 . 2 k b p s A p p l i c a t i o n C i r c u i t

4 . 3 K

1 0

1 1

1 2

D R 3 1 0 0 - 1

2 2 0 0 p F

0 . 0 0 1 µ F

1 3

1 4

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