Preliminary

RF Monolithics, Inc.

Phone: (972) 233-2903

Fax: (972) 387-8148

E-mail: info@rfm.com

Page 1 of 4

RFM Europe

Phone: 44 1963 251383

Fax: 44 1963 251510

http://www.rfm.com

DR5000-081203

Electrical Characteristics, 2.4 kbps On-Off Keyed

Characteristic

Sym

Notes

Minimum

Typical

Maximum

Units

Operating Frequency

916.3

916.7

MHz

Modulation Type

OOK

Data Rate

2.4

19.2

kbps

Receiver Performance (OOK @ 2.4 kbps)

Input Current, 3 Vdc Supply

1.8

Input Signal for 10

-4

BER, 25 C

-100

dBm

Rejection, ±30 MHz

REJ

Sleep to Receive Switch Time(100 ms sleep, -85 dBm signal)

200

µs

Sleep Mode Current

µA

Power Supply Voltage Range

2.7

3.5

Vdc

Operating Ambient Temperature

-20

+65

°C

Designed for Short-Range Wireless Data Communications

Supports up to 19.2 kbps Encoded Data Transmissions

3 V, Low Current Operation plus Sleep Mode

Ready to Use OEM Module

The DR5000 receiver module is ideal for short-range wireless data applications where robust operation,
small size and low power consumption are required. The DR5000 utilizes RFM's RX6000 amplifier-
sequenced hybrid (ASH) architecture to achieve this unique blend of characteristics. The receiver RX6000 is
sensitive and stable. A wide dynamic range log detector provides robust performance in the presence of on-
channel interference or noise. Two stages of SAW filtering provide excellent receiver out-of -band rejection.
The DR5000 includes the RX6000 plus all configuration components in a ready-to-use PCB assembly excel-
lent for prototyping and intermediate volume production runs.

Absolute Maximum Ratings

Rating

Value

Units

Power Supply and All Input/Output Pins

-0.3 to +4.0

Non-Operating Case Temperature

-50 to +100

°C

Soldering Temperature (10 seconds)

230

°C

916.50 MHz

Receiver

Module

DR5000

.70

.25

.20

.165

.70

.10

DR5000 Outline Drawing

Dimensions in inches

DR5000 Pin Out

GND

RFIO

AGC/VCC

PK DET

RX BBO

RX DATA

CTR0

CTR1

GND

VCC

LPF ADJ

GND

916.50 MHz Receiver Module

RF Monolithics, Inc.

Phone: (972) 233-2903

Fax: (972) 387-8148

E-mail: info@rfm.com

Page 2 of 4

RFM Europe

Phone: 44 1963 251383

Fax: 44 1963 251510

http://www.rfm.com

DR5000-081203

Pin Desciptions

Pin

Name

Description

AGC/VCC

This pin is connected directly to the receiver AGCCAP pin. To disable AGC operation, this pin is tied to VCC. To enable AGC
operation, a capacitor is placed between this pin and ground. This pin controls the AGC reset operation. A capacitor between
this pin and ground sets the minimum time the AGC will hold-in once it is engaged. The hold-in time is set to avoid AGC chat-
tering. For a given hold-in time t

AGH

, the capacitor value C

AGC

is:

AGC

= 19.1* t

AGH

, where t

AGH

is in µs and C

AGC

is in pF

A ±10% ceramic capacitor should be used at this pin. The value of C

AGC

given above provides a hold-in time between t

AGH

and 2.65* t

AGH

, depending on operating voltage, temperature, etc. The hold-in time is chosen to allow the AGC to ride

through the longest run of zero bits that can occur in a received data stream. The AGC hold-in time can be greater than the
peak detector decay time, as discussed below. However, the AGC hold-in time should not be set too long, or the receiver will
be slow in returning to full sensitivity once the AGC is engaged by noise or interference. The use of AGC is optional when
using OOK modulation with data pulses of at least 30 µs. Active or latched AGC operation is required for ASK modulation
and/or for data pulses of less than 30 µs. The AGC can be latched ON once engaged by connecting a 150 K resistor
between this pin and ground, instead of a capacitor. AGC operation depends on a functioning peak detector, as discussed
below. The AGC capacitor is discharged in the receiver power-down (sleep) mode. Note that provisions are made on the cir-
cuit board to install a jumper between this pin and the junction of C2 and L3. Installing the jumper allows either this pin or
Pin 9 to be used for the Vcc supply when AGC operation is not required.

PK DET

This pin is connected directly to the receiver PKDET pin. This pin controls the peak detector operation. A capacitor between
this pin and ground sets the peak detector attack and decay times, which have a fixed 1:1000 ratio. For most applications,
the attack time constant should be set to 6.4 ms with a 0.027 µF capacitor to ground. (This matches the peak detector decay
time constant to the time constant of the 0.1 µF coupling capacitor C3.) A ±10% ceramic capacitor should be used at this pin.
The peak detector is used to drive the "dB-below-peak" data slicer and the AGC release function. The AGC hold-in time can
be extended beyond the peak detector decay time with the AGC capacitor, as discussed above. Where low data rates and
OOK modulation are used, the "dB-below-peak" data slicer and the AGC are optional. In this case, the PKDET pin can be left
unconnected, and the AGC pin can be connected to VCC to reduce the number of external components needed. The peak
detector capacitor is discharged in the receiver power-down (sleep) mode. See the description of Pin 3 below for further
information.

RX BBO

This pin is connected directly to the receiver BBOUT pin. On the circuit board, BBOUT also drives the receiver CMPIN pin
through C3, a 0.1 µF coupling capacitor (t

BBC

= 6.4 ms). RX BBO can also be used to drive an external data recovery pro-

cess (DSP, etc.). The nominal output impedance of this pin is 1 K. The RX BBO signal changes about 10 mV/dB, with a
peak-to-peak signal level of up to 675 mV. The signal at RX BBO is riding on a 1.1 Vdc value that varies somewhat with sup-
ply voltage and temperature, so it should be coupled through a capacitor to an external load. A load impedance of 50 K to
500 K in parallel with no more than 10 pF is recommended. Note the AGC reset function is driven by the signal applied to
CMPIN through C3. When the receiver is in power-down (sleep) the output impedance of this pin becomes very high, pre-
serving the charge on the coupling capacitor(s). The value of C3 on the circuit board has been chosen to match typical data
encoding schemes at 2.4 kbps. If C3 is modified to support higher data rates and/or different data encoding schemes and PK
DET is being used, make the value of the peak detector capacitor about 1/3 the value of C3.

RX DATA

RX DATA is connected directly to the receiver data output pin, RXDATA. This pin will drive a 10 pF, 500 K parallel load. The
peak current available from this pin increases with the receiver low-pass filter cutoff frequency. In the power-down (sleep) or
receive mode, this pin becomes high impedance. If required, a 1000 K pull-up or pull-down resistor can be used to establish
a definite logic state when this pin is high impedance (do not connect the pull-up resistor to a supply voltage higher than 3.5
Vdc or the receiver will be damaged). This pin must be buffered to successfully drive low-impedance loads.

6, 7

GND

916.50 MHz Receiver Module

RF Monolithics, Inc.

Phone: (972) 233-2903

Fax: (972) 387-8148

E-mail: info@rfm.com

Page 3 of 4

RFM Europe

Phone: 44 1963 251383

Fax: 44 1963 251510

http://www.rfm.com

DR5000-081203

Data Out

3 Vdc

2.4 kbps Application Circuit

DR3000

DR5000

Data Out

3 Vdc

19.2 kbps Application Circuit

33 k

DR5000

LPF ADJ

This pin is the receiver low-pass filter bandwidth adjust, and is connected directly to the receiver LPFADJ pin. R6 on the cir-
cuit board (330 K) is connected between LPFADJ and ground will be in parallel with any external resistor connected to LPF
ADJ. The filter bandwidth is set by the parallel resistance of R6 and the external resistor (if used). The equivalent resistor
value can range from 330 K to 820 ohms, providing a filter 3 dB bandwidth f

LPF

from 4.4 kHz to 1.8 MHz. The 3 dB filter

bandwidth is determined by:

LPF

= 1445/ (330*R

LPF

/(330 + R

LPF

)), where R

LPF

is in kilohms, and f

LPF

is in kHz

A ±5% resistor should be used to set the filter bandwidth. This will provide a 3 dB filter bandwidth between f

LPF

and 1.3* f

LPF

with variations in supply voltage, temperature, etc. The filter provides a three-pole, 0.05 degree equiripple phase response.
The peak drive current available from RXDATA increases in proportion to the filter bandwidth setting. As shipped, the
receiver module is set up for nominal 2.4 kbps operation. An external resistor can be added between Pin 8 and ground to
support higher data rates. Preamble training times will not be decreased, however, unless C3 is replaced with a smaller
capacitor value (see the descriptions of Pins 2 and 3 above). Refer to sections 1.4.3, 2.5.1 and 2.6.1 in the ASH Transceiver
Designer's Guide for additional information on data rate adjustments.

VCC

This is the positive supply voltage pin for the module. The operating voltage range is 2.7 to 3.5 Vdc. It is also possible to use
Pin 1 as the Vcc input. Please refer to the Pin 1 description above.

GND

This is the supply voltage return pin.

CTR1

CTR1 is connected to the CNTRL1 control pin on the receiver. CTR1 and CTR0 select the transceiver operating modes.
CTR1 and CTR0 both high place the unit in the receive mode. CTR1 and CTR0 both low place the unit in the power-down
(sleep) mode. CTR1 is a high-impedance input (CMOS compatible). This pin must be held at a logic level; it cannot be left
unconnected. At turn on, the voltage on this pin and CTR0 should rise with VCC until VCC reaches 2.7 Vdc (receive mode).
Thereafter, any mode can be selected.

CTR0

CTR0 is connected to the CNTRL0 control pin on the receiver CTR0 is used with CTR1 to control the operating modes of the
receiver. CTR0 is a high-impedance input (CMOS compatible). This pin must be held at a logic level; it cannot be left uncon-
nected. At turn on, the voltage on this pin and CTR1 should rise with VCC until VCC reaches 2.7 Vdc (receive mode). There-
after, any mode can be selected.

RFIO

RFIO is the RF input/output pin. A matching circuit for a 50 ohm load (antenna) is implemented on the circuit board between
this pin and the receiver SAW filter transducer.

RF GND

This pin is the RF ground (return) to be used in conjunction with the RFIO pin. For example, when connecting the transceiver
module to an external antenna, the coaxial cable ground is connected this pin and the coaxial cable center conductor is con-
nected to RFIO.

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