2-1
Product Description
Ordering Information
Typical Applications
Features
Functional Block Diagram
RF Micro Devices, Inc.
7628 Thorndike Road
Greensboro, NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Optimum Technology Matching Applied
Si BJT
GaAs MESFET
GaAs HBT
Si Bi-CMOS
SiGe HBT
Si CMOS
InGaP/HBT
GaN HEMT
SiGe Bi-CMOS
4
GND
GND
3
2
1
5
7
8
9
10
6
Bias
VMODE
VREG
VCC1
RF IN
GND
GND
RF OUT
VCC2
RF6100-4
3V 1900MHZ LINEAR POWER AMPLIFIER
MODULE
3V CDMA US-PCS Handset
3V CDMA2000/1XRTT US-PCS Handset
3V CDMA2000/1X-EV-DO US-PCS
Handset
Spread-Spectrum System
The RF6100-4 is a high-power, high-efficiency linear
amplifier module specifically designed for 3V handheld
systems. The device is manufactured on an advanced
third generation GaAs HBT process, and was designed
for use as the final RF amplifier in 3V IS-95/CDMA 2000
1X handheld digital cellular equipment, spread-spectrum
systems, and other applications in the 1850MHz to
1910MHz band. The RF6100-4 has a digital control line
for low power applications to lower quiescent current. The
device is self-contained with 50
input and output that is
matched to obtain optimum power, efficiency and linear-
ity. The module is a 4mmx4mm land grid array with back-
side ground. The RF6100-4 is footprint compatible with
industry standard 4mmx4mm CDMA modules, and
requires only one decoupling capacitor.
Input/Output Internally Matched@50
28.5dBm Linear Output Power
39% Peak Linear Efficiency
28dB Linear Gain
-48dBc ACPR @ 1.25MHz
RF6100-4
3V 1900MHz Linear Power Amplifier Module
RF6100-4 PCBA Fully Assembled Evaluation Board
0
Rev A0 031217
1
4.00
0.10
4.00
0.10
1.40
1.25
0.450
0.075
Shaded areas represent pin 1 location.
Dimensions in mm.
0.500
0.550 T
Y
P
0.806
3.200 3.350
0.100 T
Y
P
3.500 T
Y
P
3.900 T
Y
P
1
0.000
0.103 TYP
0.155
1.455
1.475 TYP
1.805 TYP
2.205 TYP
2.653
3.053
3.453 TYP
3.903 TYP
3.850
3.050
2.825
2.600
2.053
2.418
1.953
1.353
0.953
0.553
0.155
0.000
0.600
0.800
1.000 TYP
3.000
Package Style: Module (4mmx4mm)
2-2
RF6100-4
Rev A0 031217
Absolute Maximum Ratings
Parameter
Rating
Unit
Supply Voltage (RF off)
+8.0
V
Supply Voltage (P
OUT
31dBm)
+5.2
V
Control Voltage (V
REG
)
+3.9
V
Input RF Power
+10
dBm
Mode Voltage (V
MODE
)
+3.5
V
Operating Temperature
-30 to +110
C
Storage Temperature
-40 to +150
C
Parameter
Specification
Unit
Condition
Min.
Typ.
Max.
High Gain Mode (V
MODE
Low)
T=25
o
C Ambient, V
CC
=3.4V, V
REG
=2.8V,
V
MODE
=0V, and P
OUT
=28.5dBm for all
parameters (unless otherwise specified).
Operating Frequency Range
1850
1910
MHz
Linear Gain
26
28
31
dB
Second Harmonics
-35
-30
dBc
Third Harmonics
-40
dBc
Maximum Linear Output
28.5
dBm
Linear Efficiency
35
39
%
Maximum I
CC
535
600
mA
ACPR @ 1.25MHz
-48
-46
dBc
ACPR @ 2.25MHz
-62
-56
dBc
Input VSWR
2:1
Output VSWR Stability
6:1
No oscillation>-70dBc
10:1
No damage
Noise Power
-139
dBm/Hz
At 80MHz offset.
Low Gain Mode (V
MODE
High)
T=25
o
C Ambient, V
CC
=3.4V, V
REG
=2.8V,
V
MODE
=2.8V, and P
OUT
=28.5dBm for all
parameters (unless otherwise specified).
Operating Frequency Range
1850
1910
MHz
Linear Gain
25
27
31
dB
Second Harmonics
-35
-30
dBc
Third Harmonics
-40
dBc
Maximum Linear Output
28.5
dBm
Linear Efficiency
35
39
%
ACPR @1.25MHz
-48
-46
dBc
ACPR @2.25MHz
-60
-56
dBc
Maximum I
CC
140
165
mA
P
OUT
=16dBm
Linear Gain
26
dB
P
OUT
=16dBm
Input VSWR
2:1
Output VSWR Stability
6:1
No oscillation>-70dBc
10:1
No damage
Caution! ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).
2-3
RF6100-4
Rev A0 031217
Parameter
Specification
Unit
Condition
Min.
Typ.
Max.
Power Supply
T=25C Ambient
Supply Voltage
3.2
3.4
4.2
V
High Gain Idle Current
60
75
90
mA
V
MODE
=low and V
REG
=2.8V
Low Gain Idle Current
50
65
80
mA
V
MODE
=high and V
REG
=2.8V
V
REG
Current
1.1
2
mA
V
CC
=3.4V, V
REG
=2.8V
V
MODE
Current
250
500
uA
RF Turn On/Off Time
1.2
6
uS
DC Turn On/Off Time
2
40
uS
Total Current (Power Down)
0.2
5
uA
V
REG
Low Voltage (Power Down)
0
0.5
V
V
REG
High Voltage (Recom-
mended)
2.75
2.8
2.95
V
V
REG
High Voltage (Operational)
2.7
3.0
V
V
MODE
Voltage
0
0.5
V
High Gain Mode
V
MODE
Voltage
2.0
3.0
V
Low Gain Mode
2-4
RF6100-4
Rev A0 031217
Pin
Function
Description
Interface Schematic
1
VCC1
First stage collector supply. A low frequency decoupling capacitor
(e.g., 4.7
F) may be required.
2
RF IN
RF input internally matched to 50
. This input is internally AC-coupled.
3
GND
Ground connection. Connect to package base ground. For best perfor-
mance, keep traces physically short and connect immediately to
ground plane.
4
VMODE
For nominal operation (High Power Mode), V
MODE
is set LOW. When
set HIGH, devices are biased lower to improve efficiency.
5
VREG
Regulated voltage supply for amplifier bias. In Power Down mode, both
V
REG
and V
MODE
need to be LOW (<0.5V).
6
GND
Ground connection. Connect to package base ground. For best perfor-
mance, keep traces physically short and connect immediately to
ground plane.
7
GND
Ground connection. Connect to package base ground. For best perfor-
mance, keep traces physically short and connect immediately to
ground plane.
8
RF OUT
RF Output internally matched to 50
. This output is internally
AC-coupled.
9
GND
Ground connection. Connect to package base ground. For best perfor-
mance, keep traces physically short and connect immediately to
ground plane.
10
VCC2
Output stage collector supply. A low frequency decoupling capacitor
(e.g., 4.7
F) is required.
Pkg
Base
GND
Ground connection. The backside of the package should be soldered to
a top side ground pad which is connected to the ground plane with mul-
tiple vias. The pad should have a short thermal path to the ground
plane.
2-5
RF6100-4
Rev A0 031217
Evaluation Board Schematic
(Download Bill of Materials from www.rfmd.com.)
VCC1
C2
4.7
F
50
strip
J2
RF OUT
50
strip
J1
RF IN
VREG
C3
4.7
F
1
2
3
4
5
7
6
9
8
10
VMODE
C4
4.7
F
VCC2
C1
22
F
P2
1
2
3
4
5
CON5
GND
GND
GND
P2-5
VMODE
P2-3
VREG
P1
1
2
3
4
5
CON5
GND
GND
GND
P1-2
VCC1
P1-4
VCC2
Bias
2-6
RF6100-4
Rev A0 031217
PCB Design Requirements
PCB Surface Finish
The PCB surface finish used for RFMD's qualification process is electroless nickel, immersion gold. Typical thickness is
3
inch to 8
inch gold over 180
inch nickel.
PCB Land Pattern Recommendation
PCB land patterns are based on IPC-SM-782 standards when possible. The pad pattern shown has been developed and
tested for optimized assembly at RFMD; however, it may require some modifications to address company specific
assembly processes. The PCB land pattern has been developed to accommodate lead and package tolerances.
PCB Metal Land and Solder Mask Pattern
Thermal Pad and Via Design
The PCB land pattern has been designed with a thermal pad that matches the exposed die paddle size on the bottom of
the device.
Thermal vias are required in the PCB layout to effectively conduct heat away from the package. The via pattern has been
designed to address thermal, power dissipation and electrical requirements of the device as well as accommodating
routing strategies.
The via pattern used for the RFMD qualification is based on thru-hole vias with 0.203mm to 0.330mm finished hole size
on a 0.5mm to 1.2mm grid pattern with 0.025mm plating on via walls. If micro vias are used in a design, it is suggested
that the quantity of vias be increased by a 4:1 ratio to achieve similar results.
Dimensions in mm.
Metal Land Pattern
Pin 1
A
A
A
A
A
A
3.40 Typ.
2.55 Typ.
1.90 Typ.
1.50 Typ.
0.85 Typ.
0.00
0.
00
0.4
5
T
y
p.
3.6
0
T
y
p.
2.9
5
T
y
p.
0.20 Typ.
0.20 Typ.
0.65 Typ.
1.05 Typ.
1.70 Typ.
2.35 Typ.
2.75 Typ.
3.60 Typ.
A = 0.40 (mm) Sq. Typ.
Solder Mask Pattern
A
A
A
A
A
B
A
A
A
A
A
Pin 1
3.40 Typ.
1.
7
0
0.0
0
2.55 Typ.
1.70 Typ.
0.85 Typ.
0.00
A = 0.55 (mm) Sq. Typ.
B = 2.65 x 3.95 (mm)
Figure 1. PCB Metal Land Pattern and Solder Mask Pattern (Top View)
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