DAT_SH02

PDS039-SA2532K-001 Rev. C 20-03-00

sames

Key Features

Speech Circuit, LD/MF Dialler and Tone Ringer

on one 28 pin CMOS chip

Low

Noise

31 digit Last Number Redial

Line Loss Compensation selectable by pin

option

2 Timed Break Recall keys

Moving Cursor protocol with comparison

On chip MF filter (CEPT CS 203 compatible)

Pause key for auto pause or wait function

Power down mode

Ring frequency discrimination

Selectable Loop-Disconnect or DTMF dialling

modes

Real or complex impedance programmable

Soft Clipping to avoid harsh distortion

Uses inexpensive 3.58MHz ceramic resonator

Operating range from 13 to 100 mA

3 Tone melody generator

Block Diagram

General Description

The SA2532K is a CMOS integrated circuit that
contains all the functions needed to form a high
performance electronic telephone.

The device incorporates LD/MF repertory dialling,
melody generation, ring frequency discrimination
and a high quality speech circuit.

Soft switch into temporary MF mode using * when
LD mode is selected .Timed Break Recall will be
available in both LD and MF dialling modes.

A 31 digit Last Number Redial (LNR) memory, with
moving cursor protocol, activated by single key
depression.

Line Loss Compensation whereby send and receive
gains are adjusted (by 6dB) over the ranges
selected by the LLC pin.

KEYPAD

MODE_OUT

AGND

STB

FC1

HS/DP

LLC

OSC

C1 C2

C3 C4

RO2

RO1

MUTE

SA2532K

DIALER

CLIP

SOFT

SENSE

CURRENT

LINE

BJT

GENERATOR

TONE

SEQUENCER

MELODY

RAM

OSC

LOGIC

CONTROL

DISCRIMINATION

FREQUENCY

RING

hook

MODE

SA2532KA/B

SINGLE CHIP

TELEPHONE FOR INDIA

SA2532KA/B

3 /21

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Pin Description

Pin #

Symbol

Function

23
24

M1
M2

Microphone Inputs
Differential inputs for the microphone (electret).

2
3

RO1
RO2

Receiver Outputs
These are the outputs for driving a dynamic ear piece with an impedance of
100 to 300Ohms

GND

Analog Ground
This is the analog ground for the amplifiers.

Receive Input
This is the input for the receive signal.

STB

Side Tone Balance Input
This is the input for side tone cancellation.

Line Current Sense Input
This is the input for sensing the line current.

Line Input
This input is used for power extraction and line current sensing.

Current Shunt Control Output
This N-channel open drain output controls the external high power shunt
transistor for the modulation of the line voltage and for shorting the line
during make period of pulse dialling.

Positive Voltage Supply
This is the supply pin for the circuit.

Negative Power Supply

Melody Output
Pulse Density Modulated output of the melody generator for tone ringer. At
high impedance when not active.

FCI

Frequency Comparator Input
This is a Schmitt trigger input for ring frequency discrimination. Disabled
during off-hook.

HS/DPB

Hook Switch Input and Dial Pulse Output
This is an I/O that is pulled high by the hook switch when off- hook. An
open drain pulls it low during break periods of pulse dialling and flash.

OSC

Oscillator Input
Oscillator pin for Xtal or ceramic resonator (3.58 Mhz). Recommended :
Murata CSA 3.58MG312AM

MODE

OUT

Mode Output.
An Output pin designed to drive a low power LED. Active whenever MF
dialling mode is selected.

LLC

Line Loss Compensation.
Select pin for the line loss compensation:
Open None
Low 20-50mA
High 45-75mA

SA2532KA/B

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Power On Reset

The on chip power on reset circuit monitors the
supply voltage (V

). When V

rises above

approx. 1.2V, a power on reset occurs to assure
correct start-up and the LNR register is cleared

DC Conditions

The normal operating range is from 15mA to 100
mA. Operating range with reduced performance is
from 5mA to 15mA. In the operating range all
functions are operational. In the line hold range
from 0 to 5 mA the device is in a power down mode
and the voltage at LI is reduced to maximum 3.5V.
The dc characteristic (excluding diode bridge and
Pulsing transistors) is determined by the voltage at
LI and the resistor R1 as follows:

VLS = VLI + ILine.R1

The voltage at LI is 4.5V.

During pulse dialling the speech circuit and other
parts of the device not required are in a power
down mode to save current. The CS pin is pulled to
V

in order to turn the external shunt transistor on

to keep a low voltage drop at the LS pin during
make periods.

AC Impedance

The Characteristic or Output impedance of the
SA2532K is set within the IC and adjusted to 600
Ohms. A capacitor may be added to the circuit at
pin CI to add a reactive element and make the
output impedance complex.

Oscillator

All the Timing Functions of the SA2532K are based
on a Clock Frequency of 3.58MHz. A ceramic
resonator of this frequency should be connected to
the OSC pin. In practice minor deviations from the
nominal frequency may occur due to the
characteristics of the frequency reference device
used and so it is recommended that care is taken in
the selection of components. Typically a small
value capacitor (

47pF) may be required to be

connected in parallel with the Frequency Reference
to ensure start-up and/or operation at the nominal
frequency.

Speech Circuit

The speech circuit consists of a transmit and a
receive path with soft clip, mute, line loss
compensation and side tone cancellation.

Transmit

The gain of the transmit path is 35 dB for M1/M2 to
LS (see test circuit in Figure 5). The microphone
input is differential with an input impedance of 25
kOhms. The soft clip circuit limits the output
voltage at LI to 2.0V

PEAK

. The attack time is

30us/6dB and the decay time is 20 ms/6 dB. When
mute is active, during dialling or after pressing the
MUTE key, the gain is reduced by > 60 dB.

Receive

The receive input is the differential signal of RI and
STB. The gain of the receive path is 2 dB (see test
circuit in Figure 5) with differential outputs,
RO1/RO2 . When mute is active during dialling the
gain is reduced by > 60dB. During DTMF dialling a
MF comfort tone is applied to the receiver. The
comfort tone is the DTMF signal with a level that is
-30dB relative to the line signal.

Side Tone

Side Tone is controlled along with Return Loss by a
Double Balance Bridge as shown in Figure 3. Good
sidetone cancellation is achieved by using the
following equation:

bal

------ = ----
Z

line

The side tone cancellation signal is applied to the
STB input.

Line Loss Compensation

The line loss compensation is a pin selectable
option. When it is activated, the gains of the
transmit and receive amplifiers are changed by 6dB
in accord with the DC conditions as measured at
Pins LI and LS. When the LLC pin is low the
adjustment in gain occurs over the range I

LINE

= 20

to 50mA. When the LLC pin is high the gain range
is I

LINE

= 45 to 75mA.. Note that these values apply

for R1 = R30

. When LLC pin is open then the

amplifier gains remain fixed regardless of the line
current (see figure 6 and figure 7).

SA2532KA/B

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ONE COMMON GROUND

BAL

RETURN LOSS

LINE

REF

SIDE TONE

STB

SYN

Figure 3

Double balanced bridge (return loss and side tone)
with one common ground

Dialling Functions

Valid Keys

The keypad of the SA2532K comprises a maximum
of 19 keys. A Bi-polar scan technique is used so
that the 19 keys are scanned in a partial 4 x 6
matrix using only 8 pins and 2 diode. The key
scanning is enabled when HS/DPN is pulled high
and V

is above V

REF

. A valid key is detected when

one and only one contact closure is detected
between a Row and Column Pin. Key contacts are
debounced to avoid incorrect detection. It is also
possible to connect a controller to the rows and
columns.

Dial Mode Selection

The default mode (LD or MF) can be selected by
the Mode pin. When default LD mode is selected, a
temporary change to MF can be invoked by
pressing the * key. Once in MF mode the MODE
OUT pin becomes active. The circuit will revert to
LD by pressing either one of the Recall keys or by
next on-hook.

When MF mode is selected by the mode pin, the
circuit can not be changed temporary to LD but will
remain in MF. In LD mode the speech circuit will be
muted for the duration of the IDP.

Last Number Redial

LNR is a facility that allows re-signalling of the last
manually dialled number without keying in all the
digits again. The LNR is repeatable. A manually
entered number is automatically stored in the LNR
RAM. The capacity of the LNR RAM is 31 digits. If
a number greater than 31 digits is entered, the LNR
facility will be inhibited (Until new entries < 32 digits)
and further entries will be buffered in a First In First
Out Memory (FIFO). Post dialled digits, i.e. digits
manually entered after LNR has been invoked, are
not stored in RAM but buffered in FIFO.

Pauses can be inserted by pressing the PAUSE
key. Each pause is 2 seconds when inserted within
the first 5 digits otherwise a wait function will halt
dialling until PAUSE or LNR key is depressed.

Recall Function

A Recall activation will invoke a Flash (Timed Loop
Break).

If Recall is the first entry in a digit string, it will be
stored in LNR RAM when digit(s) are entered after
the Recall.

If the recall key is depressed after a digit string has
been entered or dialled out, the recall will not be
stored but buffered in the FIFO together with
subsequently entered digits.

If pressing the recall key is not followed by digit
entries, the LNR RAM remains intact. After a recall
a 274ms second pause will automatically be
executed.

Both Recall keys will be functional in both MF and
LD dialling modes.

Memory Keys

The single memory (M5) can be used to directly
access a stored number of not more than 21 digits.
During programming multiple pauses can be
inserted by pressing the PAUSE or LNR key. Each
pause is 3 seconds long when inserted within the
first 5 digits otherwise a wait function (infinite pause)
will be executed until the PAUSE or LNR key is
depressed

Mute Function

The MUTE key is enabled in speech mode only.
Depressing the MUTE key mutes the microphone
amplifier. Repressing the MUTE key deactivates
the mute (toggle function). Any key entry overwrites
a mute activated by the MUTE key and mute will be
deactivated.

When privacy mute is activated a reminder tone is
applied to the ear piece every 274ms.

SA2532KA/B

7 /21

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Moving Cursor Procedure

To accommodate easy and uncomplicated redialling
(LNR) behind a PABX, a sliding cursor protocol is
implemented. If new entries match the previous
RAM contents, pressing the LNR key will dial out
the remaining digits. If there is an error in matching,
the LNR will be inhibited until next on-hook, and the
RAM will contain the new number. In the case of
mixed mode LNR operation the redialling in the
SA2532KA is limited to the LD digits so as to
prevent unauthorised access to banking passwords
etc. The SA2532KB will dial out all digits (i.e. both
the pulse and the DTMF digits) during mixed mode
re-dialling.

DTMF Tones

The DTMF generator provides 7 frequencies,
namely:

Low group
Digit 1-2-3

697Hz

Digit 4-5-6

770Hz

Digit 7-8-9

852Hz

Digit *-0-#

941Hz

High group
Digit 1-4-7-*

1209Hz

Digit 2-5-8-0

1336 Hz

Digit 3-6-9-#

1477Hz

The MF output levels are -6/-8 dBm and the
preemphasis is 2.6dB.

Tone Ringer

The Tone Ringer of the SA2532K incorporates a
Discriminator Circuit and a three tone Melody
Generator.

When a Valid Ring Signal is detected the Melody
generator is activated and creates a ringing signal
comprising 3 frequencies F1 (1065Hz), F2
(1420Hz) and F3 (1734Hz).

These frequencies are repeated in a sequence of 6
time slots constructed by the frequencies

This sequence is repeated 7 times per second.

Ring Frequency Discrimination

The Ring Frequency Discriminator assures that
signals with a frequency between 13 Hz to 70 Hz
are regarded as valid ring signals. When a valid ring
signal is detected, the melody generator is activated
and remains active as long as the ring signal is
present. Once the melody generator has been
started, the ring signal is continuously monitored
and the melody generator is instantly turned on or
off according to the momentary presence of a valid
or invalid ring signal respectively (until next POR of
off-hook).

SA2532KA/B

Typical Application

Only the components necessary for presenting the complete functions of the SA2532K are included.

KEYPAD

MODE_OUT

AGND

STB

FC1

HS/DP

LLC

OSC

C1 C2

C3 C4

RO2

RO1

MUTE

SA2532K

DIALER

CLIP

SOFT

SENSE

CURRENT

LINE

Line Adaption
Power Extraction
DC Mask

GENERATOR

TONE

SEQUENCER

MELODY

RAM

OSC

LOGIC

CONTROL

DISCRIMINATION

FREQUENCY

RING

hook

MODE

680n

5M1

2K2

100K

12V

BSS92

220K

150K

BC327

300

10u

510

100K

1N4148

330K

10u

18V

12V

330K

220K

10n

5V1

470u

Ringer

2K2

1K8

100u

1K8

10n

3.58MHz

2N5551

BC547B

4 x 1N4004

Off

Figure 4

SA2532KA/B

15 /21

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Electrical Characteristics

Absolute Maximum Ratings

Positive Supply Voltage ..................................... -0.3V

Input current .................................................................. ±25mA
Input Voltage (LS) .................................... . ....... -0.3V

10V

Input Voltage (LI, CS) .......................................... -0.3V

Input Voltage (STB, RI) .............................. -2V

VIN

+0.3V

Input Voltage (MO) ............................................ -0.3V

35V

Digital Input Voltage ................................... -0.3

+0.3V

Electrostatic Discharge .................................................. ±800V
Storage Temperature ....................................... -55 ºC to +150ºC

Recommended Operating Conditions

Supply Voltage * (Speech Mode)............................. 4V

Oscillator Frequency (Resonator: Murata CSA 3.58M G300)... 3.58 MHz
Operating Temperature ......................................... -10ºC to +55ºC

* This voltage is generated internally

DC Characteristics (I

LINE

= 20 mA unless otherwise specified)

Symbol

Parameter

Conditions

Min

Typ

Max

Units

Operating Current

Speech mode
MF dialling
LD dialling V

= 2.5V Ring

mode V

= 2.5V

3
4
200
300

mA
mA
uA
uA

DDO

Retention Current

Idle mode V

= 2V,

AMB

= 25º

0.05

Line Voltage
(default)

15mA

LINE

100mA

4.5

Output Current,
Sink
CS,HS/DP,MO

= 0.4V

1.5

Output Current,
Source
MODE OUT

= V

- 0.4V

-1.5

SA2532KA/B

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AC Characteristics (I

LINE

=20mA; f=800Hz unless otherwise specified)

Symbol

Parameter

Conditions

Min

Typ

Max

Units

TX
A

TX/F

Transmit
Gain (M1/M2)
Variation with
Frequency

Test Circuit Fig.5
Z

= 1000

f=500Hz to 3.4kHz

33.5

35
0.8

36.5

dB
dB

THD

Distortion

0.5V

RMS

AGC

SCO

ATTACK

DECAY

Soft Clip Level
Soft Clip
Overdrive
Attack Time
Decay Time

2
20

30
20

PEAK

us/6dB
ms/6dB

Input Impedance
(M1/M2)

MUTE

Mute Attenuation

Mute activated

Noise Output
Voltage

-72

dBmp

Unwanted
Frequency
Components

50...20 kHZ

-60

dBm

IN MAX

Input Voltage
Range
(M1/M2)

Differential

Single Ended

0.5

PEAK

BJT
V

IN MAX

Output Driver
Input Voltage
Range (LI)
Dynamic Range

2
2

PEAK

Return Loss

ZRL = 600 Ohms

ARX/F

Receive

Receive Gain
(RO1/RO2)
Variation with
Frequency

Test Circuit Fig.5

ZRL=600

f=500 Hz to 3.4 kHz

0.5

0.8

3.5

THD

Distortion

0.5VRMS

AGC

SCO

ATTACK

DECAY

Soft Clip Level
Soft Clip
Overdrive
Attact Time
Decay Time

> 0.8V

1
10

30
20

PEAK

us/6dB
ms/6dB

Noise Output
Voltage
Unwanted
Frequency
Components

50 Hz...20 kHz

-72

-60

dBmp

dBm

SA2532KA/B

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AC Characteristics (contd) (I

LINE

= 20mA; f=800Hz unless otherwise specified)

Symbol

Parameter

Conditions

Min

Typ

Max

Units

IN RI

Input Impedance
(RI)
Input Voltage
Range(RI)

PEAK

IN ST

Sidetone

Sidetone
Cancellation
Input Voltage
Range (STB)
Input Impedance
(STB)

Test Circuit Fig.5

0.5 V

RMS

PEAK

Keyboard
Key Debounce
Time

HS_L

HS_H

HS Input

Low to High
Debounce
High to Low
Debounce

Going off-hook

Line breaks/on-hook

240

DTMF

Frequency
deviation

Note 5

1.2

MF Tone
Level(Low group)

-9.5

-8

-6.5

L-H

Preemphasis Low
to High

2.0

2.6

3.0

THD

Distortion

Note 3

-30

dBr

ITP

Tone Duration
Inter Tone Pause

Note 1
Note 1

80
80

82.3
82.3

85
85

ms
ms

Tone Rise Time
Tone Fall Time

Note 2
Note 2

5
5

ms
ms

M/R

Dial Rate
tolerance
Make/Break
Period

±5%, MODE=low
±5%, MODE=high

40/60
33/66

pps
%
ms
ms

PDP

IDP

Pre-Digit Pause
Inter Digit Pause
Mute Overhang

750

35
790
156

830

ms
ms
ms

FD1

FD2

PFP

Flash Duration 1
Flash Duration 2
Post Flash Pause

100
270

274

102
276

ms
ms
ms.

SA2532KA/B

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AC Characteristics (contd) (I

LINE

= 20mA; f=800Hz unless otherwise specified)

Symbol

Parameter

Conditions

Min

Typ

Max

Units

Access Pause

1.9

2.0

2.1

sec

Tone Ringer

Melody Output
Level
Melody Delay

PDM

F1
F2
F3

Frequency 1
Frequency 2
Frequency 3

1022
1363
1664

1065
1420
1734

1107
1476
1803

Hz
Hz
Hz

Detection Time
Detection
Time-out

Initial

Note 4

ms
ms

MIN

MAX

Min. Detection
Frequency
Max. Detection
Frequency

RDT

RTI

Reminder Tone

Level (RO1/RO2)
Duration
Interval

Relative to LS

-30
82.3
274

dBr
ms
ms

Comfort Tone
(DTMF)

Level (RO1/RO2)

Relative to LS

-30

dBr

Note 1:

The values are valid during LNR dialling and are minimum values during manual dialling, i.e. the
tones will continue as long as the key is depressed.

Note 2:

The rise time is the time from 10% of final value until the tone amplitude has reached 90% of its final
value.

Note 3:

Relative to high group.

Note 4:

The FCI circuit is reset by the POR and the HS/DPB pulled high (off hook). After a reset the FCI
circuit is in a standby state. A positive edge on FCI will initiate the frequency discrimination.
Whenever a period of the ring signal is missing, the timer is reset. When a valid ring signal is
present for more than one cycle, the melody generator is started and is directly controlled by the ring
signal. This condition will remain until a new reset.

Note 5:

This does not include the frequency deviation of the ceramic resonator.

SA2532KA/B

21 /21

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Disclaimer:

The information contained in this document is confidential and proprietary to South African

Micro-Electronic Systems (Pty) Ltd ("SAMES") and may not be copied or disclosed to a third party, in whole or in
part, without the express written consent of SAMES. The information contained herein is current as of the date
of publication; however, delivery of this document shall not under any circumstances create any implication that
the information contained herein is correct as of any time subsequent to such date. SAMES does not undertake
to inform any recipient of this document of any changes in the information contained herein, and SAMES
expressly reserves the right to make changes in such information, without notification,even if such changes
would render information contained herein inaccurate or incomplete. SAMES makes no representation or
warranty that any circuit designed by reference to the information contained herein, will function without errors
and as intended by the designer.

South African Micro-Electronic Systems (Pty) Ltd

P O Box 15888,

33 Eland Street,

Lynn East,

Koedoespoort Industrial Area,

0039

Pretoria,

Republic of South Africa,

Republic of South Africa

Tel:

012 333-6021

Tel:

Int +27 12 333-6021

Fax:

012 333-8071

Fax:

Int +27 12 333-8071

Web Site : http://www.sames.co.za

Document Outline

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: SA2532KA

Document Outline

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: SA2532KA