Revision 0.2
August 2003
K1S321611C
- 1 -
UtRAM
Preliminary
Document Title
2Mx16 bit Uni-Transistor Random Access Memory
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
Revision History
Revision No.
0.0
0.1
0.2
Remark
Advanced
Preliminary
Preliminary
History
Initial Draft
Revised
- Deleted 60ns Speed Bin
Revised
- Corrected errorta '48-TBGA' under PIN DESCRIPTION to '48-FBGA'
on page2
Draft Date
January 16, 2003
June 13, 2003
August 13, 2003
Revision 0.2
August 2003
K1S321611C
- 2 -
UtRAM
Preliminary
PRODUCT FAMILY
Product Family
Operating Temp.
Vcc Range
Speed
Power Dissipation
PKG Type
Standby
(I
SB1
, Max.)
Operating
(I
CC2
, Max.)
K1S321611C-I
Industrial(-40~85
C)
2.7V~3.1V
70ns
100
A
35mA
48-FBGA-6.00x8.00
2M x 16 bit Uni-Transistor CMOS RAM
GENERAL DESCRIPTION
The K1S321611C is fabricated by SAMSUNG
s advanced
CMOS technology using one transistor memory cell. The device
supports Industrial temperature range and 48 ball Chip Scale
Package for user flexibility of system design. The device also
supports dual chip selection for user interface.
FEATURES
Process Technology: CMOS
Organization: 2M x16 bit
Power Supply Voltage: 2.7V~3.1V
Three State Outputs
Compatible with Low Power SRAM
Dual Chip selection support
Package Type: 48-FBGA-6.00x8.00
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice
.
1) Reserved for future use.
Name
Function
Name
Function
CS1,CS2
Chip Select Inputs
Vcc
Power
OE
Output Enable Input
Vss
Ground
WE
Write Enable Input
UB
Upper Byte(I/O
9
~
16
)
A
0
~A
20
Address Inputs
LB
Lower Byte(I/O
1
~
8
)
I/O
1
~I/O
16
Data Inputs/Outputs
NC
No Connection
1)
FUNCTIONAL BLOCK DIAGRAM
Clk gen.
Row
select
I/O
1
~I/O
8
Data
cont
Data
cont
Data
cont
I/O
9
~I/O
16
Vcc
Vss
Precharge circuit.
Memory array
I/O Circuit
Column select
WE
OE
UB
CS1
LB
Control Logic
CS2
Row
Addresses
Column Addresses
PIN DESCRIPTION
48-FBGA: Top View(Ball Down)
LB
OE
A0
A1
A2
CS2
I/O9
UB
A3
A4
CS1
I/O1
I/O10
I/O11
A5
A6
I/O2
I/O3
Vss
I/O12
A17
A7
I/O4
Vcc
Vcc
I/O13
NC
A16
I/O5
Vss
I/O15
I/O14
A14
A15
I/O6
I/O7
I/O16
A19
A12
A13
WE
I/O8
A18
A8
A9
A10
A11
A20
1
2
3
4
5
6
A
B
C
D
E
F
G
H
Revision 0.2
August 2003
K1S321611C
- 3 -
UtRAM
Preliminary
POWER UP SEQUENCE
1. Apply power.
2. Maintain stable power(Vcc min.=2.7V) for a minimum 200
s with CS1=high.or CS2=low.
Min. 200
s
TIMING WAVEFORM OF POWER UP(1)
(CS
1
controlled)
TIMING WAVEFORM OF POWER UP(2)
(CS
2
controlled)
POWER UP(2)
1. After V
CC
reaches V
CC
(Min.), wait 200
s with CS
2
low. Then the device gets into the normal operation.
V
CC
CS
1
CS
2
V
CC(Min)
POWER UP(1)
1. After V
CC
reaches V
CC
(Min.), wait 200
s with CS
1
high. Then the device gets into the normal operation.
Min. 200
s
V
CC
CS
1
CS
2
V
CC(Min)
Normal Operation
Power Up Mode
Normal Operation
Power Up Mode
Revision 0.2
August 2003
K1S321611C
- 4 -
UtRAM
Preliminary
ABSOLUTE MAXIMUM RATINGS
1)
1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be
restricted to be used under recommended operating condition. Exposure to absolute maximum rating conditions longer than 1 second may affect reli-
ability.
Item
Symbol
Ratings
Unit
Voltage on any pin relative to Vss
V
IN
, V
OUT
-0.2 to V
CC
+0.3V
V
Voltage on Vcc supply relative to Vss
V
CC
-0.2 to 3.6V
V
Power Dissipation
P
D
1.0
W
Storage temperature
T
STG
-65 to 150
C
Operating Temperature
T
A
-40 to 85
C
FUNCTIONAL DESCRIPTION
1. X means don
t care.(Must be low or high state)
CS1
CS2
OE
WE
LB
UB
I/O
1~8
I/O
9~16
Mode
Power
H
X
1)
X
1)
X
1)
X
1)
X
1)
High-Z
High-Z
Deselected
Standby
X
1)
L
X
1)
X
1)
X
1)
X
1)
High-Z
High-Z
Deselected
Standby
X
1)
X
1)
X
1)
X
1)
H
H
High-Z
High-Z
Deselected
Standby
L
H
H
H
L
X
1)
High-Z
High-Z
Output Disabled
Active
L
H
H
H
X
1)
L
High-Z
High-Z
Output Disabled
Active
L
H
L
H
L
H
Dout
High-Z
Lower Byte Read
Active
L
H
L
H
H
L
High-Z
Dout
Upper Byte Read
Active
L
H
L
H
L
L
Dout
Dout
Word Read
Active
L
H
X
1)
L
L
H
Din
High-Z
Lower Byte Write
Active
L
H
X
1)
L
H
L
High-Z
Din
Upper Byte Write
Active
L
H
X
1)
L
L
L
Din
Din
Word Write
Active
Revision 0.2
August 2003
K1S321611C
- 5 -
UtRAM
Preliminary
RECOMMENDED DC OPERATING CONDITIONS
1)
1. T
A
=-40 to 85
C, otherwise specified.
2. Overshoot: Vcc+1.0V in case of pulse width
20ns.
3. Undershoot: -1.0V in case of pulse width
20ns.
4. Overshoot and undershoot are sampled, not 100% tested.
Item
Symbol
Min
Typ
Max
Unit
Supply voltage
Vcc
2.7
2.9
3.1
V
Ground
Vss
0
0
0
V
Input high voltage
V
IH
2.2
-
V
CC
+0.3
2)
V
Input low voltage
V
IL
-0.3
3)
-
0.6
V
CAPACITANCE
1)
(f=1MHz, T
A
=25
C)
1. Capacitance is sampled, not 100% tested.
Item
Symbol
Test Condition
Min
Max
Unit
Input capacitance
C
IN
V
IN
=0V
-
8
pF
Input/Output capacitance
C
IO
V
IO
=0V
-
10
pF
DC AND OPERATING CHARACTERISTICS
Item
Symbol
Test Conditions
Min
Typ
Max
Unit
Input leakage current
I
LI
V
IN
=Vss to Vcc
-1
-
1
A
Output leakage current
I
LO
CS1=V
IH
or CS2=V
IL
or OE=V
IH
or WE=V
IL
or LB=UB=V
IH
,
V
IO
=Vss to Vcc
-1
-
1
A
Average operating current
I
CC1
Cycle time=1
s, 100% duty, I
IO
=0mA, CS1
0.2V, LB
0.2V
or/and UB
0.2V, CS2
V
CC
-
0.2V, V
IN
0.2V or V
IN
V
CC
-
0.2V
-
-
7
mA
I
CC2
Cycle time=Min, I
IO
=0mA
,
100% duty,
CS1=V
IL,
CS2
=
V
IH
LB=V
IL
or/and UB=V
IL
, V
IN
=V
IH
or V
IL
-
-
35
mA
Output low voltage
V
OL
I
OL
= 2.1mA
-
-
0.4
V
Output high voltage
V
OH
I
OH
= -1.0mA
2.4
-
-
V
Standby Current(CMOS)
I
SB1
Other inputs=0~Vcc
1) CS1
V
CC
-0.2V
,
CS2
V
CC
-
0.2V(CS1 controlled) or
2) 0V
CS2
0.2V(CS2 controlled)
-
-
100
A
PRODUCT LIST
Industrial Temperature Products(-40~85
C)
Part Name
Function
K1S321611C-FI70
48-FBGA, 70ns, 2.9V
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