CMOS DRAM
K4E661612E,K4E641612E
Industrial Temperature
This is a family of 4,194,304 x 16 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random
access of memory cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -50 or -60), power consumption(Nor-
mal or Low power) are optional features of this family. All of this family have CAS -before-RAS refresh, RAS-only refresh and Hidden
refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 4Mx16 EDO Mode DRAM family is fabricated
using Samsung
s advanced CMOS process to realize high band-width, low power consumption and high reliability.
Extended Data Out Mode operation
2 CAS Byte/Word Read/Write operation
CAS-before-RAS refresh capability
RAS-only and Hidden refresh capability
Fast parallel test mode capability
Self-refresh capability (L-ver only)
LVTTL(3.3V) compatible inputs and outputs
Early Write or output enable controlled write
JEDEC Standard pinout
Available in Plastic TSOP(II) packages
+3.3V
0.3V power supply
Industrial Temperature operating
( -40~85
C
)
Control
Clocks
Lower
Data out
Buffer
RAS
UCAS
LCAS
W
Vcc
Vss
DQ0
to
DQ7
A0~A12
(A0~A11)*1
A0~A8
(A0~A9)*1
Memory Array
4,194,304 x 16
Cells
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.
4M x 16bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
FUNCTIONAL BLOCK DIAGRAM
Note) *1 : 4K Refresh
S
e
n
s
e
A
m
p
s
&
I
/
O
Upper
Data in
Buffer
Upper
Data out
Buffer
Lower
Data in
Buffer
DQ8
to
DQ15
OE
Row Decoder
Column Decoder
VBB Generator
Refresh Timer
Refresh Control
Refresh Counter
Row Address Buffer
Col. Address Buffer
Part Identification
- K4E661612E-TI/P(3.3V, 8K Ref.)
- K4E641612E-TI/P(3.3V, 4K Ref.)
FEATURES
Refresh Cycles
Part
NO.
Refresh
cycle
Refresh time
Normal
L-ver
K4E661612E*
8K
64ms
128ms
K4E641612E
4K
Unit :
mW
* Access mode & RAS only refresh mode
: 8K cycle/64ms(Normal), 8K cycle/128ms(L-ver.)
CAS-before-RAS & Hidden refresh mode
: 4K cycle/64ms(Normal), 4K cycle/128ms(L-ver.)
Active Power Dissipation
Speed
8K
4K
-45
324
468
-50
288
432
-60
252
396
Performance Range
Speed
t
RAC
t
CAC
t
RC
t
HPC
-45
45ns
12ns
74ns
17ns
-50
50ns
13ns
84ns
20ns
-60
60ns
15ns
104ns
25ns
CMOS DRAM
K4E661612E,K4E641612E
Industrial Temperature
V
CC
DQ0
DQ1
DQ2
DQ3
V
CC
DQ4
DQ5
DQ6
DQ7
N.C
V
CC
W
RAS
N.C
N.C
N.C
N.C
A0
A1
A2
A3
A4
A5
V
CC
V
SS
DQ15
DQ14
DQ13
DQ12
V
SS
DQ11
DQ10
DQ9
DQ8
N.C
V
SS
LCAS
UCAS
OE
N.C
N.C
A12(N.C)*
A11
A10
A9
A8
A7
A6
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
PIN CONFIGURATION
(Top Views)
Pin Name
Pin function
A0 - A12
Address Inputs(8K Product)
A0 - A11
Address Inputs(4K Product)
DQ0 - 15
Data In/Out
V
SS
Ground
RAS
Row Address Strobe
UCAS
Upper Column Address Strobe
LCAS
Lower Column Address Strobe
W
Read/Write Input
OE
Data Output Enable
V
CC
Power(+3.3V)
N.C
No Connection
(400mil TSOP(II))
*(N.C) : N.C for 4K Refresh Product
K4E661612E-T
K4E641612E-T
CMOS DRAM
K4E661612E,K4E641612E
Industrial Temperature
ABSOLUTE MAXIMUM RATINGS
* Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
Parameter
Symbol
Rating
Units
Voltage on any pin relative to V
SS
V
IN,
V
O U T
-0.5 to +4.6
V
Voltage on V
CC
supply relative to V
SS
V
CC
-0.5 to +4.6
V
Storage Temperature
Tstg
-55 to +150
C
Power Dissipation
P
D
1
W
Short Circuit Output Current
I
OS
Address
50
mA
RECOMMENDED OPERATING CONDITIONS
(Voltage referenced to Vss, T
A
= -40 to 85
C)
*1 : Vcc+1.3V at pulse width
15ns which is measured at V
C C
*2 : -1.3 at pulse width
15ns which is measured at V
SS
Parameter
Symbol
Min
Typ
Max
Units
Supply Voltage
V
C C
3.0
3.3
3.6
V
Ground
V
SS
0
0
0
V
Input High Voltage
V
IH
2.0
-
Vcc+0.3
*1
V
Input Low Voltage
V
IL
-0.3
*2
-
0.8
V
DC AND OPERATING CHARACTERISTICS
(Recommended operating conditions unless otherwise noted.)
Parameter
Symbol
Min
Max
Units
Input Leakage Current (Any input 0
V
IN
V
CC
+0.3V,
all other pins not under test=0 Volt)
I
I(L)
-5
5
uA
Output Leakage Current
(Data out is disabled, 0V
V
OUT
V
CC
)
I
O(L)
-5
5
uA
Output High Voltage Level(I
OH
=-2mA)
V
OH
2.4
-
V
Output Low Voltage Level(I
OL
=2mA)
V
OL
-
0.4
V
CMOS DRAM
K4E661612E,K4E641612E
Industrial Temperature
*Note :
I
CC1
, I
CC3
, I
CC4
and I
CC6
are dependent on output loading and cycle rates. Specified values are obtained with the output open.
I
CC
is specified as an average current. In I
CC1
, I
CC3
and I
CC6,
address can be changed maximum once while RAS=V
IL
. In I
CC4
,
address can be changed maximum once within one EDO mode cycle time,
t
HPC
.
DC AND OPERATING CHARACTERISTICS
(Continued)
I
CC1
* : Operating Current (RAS and UCAS, LCAS, Address cycling @
t
R C
=min.)
I
CC2
: Standby Current (RAS=UCAS=LCAS=W=V
IH
)
I
CC3
* : RAS-only Refresh Current (UCAS=LCAS=V
IH
, RAS, Address cycling @
t
RC
=min.)
I
CC4
* : Extended Data Out Mode Current (RAS=V
IL
, UCAS or LCAS, Address cycling @
t
HPC
=min.)
I
CC5
: Standby Current (RAS=UCAS=LCAS=W=V
CC
-0.2V)
I
CC6
* : CAS-Before-RAS Refresh Current (RAS and UCAS or LCAS cycling @
t
R C
=min)
I
CC7
: Battery back-up current, Average power supply current, Battery back-up mode
Input high voltage(V
IH
)=V
C C
-0.2V, Input low voltage(V
IL
)=0.2V, UCAS, LCAS=CAS-before-RAS cycling or 0.2V
W, OE=V
IH
, Address=Don
t care, DQ=Open, T
R C
=31.25us
I
C C S
: Self Refresh Current
RAS=UCAS=LCAS=0.2V, W=OE=A0 ~ A12(A11)=V
CC
-0.2V or 0.2V, DQ0 ~ DQ15=V
CC
-0.2V, 0.2V or Open
Symbol
Power
Speed
Max
Units
K4E661612E
K4E641612E
I
CC1
Don
t care
-45
-50
-60
90
80
70
130
120
110
mA
mA
mA
I
CC2
Normal
L
Don
t care
1
1
1
1
mA
mA
I
CC3
Don
t care
-45
-50
-60
90
80
70
130
120
110
mA
mA
mA
I
CC4
Don
t care
-45
-50
-60
100
90
80
100
90
80
mA
mA
mA
I
CC5
Normal
L
Don
t care
0.5
200
0.5
200
mA
uA
I
CC6
Don
t care
-45
-50
-60
130
120
110
130
120
110
mA
mA
mA
I
CC7
L
Don
t care
350
350
uA
I
CCS
L
Don
t care
350
350
uA
CMOS DRAM
K4E661612E,K4E641612E
Industrial Temperature
CAPACITANCE
(T
A
=25
C, V
CC
=3.3V, f=1MHz)
Parameter
Symbol
Min
Max
Units
Input capacitance [A0 ~ A12]
C
IN1
-
5
pF
Input capacitance [RAS, UCAS, LCAS, W, OE]
C
IN2
-
7
pF
Output capacitance [DQ0 - DQ15]
C
DQ
-
7
pF
AC CHARACTERISTICS
(-40
C
T
A
85
C, See note 2)
Test condition : V
C C
=3.3V
0.3V, Vih/Vil=2.2/0.7V, Voh/Vol=2.0/0.8V
Parameter
Symbol
-45
-50
-60
Unit
s
Note
Min
Max
Min
Max
Min
Max
Random read or write cycle time
t
R C
74
84
104
ns
Read-modify-write cycle time
t
RWC
101
113
138
ns
Access time from RAS
t
RAC
45
50
60
ns
3,4,10
Access time from CAS
t
CAC
12
13
15
ns
3,4,5
Access time from column address
t
AA
23
25
30
ns
3,10
CAS to output in Low-Z
t
CLZ
3
3
3
ns
3
Output buffer turn-off delay from CAS
t
CEZ
3
13
3
13
3
13
ns
6,20
OE to output in Low-Z
t
OLZ
3
3
3
ns
3
Transition time (rise and fall)
t
T
1
50
1
50
1
50
ns
2
RAS precharge time
t
R P
25
30
40
ns
RAS pulse width
t
RAS
45
10K
50
10K
60
10K
ns
RAS hold time
t
RSH
8
8
10
ns
CAS hold time
t
CSH
35
38
40
ns
CAS pulse width
t
CAS
7
5K
8
10K
10
10K
ns
RAS to CAS delay time
t
RCD
11
33
11
37
14
45
ns
4
RAS to column address delay time
t
RAD
9
22
9
25
12
30
ns
10
CAS to RAS precharge time
t
CRP
5
5
5
ns
Row address set-up time
t
ASR
0
0
0
ns
Row address hold time
t
RAH
7
7
10
ns
Column address set-up time
t
ASC
0
0
0
ns
13
Column address hold time
t
CAH
7
7
10
ns
13
Column address to RAS lead time
t
RAL
23
25
30
ns
Read command set-up time
t
RCS
0
0
0
ns
Read command hold time referenced to CAS
t
RCH
0
0
0
ns
8
Read command hold time referenced to RAS
t
RRH
0
0
0
ns
8
Write command hold time
t
WCH
7
7
10
ns
Write command pulse width
t
W P
6
7
10
ns
Write command to RAS lead time
t
RWL
8
8
10
ns
Write command to CAS lead time
t
CWL
7
7
10
ns
16
Data set-up time
t
D S
0
0
0
ns
9,19
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