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Электронный компонент: K6X0808C1D-GF70

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CMOS SRAM
K6X0808C1D Family
Revision 1.0
December 2003
1
Document Title
32Kx8 bit Low Power CMOS Static RAM
Revision History
Revision No.
0.0
1.0
Remark
Preliminary
Final
History
Initial draft
Finalized
- Changed I
CC
from 10mA to 5mA
- Changed I
CC1
from 8mA to 7mA
- Changed I
CC2
from 35mA to 25mA
- Changed I
SB
from 3mA to 0.4mA
- Changed I
DR
for K6X0808C1D-F 15
A to 10
A
- Changed I
DR
for K6X0808C1D-Q 25
A to 20
A
- Errata correction
Draft Data
October 09, 2002
December 16, 2003
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserves the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions. If you have any questions, please contact the SAMSUNG branch offices.
CMOS SRAM
K6X0808C1D Family
Revision 1.0
December 2003
2
32Kx8 bit Low Power full CMOS Static RAM
GENERAL DESCRIPTION
The K6X0808C1D families are fabricated by SAMSUNG
s
advanced CMOS process technology. The families support
verious operating temperature ranges and have various pack-
age types for user flexibility of system design. The families
also support low data retention voltage for battery back-up
operation with low data retention current.
FEATURES
Process Technology: Full CMOS
Organization: 32K x 8
Power Supply Voltage: 4.5~5.5V
Low Data Retention Voltage: 2V(Min)
Three state output and TTL Compatible
Package Type: 28-DIP-600B, 28-SOP-450,
28-TSOP1-0813.4F/R
PRODUCT FAMILY
1. The parameters are tested with 50pF test load
Product Family Operating Temperature Vcc Range
Speed
Power Dissipation
PKG Type
Standby
(I
SB1
, Max)
Operating
(I
CC2,
Max)
K6X0808C1D-F
Industrial(-40~85
C)
4.5~5.5V
55
1)
/70ns
15
A
25mA
28-DIP-600B, 28-SOP-450,
28-TSOP1-0813.4F/R
K6X0808C1D-Q
Automotive(-40~125
C)
25
A
28-SOP-450, 28-TSOP1-0813.4F
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.
PIN DESCRIPTION
Pin Name
Function
Pin Name
Function
CS
Chip Select Input
I/O
1
~I/O
8
Data Inputs/Outputs
OE
Output Enable Input
Vcc
Power
WE
Write Enable Input
Vss
Ground
A
0
~A
14
Address Inputs
NC
No connect
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
VSS
VCC
WE
A13
A8
A9
A11
OE
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
28-DIP
28-SOP
15
16
28
27
26
25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A11
A9
A8
A13
WE
VCC
A3
A14
A12
A7
A6
A5
A4
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
VSS
I/O3
I/O2
I/O1
A0
A1
A2
28-TSOP
Type1 - Forward
1
2
3
4
5
6
7
8
9
10
11
12
13
14
27
26
28
25
24
23
22
21
20
19
18
17
16
15
OE
28-TSOP
A11
A9
A8
A13
WE
VCC
A3
A14
A12
A7
A6
A5
A4
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
VSS
I/O3
I/O2
I/O1
A0
A1
A2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
27
26
28
25
24
23
22
21
20
19
18
17
16
15
OE
Type1 - Reverse
FUNCTIONAL BLOCK DIAGRAM
Precharge circuit.
Memory array
I/O Circuit
Column select
Clk gen.
Row
select
I/O
1
Data
cont
Data
cont
I/O
8
CS
WE
OE
Control
logic
Row
Addresses
Column Addresses
CMOS SRAM
K6X0808C1D Family
Revision 1.0
December 2003
3
PRODUCT LIST
Industrial Temp. Products(-40~85
C)
Automotive Temp. Products(-40~125
C)
Part Name
Function
Part Name
Function
K6X0808C1D-DF55
K6X0808C1D-DF70
K6X0808C1D-GF55
K6X0808C1D-GF70
K6X0808C1D-TF55
K6X0808C1D-TF70
K6X0808C1D-RF55
K6X0808C1D-RF70
28-DIP, 55ns, LL Pwr
28-DIP, 70ns, LL Pwr
28-SOP, 55ns, LL Pwr
28-SOP, 70ns, LL Pwr
28-TSOP-F, 55ns, LL Pwr
28-TSOP-F, 70ns, LL Pwr
28-TSOP-R, 55ns, LL Pwr
28-TSOP-R, 70ns, LL Pwr
K6X0808C1D-GQ55
K6X0808C1D-GQ70
K6X0808C1D-TQ55
K6X0808C1D-TQ70
28-SOP, 55ns, L Pwr
28-SOP, 70ns, L Pwr
28-TSOP-F, 55ns, L Pwr
28-TSOP-F, 70ns, L Pwr
ABSOLUTE MAXIMUM RATINGS
1)
1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be
restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Item
Symbol
Ratings
Unit
Remark
Voltage on any pin relative to Vss
V
IN
,V
OUT
-0.5 to V
CC+
0.5V(Max. 7.0V)
V
-
Voltage on Vcc supply relative to Vss
V
CC
-0.3 to 7.0
V
-
Power Dissipation
P
D
1.0
W
-
Storage temperature
T
STG
-65 to 150
C
-
Operating Temperature
T
A
-40 to 85
C
K6X0808C1D-F
-40 to 125
C
K6X0808C1D-Q
FUNCTIONAL DESCRIPTION
1. X means don
t care (Must be in high or low states)
CS
OE
WE
I/O
Mode
Power
H
X
1)
X
1)
High-Z
Deselected
Standby
L
H
H
High-Z
Output Disabled
Active
L
L
H
Dout
Read
Active
L
X
1)
L
Din
Write
Active
CMOS SRAM
K6X0808C1D Family
Revision 1.0
December 2003
4
RECOMMENDED DC OPERATING CONDITIONS
1)
Note:
1. Industrial Product: T
A
=-40 to 85
C, Otherwise specified
Automotive Product: T
A
=-40 to 125
C, Otherwise specified
2. Overshoot: Vcc+3.0V in case of pulse width
30ns.
3. Undershoot: -3.0V in case of pulse width
30ns.
4. Overshoot and undershoot are sampled, not 100% tested.
Item
Symbol
Min
Typ
Max
Unit
Supply voltage
Vcc
4.5
5.0
5.5
V
Ground
Vss
0
0
0
V
Input high voltage
V
IH
2.2
-
Vcc+0.5
2)
V
Input low voltage
V
IL
-0.5
3)
-
0.8
V
CAPACITANCE
1
)
(f=1MHz, TA=25
C)
1. Capacitance is sampled, not 100% tested
Item
Symbol
Test Condition
Min
Max
Unit
Input capacitance
C
IN
V
IN
=0V
-
8
pF
Input/Output capacitance
C
IO
V
IO
=0V
-
10
pF
DC AND OPERATING CHARACTERISTICS
Item
Symbol
Test Conditions
Min
Typ
Max
Unit
Input leakage current
I
LI
V
IN
=Vss to Vcc
-1
-
1
A
Output leakage current
I
LO
CS=V
IH
or OE=V
IH
or WE=V
IL
, V
IO
=V
SS
to Vcc
-1
-
1
A
Operating power supply current
I
CC
I
IO
=0mA, CS=V
IL,
V
IN
=V
IH
or V
IL
, Read
-
-
5
mA
Average operating current
I
CC1
Cycle time=1
s, 100% duty, I
IO
=0mA, CS
0.2V,
V
IN
0.2V
IN
Vcc -0.2V
-
-
7
mA
I
CC2
Cycle time=Min,100% duty, I
IO
=0mA, CS=V
IL,
V
IN
=V
IH
or V
IL
-
-
25
mA
Output low voltage
V
OL
I
OL
=2.1mA
-
-
0.4
V
Output high voltage
V
OH
I
OH
=-1.0mA
2.4
-
-
V
Standby Current(TTL)
I
SB
CS=V
IH
, Other inputs=V
IH
or V
IL
-
-
0.4
mA
Standby Current (CMOS)
I
SB1
CS
Vcc-0.2V, Other inputs=0~Vcc
K6X0808C1D-F
-
-
15
A
K6X0808C1D-Q
-
-
25
A
CMOS SRAM
K6X0808C1D Family
Revision 1.0
December 2003
5
C
L
1)
1. Including scope and jig capacitance
AC OPERATING CONDITIONS
TEST CONDITIONS
(Test Load and Test Input/Output Reference)
Input pulse level: 0.8 to 2.4V
Input rising and falling time: 5ns
Input and output reference voltage: 1.5V
Output load (See right): C
L
=100pF+1TTL
C
L
=50pF+1TTL
AC CHARACTERISTICS
(Vcc=4.5~5.5V, Commercial product: T
A
=0 to 70
C, Industrial product: T
A
=-40 to 85
C)
1. The parameter is tested with 50pF test load.
Parameter List
Symbol
Speed Bins
Units
55
1)
ns
70ns
Min
Max
Min
Max
Read
Read cycle time
t
RC
55
-
70
-
ns
Address access time
t
AA
-
55
-
70
ns
Chip select to output
t
CO
-
55
-
70
ns
Output enable to valid output
t
OE
-
25
-
35
ns
Chip select to low-Z output
t
LZ
10
-
10
-
ns
Output enable to low-Z output
t
OLZ
5
-
5
-
ns
Chip disable to high-Z output
t
HZ
0
20
0
30
ns
Output disable to high-Z output
t
OHZ
0
20
0
30
ns
Output hold from address change
t
OH
10
-
10
-
ns
Write
Write cycle time
t
WC
55
-
70
-
ns
Chip select to end of write
t
CW
45
-
60
-
ns
Address set-up time
t
AS
0
-
0
-
ns
Address valid to end of write
t
AW
45
-
60
-
ns
Write pulse width
t
WP
40
-
50
-
ns
Write recovery time
t
WR
0
-
0
-
ns
Write to output high-Z
t
WHZ
0
20
0
25
ns
Data to write time overlap
t
DW
25
-
30
-
ns
Data hold from write time
t
DH
0
-
0
-
ns
End write to output low-Z
t
OW
5
-
5
-
ns
DATA RETENTION CHARACTERISTICS
Item
Symbol
Test Condition
Min
Typ
Max
Unit
Vcc for data retention
V
DR
CS
Vcc-0.2V
2.0
-
5.5
V
Data retention current
I
DR
Vcc=3.0V, CS
Vcc-0.2V
K6X0808C1D-F
-
-
10
A
K6X0808C1D-Q
-
-
20
Data retention set-up time
t
SDR
See data retention waveform
0
-
-
ms
Recovery time
t
RDR
5
-
-