CMOS SRAM
K6X0808T1D Family
Revision 1.0
December 2003
1
Document Title
32Kx8 bit Low Power CMOS Static RAM
Revision History
Revision No.
0.0
0.1
0.2
1.0
Remark
Preliminary
Preliminary
Preliminary
Final
History
Initial draft
revised
- errata : corrected 28-SOP-525 to 28-SOP-450 in pakage type
revised
- Added commercial product.
Finalized
- Changed I
CC
from 3mA to 2mA
- Changed I
CC2
from 25mA to 20mA
- Changed I
SB
from 3mA to 0.4mA
- Changed I
SB1
for K6X0808T1D-F from 10
A to 6
A
- Changed I
SB1
for K6X0808T1D-F from 20
A to 10
A
- Changed I
DR
for K6X0808T1D-F 10
A to 6
A
- Changed I
DR
for K6X0808T1D-Q 20
A to 10
A
- Errata correction
Draft Data
October 09, 2002
November 08, 2002
March 27, 2003
December 16, 2003
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserves the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions. If you have any questions, please contact the SAMSUNG branch offices.
CMOS SRAM
K6X0808T1D Family
Revision 1.0
December 2003
2
32Kx8 bit Super Low Power and Low Voltage full CMOS Static RAM
GENERAL DESCRIPTION
The K6X0808T1D families are fabricated by SAMSUNG
s
advanced CMOS process technology. The families support
verious operating temperature ranges and have various pack-
age types for user flexibility of system design. The families
also support low data retention voltage for battery back-up
operation with low data retention current.
FEATURES
Process Technology: Full CMOS28-
Organization: 32K x 8
Power Supply Voltage: 2.7~3.6V
Low Data Retention Voltage: 1.5V(Min)
Three state outputs
Package Type: 28-SOP-450, 28-TSOP1-0813.4F/R
PRODUCT FAMILY
1. The parameters are tested with 30pF test load
Product Family
Operating Temperature Vcc Range
Speed
Power Dissipation
PKG Type
Standby
(I
SB1
, Max)
Operating
(I
CC2,
Max)
K6X0808T1D-B
Industrial(0~70
C)
2.7~3.6V
70
1)
/85ns
6
A
25mA
28-SOP-450, 28-TSOP1-0813.4F/R
K6X0808T1D-F
Industrial(-40~85
C)
K6X0808T1D-Q
Automotive(-40~125
C)
10
A
28-SOP-450, 28-TSOP1-0813.4F
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.
FUNCTIONAL BLOCK DIAGRAM
Precharge circuit.
Memory array
I/O Circuit
Column select
Clk gen.
Row
select
I/O
1
Data
cont
Data
cont
I/O
8
CS
1
WE
OE
Control
logic
Row
Addresses
Column Addresses
PIN DESCRIPTION
Pin Name
Function
Pin Name
Function
A
0
~A
14
Address Inputs
I/O
1
~I/O
8
Data Inputs/Outputs
WE
Write Enable Input
Vcc
Power
CS
Chip Select Input
Vss
Ground
OE
Output Enable Input
NC
No connect
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
VSS
VCC
WE
A13
A8
A9
A11
OE
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
28-SOP
15
16
28
27
26
25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A11
A9
A8
A13
WE
VCC
A3
A14
A12
A7
A6
A5
A4
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
VSS
I/O3
I/O2
I/O1
A0
A1
A2
28-TSOP
Type1 - Forward
1
2
3
4
5
6
7
8
9
10
11
12
13
14
27
26
28
25
24
23
22
21
20
19
18
17
16
15
OE
28-TSOP
A11
A9
A8
A13
WE
VCC
A3
A14
A12
A7
A6
A5
A4
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
VSS
I/O3
I/O2
I/O1
A0
A1
A2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
27
26
28
25
24
23
22
21
20
19
18
17
16
15
OE
Type1 - Reverse
CMOS SRAM
K6X0808T1D Family
Revision 1.0
December 2003
3
PRODUCT LIST
Commercial Temp. Products(0~70
C)
Industrial Temp. Products(-40~85
C)
Atomotive Temp. Products(-40~125
C)
Part Name
Function
Part Name
Function
Part Name
Function
K6X0808T1D-GB70
K6X0808T1D-GB85
K6X0808T1D-YB70
K6X0808T1D-YB85
K6X0808T1D-NB70
K6X0808T1D-NB85
28-SOP, 70ns, LL
28-SOP, 85ns, LL
28-sTSOP-F, 70ns, LL
28-sTSOP-F, 85ns, LL
28-sTSOP-R, 70ns, LL
28-sTSOP-R, 85ns, LL
K6X0808T1D-GF70
K6X0808T1D-GF85
K6X0808T1D-YF70
K6X0808T1D-YF85
K6X0808T1D-NF70
K6X0808T1D-NF85
28-SOP, 70ns, LL
28-SOP, 85ns, LL
28-sTSOP-F, 70ns, LL
28-sTSOP-F, 85ns, LL
28-sTSOP-R, 70ns, LL
28-sTSOP-R, 85ns, LL
K6X0808T1D-GQ70
K6X0808T1D-GQ85
K6X0808T1D-YQ70
K6X0808T1D-YQ85
28-SOP, 70ns, L
28-SOP, 85ns, L
28-sTSOP-F, 70ns, L
28-sTSOP-F, 85ns, L
ABSOLUTE MAXIMUM RATINGS
1)
1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be
restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Item
Symbol
Ratings
Unit
Remark
Voltage on any pin relative to Vss
V
IN
,V
OUT
-0.2 to V
CC
+0.3V(Max. 3.9V)
V
-
Voltage on Vcc supply relative to Vss
V
CC
-0.2 to 3.9
V
-
Power Dissipation
P
D
1.0
W
-
Storage temperature
T
STG
-65 to 150
C
-
Operating Temperature
T
A
-40 to 85
C
K6X0808T1D-F
-40 to 125
C
K6X0808T1D-Q
FUNCTIONAL DESCRIPTION
1. X means don't care (Must be in high or low states)
CS
OE
WE
I/O
Mode
Power
H
X
1)
X
1)
High-Z
Deselected
Standby
L
H
H
High-Z
Output Disabled
Active
L
L
H
Dout
Read
Active
L
X
1)
L
Din
Write
Active
CMOS SRAM
K6X0808T1D Family
Revision 1.0
December 2003
4
RECOMMENDED DC OPERATING CONDITIONS
1)
Note:
1. Industrial Product: T
A
=-40 to 85
C, Otherwise specified
A
utomotive Product: T
A
=-40 to 125
C, Otherwise specified
2. Overshoot: Vcc+3.0V in case of pulse width
30ns.
3. Undershoot: -3.0V in case of pulse width
30ns.
4. Overshoot and undershoot are sampled, not 100% tested.
Item
Symbol
Min
Typ
Max
Unit
Supply voltage
Vcc
2.7
3.0/3.3
3.6
V
Ground
Vss
0
0
0
V
Input high voltage
V
IH
2.2
-
Vcc+0.2
2)
V
Input low voltage
V
IL
-0.2
3)
-
0.6
V
CAPACITANCE
1
)
(f=1MHz, TA=25
C)
1. Capacitance is sampled, not 100% tested
Item
Symbol
Test Condition
Min
Max
Unit
Input capacitance
C
IN
V
IN
=0V
-
8
pF
Input/Output capacitance
C
IO
V
IO
=0V
-
10
pF
DC AND OPERATING CHARACTERISTICS
Item
Symbol
Test Conditions
Min Typ Max Unit
Input leakage current
I
LI
V
IN
=Vss to Vcc
-1
-
1
A
Output leakage current
I
LO
CS=V
IH
or OE=V
IH
or WE=V
IL
, V
IO
=V
SS
to Vcc
-1
-
1
A
Operating power supply current
I
CC
I
IO
=0mA, CS=V
IL,
V
IN
=V
IH
or V
IL
, Read
-
-
2
mA
Average operating current
I
CC1
Cycle time=1
s, 100% duty, I
IO
=0mA, CS
0.2V,
V
IN
0.2V
IN
Vcc -0.2V
-
-
3
mA
I
CC2
Cycle time=Min,100% duty, I
IO
=0mA, CS=V
IL,
V
IN
=V
IH
or V
IL
-
-
20
mA
Output low voltage
V
OL
I
OL
=2.1mA
-
-
0.4
V
Output high voltage
V
OH
I
OH
=-1.0mA
2.4
-
-
V
Standby Current(TTL)
I
SB
CS=V
IH
, Other inputs=V
IH
or V
IL
-
-
0.3
mA
Standby Current(CMOS)
I
SB1
CS
Vcc-0.2V, Other inputs=0~Vcc
K6X0808T1D-F
-
-
6
A
K6X0808T1D-Q
-
-
10
A
CMOS SRAM
K6X0808T1D Family
Revision 1.0
December 2003
5
AC CHARACTERISTICS
(V
CC
=2.7~3.6V, Industrial product:T
A
=-40 to 85
C, Automotive product:T
A
=-40 to 125
C
)
Parameter List
Symbol
Speed Bins
Units
70ns
85ns
Min
Max
Min
Max
Read
Read Cycle Time
t
RC
70
-
85
-
ns
Address Access Time
t
AA
-
70
-
85
ns
Chip Select to Output
t
CO
-
70
-
85
ns
Output Enable to Valid Output
t
OE
-
35
-
40
ns
Chip Select to Low-Z Output
t
LZ
10
-
10
-
ns
Output Enable to Low-Z Output
t
OLZ
5
-
5
-
ns
Chip Disable to High-Z Output
t
HZ
0
25
0
25
ns
Output Disable to High-Z Output
t
OHZ
0
25
0
25
ns
Output Hold from Address Change
t
OH
10
-
15
-
ns
Write
Write Cycle Time
t
WC
70
-
85
-
ns
Chip Select to End of Write
t
CW
60
-
70
-
ns
Address Set-up Time
t
AS
0
-
0
-
ns
Address Valid to End of Write
t
AW
60
-
70
-
ns
Write Pulse Width
t
WP
50
-
60
-
ns
Write Recovery Time
t
WR
0
-
0
-
ns
Write to Output High-Z
t
WHZ
0
25
0
30
ns
Data to Write Time Overlap
t
DW
25
-
35
-
ns
Data Hold from Write Time
t
DH
0
-
0
-
ns
End Write to Output Low-Z
t
OW
5
-
5
-
ns
C
L
1)
1. Including scope and jig capacitance
AC OPERATING CONDITIONS
TEST CONDITIONS
( Test Load and Input/Output Reference)
Input pulse level: 0.4 to 2.2V
Input rising and falling time: 5ns
Input and output reference voltage:1.5V
Output load(see right): C
L
=100pF+1TTL
C
L
=30pF+1TTL
DATA RETENTION CHARACTERISTICS
Item
Symbol
Test Condition
Min
Typ
Max
Unit
Vcc for data retention
V
DR
CS
1
Vcc-0.2V
2.0
-
3.6
V
Data retention current
I
DR
Vcc=3.0V, CS
1
Vcc-0.2V
K6X0808T1D-F
-
-
6
A
K6X0808T1D-Q
10
A
Data retention set-up time
t
SDR
See data retention waveform
0
-
-
ms
Recovery time
t
RDR
5
-
-
CMOS SRAM
K6X0808T1D Family
Revision 1.0
December 2003
6
Address
Data Out
Previous Data Valid
Data Valid
TIMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE(1)
(Address Controlled
,
CS=OE=V
IL
, WE=V
IH
)
t
AA
t
RC
t
OH
TIMING WAVEFORM OF READ CYCLE(2)
(WE=V
IH
)
Data Valid
High-Z
CS
Address
OE
Data out
NOTES (READ CYCLE)
1.
t
HZ
and
t
OHZ
are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage
levels.
2. At any given temperature and voltage condition,
t
HZ
(Max.) is less than
t
LZ
(Min.) both for a given device and from device to device
interconnection.
t
OH
t
AA
t
OLZ
t
LZ
t
OHZ
t
HZ
t
RC
t
OE
t
CO
CMOS SRAM
K6X0808T1D Family
Revision 1.0
December 2003
7
TIMING WAVEFORM OF WRITE CYCLE(2)
(CS
Controlled)
Address
CS
t
WC
t
WR(4)
t
AS(3)
t
DW
t
DH
Data Valid
WE
Data in
Data out
High-Z
High-Z
t
CW(2)
t
WP(1)
t
AW
NOTES (WRITE CYCLE)
1. A write occurs during the overlap of a low CS and a low WE. A write begins at the latest transition among CS going Low and WE
going low : A write end at the earliest transition among CS going high and WE going high, t
WP
is measured from the begining of write
to the end of write.
2. t
CW
is measured from the CS going low to the end of write.
3. t
AS
is measured from the address valid to the beginning of write.
4. t
WR
is measured from the end or write to the address change. t
WR
applied in case a write ends as CS or WE going high.
TIMING WAVEFORM OF WRITE CYCLE(1)
(WE Controlled)
Address
CS
t
CW(2)
t
WR(4)
t
WP(1)
t
DW
t
DH
t
OW
t
WHZ
Data Undefined
Data Valid
WE
Data in
Data out
t
WC
t
AW
t
AS(3)
DATA RETENTION WAVE FORM
CS controlled
V
CC
3.0V/2.7V
2.2V
V
DR
CS
GND
Data Retention Mode
CS
V
CC
- 0.2V
t
SDR
t
RDR
CMOS SRAM
K6X0808T1D Family
Revision 1.0
December 2003
8
PACKAGE DIMENSIONS
Units: millimeter(inch)
28 PIN PLASTIC SMALL OUTLINE PACKAGE(450mil)
0~8
#28
11.81
0.30
0.465
0.012
18.29
0.20
0.720
0.008
MAX
18.69
0.736
MAX
2.59
0.20
0.102
0.008
3.00
0.118
MIN
0.002
0.05
0.004 MAX
0.10 MAX
#15
0.41
0.10
0.016
0.004
#1
#14
0.89
( )
0.035
1
1
.
4
3
0
.
4
5
0
8.38
0.20
0.330
0.008
1.02
0.20
0.040
0.008
+0.10
0.15
-0.05
+0.004
0.006
-0.002
1.27
0.050
CMOS SRAM
K6X0808T1D Family
Revision 1.0
December 2003
9
PACKAGE DIMENSIONS
28 PIN THIN SMALL OUTLINE PACKAGE TYPE1 (0813.4F)
#28
1.00
0.10
0.039
0.004
M
A
X
8
.
4
0
0
.
3
3
1
0
.
0
0
4
M
A
X
0
.
1
0
M
A
X
#1
13.40
0.20
0.528
0.008
#15
#14
+0.10
0.20
-0.05
+0.004
0.008
-0.002
0.55
0.0217
0.425
( )
0.017
MIN
0.05
0.002
MAX
1.20
0.047
8
.
0
0
0
.
3
1
5
#28
1.00
0.10
0.039
0.004
M
A
X
8
.
4
0
0
.
3
3
1
0
.
0
0
4
M
A
X
0
.
1
0
M
A
X
#1
0.50
( )
0.020
11.80
0.10
0.465
0.004
0.45 ~0.75
0.018 ~0.030
13.40
0.20
0.528
0.008
#15
#14
+0.10
0.15
-0.05
+0.004
0.006
-0.002
0~8
0.425
( )
0.017
MIN
0.05
0.002
MAX
1.20
0.047
8
.
0
0
0
.
3
1
5
TYP
0.25
0.010
0.55
0.0217
+0.10
0.20
-0.05
+0.004
0.008
-0.002
28 PIN THIN SMALL OUTLINE PACKAGE TYPE1 (0813.4R)
0.50
( )
0.020
11.80
0.10
0.465
0.004
0.45 ~0.75
0.018 ~0.030
+0.10
0.15
-0.05
+0.004
0.006
-0.002
0~8
TYP
0.25
0.010
Units: millimeter(inch)
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