S3C8847/C8849/P8849
PRODUCT OVERVIEW
1-1
1
PRODUCT OVERVIEW
SAM87 PRODUCT FAMILY
Samsung's SAM87 family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide
range of integrated peripherals, and various mask-programmable ROM sizes. Important CPU features include:
-- Efficient register-oriented architecture
-- Selectable CPU clock sources
-- Release of Idle and Stop power-down modes by interrupt
-- Built-in basic timer circuit with watchdog function
A sophisticated interrupt structure recognizes up to eight interrupt levels. Each level can have one or more
interrupt sources and vectors. Fast interrupt processing (within a minimum of six CPU clocks) can be assigned to
specific interrupt levels.
S3C8847/C8849/P8849 MICROCONTROLLERS
The S3C8847 microcontroller has a 24-Kbyte on-chip program memory and the S3C8849 has a 32-Kbyte. Both
chips have a 272-byte general-purpose internal register file. The interrupt structure has nine interrupt sources
with nine interrupt vectors. The CPU recognizes seven interrupt priority levels.
Using a modular design approach, the following peripherals were integrated with the SAM87 core to make the
S3C8847/C8849/P8849 microcontrollers suitable for use in color television and other types of screen display
applications:
-- Four programmable I/O ports (26 pins total: 16 general-purpose I/O pins; 10 n-channel, open-drain
output pins)
-- 4-bit resolution A/D converter (4 channels)
-- 14-bit PWM output (Two channels: push-pull type, open-drain type)
-- Basic timer (BT) with watchdog timer function
-- One 8-bit timer/counter (T0) with interval timer and PWM mode
-- One 8-bit general-purpose timer/counter (TA) with prescalers
-- On-screen display (OSD) with a wide range of programmable features, including halftone control
signal output
The S3C8847 and the S3C8849 are available in versatile 42-pin SDIP package.
OTP
The S3C8847/C8849 microcontrollers are also available in OTP (One Time Programmable) version, named the
S3P8849. The S3P8849 microcontroller has an on-chip 32-Kbyte one-time-programmable EPROM instead of a
masked ROM. The KS88P8432 is comparable to the S3C8847/C8849, both in function and pin configuration.
PRODUCT OVERVIEW
S3C8847/C8849/P8849
1-2
FEATURES
CPU
SAM87 CPU core
Memory
24-Kbyte (S3C8847) or 32-Kbyte (S3C8849)
internal program memory
272-byte general-purpose register area
Instruction Set
78 instructions
IDLE and STOP instructions added for power-
down modes
Instruction Execution Time
750 ns (minimum) with an 8 MHz CPU clock
Interrupts
9 interrupt sources with 9 vectors
7 interrupt levels
Fast interrupt processing for select levels
General I/O
Four I/O ports (26 pins total)
Six open-drain pins for up to 6 V loads
Four open-drain pins for up to 5 V loads
8-Bit Basic Timer
Three selectable internal clock frequencies
Watchdog or oscillation stabilization function
Timer/Counters
One 8-bit timer/counter (T0) with three internal
clocks or an external clock and interval timer
mode or PWM mode.
One general-purpose 8-bit timer/counters with
interval timer mode (timer A)
A/D Converter
Four analog input pins; 4-bit resolution
3.125 s conversion time (8 MHz CPU clock)
Pulse Width Modulation Module
14-bit PWM with two-channel output (push-pull
type, open-drain type)
8-bit PWM with four-channel, push-pull and open-
drain
PWM counter and data capture input pin
Frequency: 5.859 kHz to 23.437 kHz with a 6
MHz CPU clock
On-Screen Display (OSD)
Video RAM: 252
13-bits
Character generator ROM: 384
18
16-bits
(384 display characters; fixed; 2, variable; 382)
252 display positions (12 rows
21 columns)
16-dot
18-dot character resolution
16 different character sizes
Eight character colors
Vertical direction fade-in/fade-out control
Eight colors for character and frame background
Halftone control signal output; selectable for
individual characters
Synchronous polarity selector for H-sync and
V-sync input
Oscillator Frequency
5 MHz to 8 MHz external crystal oscillator
Maximum 8 MHz CPU clock
Operating Temperature Range
20
C to + 85
C
Operating Voltage Range
4.5 V to 5.5 V
Package Type
42-pin SDIP
S3C8847/C8849/P8849
PRODUCT OVERVIEW
1-3
BLOCK DIAGRAM
P0.0 - P0.7
RESET
P1.0 - P1.7
SAM87 Bus
SAM87 Bus
Port 0
Port 1
CAPA
Vred
Vgreen
Vblue
Vblank
OSDHT
H-sync
V-sync
Test
OSCIN
OSCOUT
INT0 - INT3
SAM87 CPU
XIN
XOUT
ADC0
ADC1
Port 2
P2.0 - P2.7
Port 3
P3.0 - P3.1
Port I/O and Interrupt
Control
24/32-KByte
ROM
272-Byte Register
File
Timer 0
Timer A
PWM
Block
PWM
Counter
and Data
Capture
14-Bit
PWM
On-
Screen
Display
4-Bit
ADC
L-C Osc
Main
Osc
8-Bit
PWM
PWM0
PWM1
PWM3
PWM5
PWM2
PWM4
TO
T0CK
ADC2
ADC3
Figure 1-1. Block Diagram
PRODUCT OVERVIEW
S3C8847/C8849/P8849
1-4
PIN ASSIGNMENTS
P2.5/PWM0
P2.1/PWM1
P2.2/PWM2
P2.3/PWM3
P2.4/PWM4
P2.0/PWM5
P2.6/T0
P1.7/T0CK
P3.0/ADC0
P3.1/ADC1
P0.6/ADC2
P0.7/ADC3
TEST
P1.0/INT0
P1.1/INT1
P1.2/INT2
P1.3/INT3
P1.4
P1.5
P1.6
P2.7/OSDHT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
P0.0
P0.1
P0.2
P0.3
P0.4
V
SS2
CAPA
P0.5
V
DD
RESET
X
OUT
X
IN
V
SS1
OSC
OUT
OSC
IN
V-sync
H-sync
Vblank
Vred
Vgreen
Vblue
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
S3C8847/C8849
42-SDIP
(Top View)
Figure 1-2. S3C8847/C8849/P8849 Pin Assignment Diagram
S3C8847/C8849/P8849
PRODUCT OVERVIEW
1-5
PIN DESCRIPTIONS
Table 1-1. S3C8847/C8849/P8849 Pin Descriptions
Pin Name
Pin
Type
Pin Description
Circuit
Type
Pin
Numbers
Share
Pins
P0.0P0.3
I/O
General I/O port (4-bit), configurable for
digital input or n-channel open-drain, push-
pull output.
Pins can withstand up to 5 V loads.
2
3942
(see pin
description)
P0.4P0.5
General I/O port (2-bit), configurable for
digital input or push-pull output.
3
38, 35
P0.6P0.7
General I/O port (2-bit), configurable for
digital input or n-channel open-drain output.
P0.6P0.7 can withstand up to 5 V loads.
Multiplexed for alternative use as external
inputs, ADC2ADC3.
6
1112
ADC2ADC3
P1.0P1.3
I/O
General I/O port (4-bit), configurable for
digital input or n-channel open-drain output.
P1.0P1.3 can withstand up to 6 V loads.
Multiplexed for alternative use as external
interrupt inputs, INT0INT3.
7
1417
INT0INT3
P1.4P1.5
General I/O port (2-bit), configurable for
digital input or n-channel open-drain output.
P1.4P1.5 can withstand up to 6 V loads.
High current port(10mA)
5
1819
P1.6P1.7
General I/O port (2-bit), configurable for
digital input or push-pull output.
Each pin has an alternative function.
P1.7: T0CK (Timer 0 clock input)
3
20, 8
T0CK
P2.0P2.7
I/O
General I/O port (8-bit). Input/output mode
or n-channel open-drain, push-pull output
mode are software configurable. Pins can
withstand up to 5 V loads.
Each pin has an alternative function.
P2.0: PWM5 (8-bit PWM output)
P2.1: PWM1 (14-bit PWM output)
P2.2: PWM2 (8-bit PWM output)
P2.3: PWM3 (8-bit PWM output)
P2.4: PWM4 (8-bit PWM output)
P2.5: PWM0 (14-bit PWM output)
P2.6: T0 (Timer 0 PWM and interval output)
P2.7: OSDHT (Halftone signal output)
2
17, 21
PWM0
PWM5
T0, OSDHT
P3.0P3.1
I/O
General I/O port (2-bit), configurable for
digital input or n-channel open-drain output.
P3.0P3.1 can withstand up to 5 V loads.
Multiplexed for alternative use as external
inputs ADC0ADC1.
6
910
ADC0ADC1
PRODUCT OVERVIEW
S3C8847/C8849/P8849
1-6
Table 1-1. S3C8847/C8849/P8849 Pin Descriptions (Continued)
Pin Name
Pin
Type
Pin Description
Circuit
Type
Pin
Numbers
Share
Pins
PWM0
PWM1
O
Output pin for 14-bit PWM circuit
2
1, 2
P2.5, P2.1
PWM2
PWM5
O
Output pin for 8-bit PWM circuit
2
36
P2.2P2.4,
P2.0
ADC0ADC3
I
Analog inputs for 4-bit A/D converter
6
912
P3.0P3.1,
P0.6P0.7
INT0INT3
I
External interrupt input pins
7
1417
P1.0P1.3
T0
O
Timer 0 output (interval, PWM)
2
7
P2.6
T0CK
I
Timer 0 clock input
3
8
P1.7
OSDHT
O
Halftone control signal output for OSD
2
21
P2.7
Vblue, Vgreen
Vred, Vblank
O
Digital blue, green, red, and video blank
signal outputs for OSD
4
2225
H-sync,
V-sync
I
H-sync, V-sync input for OSD
1
26, 27
OSC
IN
,
OSC
OUT
I, O
L-C oscillator pins for OSD clock frequency
generation
28, 29
X
IN
, X
OUT
I, O
System clock pins
31, 32
RESET
I
System reset input pin
8
33
TEST
Test Pin (must be connected to V
SS
).
Factory test mode is activated when 12V is
applied.
13
V
DD
, V
SS1,
V
SS2
Power supply pins
34, 30, 37
CAPA
I
Input for capture A module
1
36
S3C8847/C8849/P8849
PRODUCT OVERVIEW
1-7
PIN CIRCUITS
Input
Noise
Filter
Figure 1-3. Pin Circuit Type 1 (V-Sync H-Sync, CAPA)
Data
I/O
Input
V
SS
Open-drain
Output
Disable
V
DD
Figure 1-4. Pin Circuit Type 2 (P2.0P2.7, P0.0P0.3, PWM0PWM5, T0, OSDHT)
PRODUCT OVERVIEW
S3C8847/C8849/P8849
1-8
Data
I/ O
Input
V
SS
V
DD
Figure 1-5. Pin Circuit Type 3 (P0.4P0.5, P1.6P1.7, T0CK)
Data
Output
V
SS
V
DD
Figure 1-6. Pin Circuit Type 4 (Vblue, Vgreen, Vred, Vblank)
S3C8847/C8849/P8849
PRODUCT OVERVIEW
1-9
NOTE: Circuit type 5 can withstand up to 6 V loads.
Data
I/O
V
SS
Input
Figure 1-7. Pin Circuit Type 5 (P1.4P1.5)
NOTE: Circuit type 6 can withstand up to 5 V loads.
Data
Input
A/D In
I/O
V
SS
Figure 1-8. Pin Circuit Type 6 (P3.0P3.1, P0.6P0.7, ADC0ADC3)
PRODUCT OVERVIEW
S3C8847/C8849/P8849
1-10
NOTE: Circuit type 7 can withstand up to 6 V loads.
I/O
V
SS
Data
Input
INT
Noise Filter
Figure 1-9. Pin Circuit Type 7 (P1.0P1.3, INT0INT3)
Input
Noise
Filter
200 K
Figure 1-10. Pin Circuit Type 8 (
RESET
RESET
)
S3C8847/C8849/P8849
ELECTRICAL DATA
15-1
15
ELECTRICAL DATA
OVERVIEW
In this section, the S3C8847 and the S3C8849 electrical characteristics are presented in tables and graphs. The
information is arranged in the following order:
-- Absolute maximum ratings
-- D.C. electrical characteristics
-- I/O capacitance
-- A.C. electrical characteristics
-- Input timing measurement points for t
NF1
and t
NF2
-- Data retention supply voltage in Stop mode
-- Stop mode release timing when initiated by
RESET
-- Main oscillator and L-C oscillator frequency
-- Clock timing measurement points for X
IN
-- Main oscillator clock stabilization time (t
ST
)
-- A/D converter electrical characteristics
-- Characteristic curves
ELECTRICAL DATA
S3C8847/C8849/P8849
15-2
Table 15-1. Absolute Maximum Ratings
(T
A
= 25
C)
Parameter
Symbol
Conditions
Rating
Unit
Supply Voltage
V
DD
0.3 to + 6.0
V
Input Voltage
V
I1
P1.0P1.5 (open-drain)
0.3 to
+ 7
V
V
I2
All port pins except V
I1
0.3 to V
DD
+ 0.3
Output Voltage
V
O
All output pins
0.3 to V
DD
+ 0.3
V
Output Current
High
I
OH
One I/O pin active
18
mA
All I/O pins active
60
Output Current
Low
I
OL
One I/O pin active
+ 30
mA
Total pin current for port 1
+ 100
Total pin current for ports 0, 2, and 3
+ 100
Operating
Temperature
T
A
20 to + 85
C
Storage
Temperature
T
STG
65 to + 150
C
Table 15-2. D.C. Electrical Characteristics
(T
A
= 20
C to + 85
C, V
DD
= 4.5 V to 5.5 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Input High
Voltage
V
IH1
All input pins except V
IH2
0.8 V
DD
V
DD
V
V
IH2
X
IN
, X
OUT
2.7 V
Input Low Voltage
V
IL1
All input pins except V
IL2
0.2 V
DD
V
V
IL2
X
IN
,
X
OUT
1.0 V
Output High
Voltage
V
OH
I
OH
= 500 A
P0.0P0.5, P1.6P1.7, P2
R, G, B, Vblank
V
DD
0.8
V
Output Low
Voltage
V
OL1
I
OL
= 4 mA
P0.0P0.5, P1.6P1.7
0.4
V
V
OL2
I
OL
= 10 mA
P1.4P1.5
0.8
V
OL3
I
OL
= 2 mA
P1.0P1.3, P3.0P3.1,
P0.6P0.7
0.4
V
OL4
I
O
L
= 1 mA
R, G, B, Vblank, P2
0.4
V
S3C8847/C8849/P8849
ELECTRICAL DATA
15-3
Table 15-2. D.C. Electrical Characteristics (Continued)
(T
A
= 20
C to + 85
C, V
DD
= 4.5 V to 5.5 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Input High
Leakage Current
I
LIH1
V
IN
= V
DD
All input pins except I
LIH2
and I
LIH3
3
A
I
LIH2
V
IN
= V
DD
, OSC
IN
, OSC
OUT
10
I
LIH3
V
IN
= V
DD
, X
IN
,
X
OUT
2.5
10
20
Input Low
Leakage Current
I
LIL1
V
IN
= 0 V
All input pins except I
LIL2
,
I
LIL3
, and
RESET
3
A
I
LIL2
V
IN
= 0 V,
OSC
IN
, OSC
OUT
10
I
LIL3
V
IN
= 0 V, X
IN
,
X
OUT
2.5
10
20
Output High
Leakage Current
I
LOH1
V
OUT
= V
DD
All output pins except I
LOH2
3
A
I
LOH2
V
OUT
= 6 V
P1.0P1.5
10
Output Low
Leakage Current
I
LOL
V
OUT
= 0 V
All output pins
3
A
Supply Current
(note)
I
DD1
Normal mode;
V
DD
= 4.5 V to 5.5 V
8-MHz CPU clock
7
20
mA
I
DD2
Idle mode;
V
DD
= 4.5 V to 5.5 V
8-MHz CPU clock
2
10
I
DD3
Stop mode;
V
DD
= 4.5 V to 5.5 V
1
10
A
NOTE: Supply current does not include the current drawn through internal pull-up resistors or external output current loads.
ELECTRICAL DATA
S3C8847/C8849/P8849
15-4
Table 15-3. Input/output Capacitance
(T
A
= 20
C to + 85
C, V
DD
=
0 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Input
capacitance
C
IN
f = 1 MHz; unmeasured pins
are connected to V
SS
10
pF
Output
capacitance
C
OUT
I/O capacitance
C
IO
Table 15-4. A.C. Electrical Characteristics
(T
A
= 20
C to + 85
C, V
DD
= 4.5 V to 5.5 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
V-sync Pulse
Width
t
VW
4
s
H-sync Pulse
Width
t
HW
3
s
Noise Filter
t
NF1
P1.0P1.3
350
ns
t
NF2
RESET,
H-sync, V-sync
1000
t
NF3
Glitch filter (oscillator block)
25
t
NF4
CAPA
5
t
CAPA
NOTE: f
CAPA
= f
OSC
/128
t
NF1L
t
NF1H
0.8
V
DD
0.2
V
DD
1t
CPU
t
NF2
Figure 15-1. Input Timing Measurement Points for t
NF1
and t
NF2
S3C8847/C8849/P8849
ELECTRICAL DATA
15-5
Table 15-5. Data Retention Supply Voltage in Stop Mode
(T
A
= 20
C to + 85
C)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Data Retention Supply
Voltage
V
DDDR
Stop mode
2
6
V
Data Retention Supply
Current
I
DDDR
Stop mode,
V
DDDR
= 2.0 V
5
A
NOTES:
1.
Supply current does not include the current drawn through internal pull-up resistors or external output current loads.
2.
During the oscillator stabilization wait time (t
WAIT
), all the CPU operations must be stopped.
t
WAIT
V
DD
RESET
EXECUTION OF
STOP INSTRUCTION
V
DDDR
DATA RETENTION MODE
STOP MODE
t
SREL
OSCILLATION
STABILIZATION
TIME
NORMAL
OPERATING
MODE
~ ~
~ ~
NOTE: t
WAIT
is the same as 4096 x 16 x 1 / f
OSC
Figure 15-2. Stop Mode Release Timing When Initiated by a
RESET
RESET
ELECTRICAL DATA
S3C8847/C8849/P8849
15-6
Table 15-6. Main Oscillator and L-C Oscillator Frequency
(T
A
= 20
C + 85
C, V
DD
= 4.5 V to 5.5 V)
Oscillator
Clock Circuit
Conditions
Min
Typ
Max
Unit
Crystal
C2
C1
X
IN
X
OUT
OSD block active
5
6
8
MHz
OSD block inactive
0.5
6
8
Ceramic
C2
C1
X
IN
X
OUT
OSD block active
5
6
8
MHz
OSD block inactive
0.5
6
8
External Clock
X
IN
X
OUT
OSD block active
5
6
8
MHz
OSD block inactive
0.5
6
8
L-C Oscillator
C2
C1
OSC
IN
OSC
OUT
Recommend value;
C1 = C2 = 20 pF
5
6.5
8
MHz
CPU Clock Frequency
0.032
6.0
8
MHz
X
IN
t
XL
t
XH
2.7 V
1.0 V
1 / f
OSC
Figure 15-3. Clock Timing Measurement Points for X
IN
S3C8847/C8849/P8849
ELECTRICAL DATA
15-7
Table 15-7. Main Oscillator Clock Stabilization Time
(T
A
= 20
C + 85
C, V
DD
= 4.5 V to 5.5 V)
Oscillator
Symbol
Test Condition
Min
Typ
Max
Unit
Crystal
V
DD
= 4.5 V to 6.0 V
20
ms
Ceramic
(Oscillation stabilization occurs when
V
DD
is equal to the minimum oscillator
voltage range.)
10
External Clock
X
IN
input High and Low level width
(t
XH
, t
XL
)
65
100
ns
Release Signal
Setup Time
t
SREL
Normal operation
1000
ns
Oscillation
Stabilization
Wait Time
(1)
t
WAIT
CPU clock = 8 MHz; Stop mode
released by
RESET
8.3
ms
CPU clock = 8 MHz; Stop mode
released by an interrupt
(2)
NOTES:
1.
Oscillation stabilization time is the time required for the CPU clock to return to its normal oscillation frequency after a
power-on occurs, or when Stop mode is released.
2.
The oscillation stabilization interval is determined by the basic timer (BT) input clock setting.
Table 15-8. A/D Converter Electrical Characteristics
(T
A
= 20
C to + 85
C, V
DD
= 4.5 V to 5.5 V, V
SS
= 0 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Absolute Accuracy
(1)
CPU clock = 8 MHz
0.5
LSB
Conversion Time
(2)
t
CON
t
CPU
25
(3)
s
Analog Input Voltage
V
IAN
V
SS
V
DD
V
Analog Input
Impedance
R
AN
2
M
NOTES:
1.
Excluding quantization error, absolute accuracy values are within 1/2 LSB.
2.
'Conversion time' is the time required from the moment a conversion operation starts until it ends.
3.
The unit t
CPU
means one CPU clock period.
S3C8847/C8849/P8849
MECHANICAL DATA
16-1
16
MECHANICAL DATA
OVERVIEW
The S3C8847 and the S3C8849 microcontrollers are available in 42-pin SIP package
(42-SDIP-600).
NOTE: Package dimensions are in millimeters.
42-SDIP-600
14.00 0.2
0.50 0.1
39.10 0.2
0 ~ 15
0.25
+0.1 0.05
#1
21
42
22
15.24
(1.77)
1.00 0.1
1.778
0.51MIN
3.50 0.2
3.30 0.3
5.08MAX
Figure 16-1. 42-Pin SDIP Package Mechanical Data (42-SDIP-600)
S3C8847/C8849/P8849
S3P8849 OTP
17-1
17
S3P8849 OTP
OVERVIEW
The S3P8849 single-chip CMOS microcontroller is the OTP (One Time Programmable)
version of the
S3C8847/C8849microcontroller. It has an on-chip OTP ROM instead of a masked ROM. The EPROM is
accessed by serial data format.
The S3P8849 is fully compatible with the S3C8847/C8849, both in function and pin configuration. The simple
programming requirements of the S3P8849 make the device ideal for use as an evaluation chip for the
S3C8847/C8849.
P2.5/PWM0
P2.1/PWM1
SCLK/P2.2/PWM2
SDAT/P2.3/PWM3
P2.4/PWM4
P2.0/PWM5
P2.6/T0
P1.7/T0CK
P3.0/ADC0
P3.1/ADC1
P0.6/ADC2
P0.7/ADC3
TEST/TEST
P1.0/INT0
P1.1/INT1
P1.2/INT2
P1.3/INT3
P1.4
P1.5
P1.6
P2.7/OSDHT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
P0.0
P0.1
P0.2
P0.3
P0.4
V
SS2/
V
SS2
CAPA
P0.5
V
DD/
V
DD
RESET/RESET
RESET
X
OUT
X
IN
V
SS1/
V
SS1
OSC
OUT
OSC
IN
V-sync
H-sync
Vblank
Vred
Vgreen
Vblue
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
S3P8849
42-SDIP
(Top View)
Figure 17-1. S3P8849 Pin Assignment (42-SDIP)
S3P8849 OTP
S3C8847/C8849/P8849
17-2
Table 17-1. Descriptions of Pins Used to Read/Write the EPROM (S3P8849)
Main Chip
During Programming
Pin Name
Pin Name
Pin No.
I/O
Function
P2.3 (Pin 4)
SDAT
4
I/O
Serial data pin (output when reading, Input when
writing) Input and push-pull output port can be
assigned
P2.2 (Pin 3)
SCLK
3
I/O
Serial clock pin (Input only pin)
TEST
V
PP
(TEST)
13
I
0 V: operating mode
5 V: test mode
12.5 V: OTP mode
RESET
RESET
33
I
5 V: operating mode, 0 V: OTP mode
V
DD
/V
SS
V
DD
/V
SS
34/30, 37
I
Logic power supply pin.
Table 17-2. Comparison of S3P8849 and S3C8847/C8849Features
Characteristic
S3P8849
S3C8847/C8849
Program Memory
32-K byte EPROM
24/32-K byte mask ROM
Operating Voltage (V
DD
)
4.5 V to 5.5 V
4.5 V to 5.5 V
OTP Programming Mode
V
DD
= 5 V, TEST V
PP
= 12.5 V
Pin Configuration
42 SDIP
42 SDIP
EPROM Programmability
User Program 1 time
Programmed at the factory
OPERATING MODE CHARACTERISTICS
When 12.5 V is supplied to the V
PP
(TEST) pin of the S3P8849, the EPROM programming mode is entered. The
operating mode (read, write, or read protection) is selected according to the input signals to the pins listed in
Table 16-3 below.
Table 17-3. Operating Mode Selection Criteria
V
DD
V
PP
(TEST)
REG/
MEM
ADDRESS
(A15A0)
R/W
MODE
5 V
5 V
0
0000H
1
EPROM read
12.5 V
0
0000H
0
EPROM program
12.5 V
0
0000H
1
EPROM verify
12.5 V
1
0E3FH
0
EPROM read protection
NOTE: "0" means Low level; "1" means High level.
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