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Электронный компонент: S3P7565

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S3C7565/P7565
PRODUCT OVERVIEW
1-1
1
PRODUCT OVERVIEW
OVERVIEW
The S3C7565/P7565 single-chip CMOS microcontroller is designed for high performance in the application for
Caller-ID, Telephone using Samsung's newest 4-bit CPU core, SAM47 (Samsung Arrangable Microcontrollers).
Featuring a DTMF generator, up-to-960-dot LCD direct drive capability, one 8-bit timer/counter and flexible two
8-bit timer/counters, and serial I/O interface, the S3C7565/P7565 offer an excellent design solution for a wide
variety of applications requiring DTMF, LCD support.
Up to 43 (including COM/SEG) pins in the 100-pin QFP package can be dedicated to I/O. Nine vectored
interrupts provide a fast response to internal and external events. In addition the advanced CMOS technology a
of the S3C7565/P7565 ensures low power consumption with a wide operating voltage range.
OTP
The S3C7565 microcontroller is also available in OTP (One Time Programmable) version, S3P7565.
S3P7565 microcontroller has an on-chip 16 K-byte one-time-programmable EPROM instead of masked ROM.
The S3P7565 is comparable to S3C7565, both in function and in pin configuration.
PRODUCT OVERVIEW
S3C7565/P7565
1-2
FEATURES SUMMARY
Memory
16K
8-bit ROM
5,120
4-bit RAM (excluding LCD RAM)
I/O Pins
Input only: 4pins (Not including COM/SEG)
6pins (Including COM/SEG)
I/O: 15pins (Not including COM/SEG)
43pins (Including COM/SEG)
Memory-Mapped I/O Structure
Data memory bank 15
8-bit Basic Timer
Four interval timer functions
Watchdog timer
8-bit Timer/Counter
Programmable 8-bit timer
External event counter
Arbitrary clock frequency output
External clock signal divider
16-Bit Timer/Counter
Programmable 16-bit timer
External event counter
Arbitrary clock frequency output
External clock signal divider
Configurable as two 8-bit Timers
Serial I/O interface clock generator
Watch Timer
Time interval generation: 0.5 s, 3.9 ms
at 32.768 kHz
4 frequency outputs to BUZ pin (0.5, 1, 2, 4 kHz)
at 32.768 kHz
Comparator
4-channel mode: Internal reference (4-bit
resolution); 16-step variable reference voltage
3-channel mode: External reference
DTMF Generator
16 dual-tone for tone dialing
8-bit Serial I/O Interface
8-bit transmit/receive mode
8-bit receive mode
LSB-first or MSB-first transmission selectable
LCD Controller/Driver
60 SEG x 16 COM terminals
8, 12 and 16 com selectable
COM 815: shared with port
SEG4059: shared with port
Two kinds of LCD bias resistor value
Bit Sequential Carrier
Supports 16-bit serial data transfer in arbitrary
format
Interrupts
Four external interrupt vectors
Five internal interrupt vectors
Two quasi-interrupts
Power-Down Modes
Idle mode (only CPU clock stops)
Stop mode (main system oscillation stops)
Subsystem clock stop mode
Oscillation Sources
RC, Crystal or Ceramic for system clock
Oscillation frequency: 0.46.0 MHz
CPU clock divider circuit (by 4, 8, or 64)
Instruction Execution Times
1.12, 2.23, 17.88 s at 3.58 MHz
0.67, 1.33, 10.7 s at 6.0 MHz
122 s at 32.768 kHz (subsystem)
Operating Temperature
40
C to 85
C
Operating Voltage Range
1.8 V to 5.5 V (except DTMF and Comparator)
2 V to 5.5 V (include DTMF)
4.0 V to 5.5 V (include Comparator)
Package Type
100-pin QFP (1420C)
S3C7565/P7565
PRODUCT OVERVIEW
1-3
BLOCK DIAGRAM
Program
Status Word
Stack
Pointer
Arithmetic
and
Logic Unit
Instruction Dcoder
Internal
Interrupts
RESET
Interrupt
Control
Block
Instruction
Register
Clock
Program
Counter
P5.0-P5.3/
COM12-COM15
P4.0-P4.3/
COM8-COM11
I/O Port 5
I/O Port 4
Comparator
P7.0/SEG55/CIN0
P7.1/SEG54/CIN1
P7.2/SEG53/CIN2
P7.3/SEG52/CIN3
I/O Port 2
P2.0/CLO
P2.1/VLC1
P2.2
I/O Port 3
P3.0/TCLO0
P3.1/TCLO1
P3.2/TCL0
P3.3/TCL1
P6.0-P6.3
SEG59-SEG56/
KS4-KS7
P7.0/SEG55/CIN0
P7.1/SEG54/CIN1
P7.2/SEG53/CIN2
P7.3/SEG52/CIN3
I/O Port 7
I/O Port 6
P9.0-P9.3/
SEG47-SEG44
P8.0/SEG51/LCDCK
P8.1/SEG50/LCDSY
P8.2/SEG49
P8.3/SEG48
I/O Port 8
I/O Port 9
I/O Port 10
P10.0-P10.3/
SEG43-SEG40
8-Bit
Timer/
Counter
16KB ROM
5K x 4-bit
RAM
16-Bit
Timer/Counter
(Two 8Bit
Timer/Counter)
DTMF
Generator
DTMF
Basic
Timer
Watchdog
Timer
VLC1
COM0-COM7
P4.0-P5.3/
COM8-COM15
SEG0-SEG39
P10.3-P6.0/
SEG40-SEG59
LCD
Driver/
Controller
P0.0/SCK/KO
P0.1/SO/K1
P0.2/SI/K2
P0.3/BUZ/K3
Watch
Timer
Serial I/O
I/O Port 0
XT
OUT
X
OUT
XT
IN
X
IN
Input Port 1
P1.0-P1.3/
INT0-INT4
Figure 1-1. S3C7565 Block Diagram
PRODUCT OVERVIEW
S3C7565/P7565
1-4
PIN ASSIGNMENTS
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
P6.0/SEG59/K4
P5.3/COM15
P5.2/COM14
P5.1/COM13
P5.0/COM12
P4.3/COM11
P4.2/COM10
P4.1/COM9
P4.0/COM8
COM7
COM6
COM5
COM4
COM3
COM2
COM1
COM0
P3.3/TCL1
P3.2/TCL0
P3.1/TCLO1
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
SEG39
P10.3/SEG40
P10.2/SEG41
P10.1/SEG42
P10.0/SEG43
P9.3/SEG44
P9.2/SEG45
P9.1/SEG46
P9.0/SEG47
P8.3/SEG48
P8.2/SEG49
P8.1/SEG50/LCDSY
P8.0/SEG51/LCDCK
P7.3/SEG52/CIN3
P7.2/SEG53/CIN2
P7.1/SEG54/CIN1
P7.0/SEG55/CIN0
P6.3/SEG56/K7
P6.2/SEG57/K6
P6.1/SEG58/K5
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0
DTMF
P0.0/
SCK
/K0
P0.1/SO/K1
P0.2/SI/K2
P0.3/BUZ/K3
V
DD
V
SS
X
OUT
X
IN
TEST
XT
IN
XT
OUT
RESET
P1.0/INT0
P1.1/INT1
P1.2/INT2
P1.3/INT4
P2.0/CLO
P2.1/V
LC1
P2.2
P3.0/TCLO0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
S3C7565
(100-QFP-1420C)
Figure 1-2. S3C7565 Pin Assignments (100-QFP Package)
S3C7565/P7565
PRODUCT OVERVIEW
1-5
PIN DESCRIPTIONS
Table 1-1. S3C7565 Pin Descriptions
Pin Name
Pin Type
Description
Share Pin
P0.0
P0.1
P0.2
P0.3
I/O
4-bit I/O port.
1-bit and 4-bit read/write and test is possible.
Individual pins are software configurable as input or
output.
Individual pins are software configurable as open-drain or
push-pull output.
4-bit pull-up resistors are software assignable; pull-up
resistors are automatically disabled for output pins.
SCK
/K0
SO/K1
SI/K2
BUZ/K3
P1.0
P1.1
P1.2
P1.3
I
4-bit input port.
1-bit and 4-bit read and test is possible.
4-bit pull-up resistors are software assignable.
INT0
INT1
INT2
INT4
P2.0
P2.1
P2.2
I/O
Same as port 0 except that port 2 is a 3-bit I/O port.
CLO
V
LC1
P3.0
P3.1
P3.2
P3.3
I/O
Same as port 0.
TCLO0
TCLO1
TCL0
TCL1
P4.0P4.3
P5.0P5.3
I/O
4-bit I/O ports.
1-, 4-bit or 8-bit read/write and test is possible.
Individual pins are software configurable as input or
output.
4-bit pull-up resistors are software assignable; pull-up
resistors are automatically disabled for output pins.
COM8COM11
COM12COM15
P6.0P6.3
P7.0P7.3
I/O
Same as P4, P5.
SEG59
SEG56/K4K7
SEG55/CIN0
SEG52/CIN3
P8.0P8.1
I/O
Input ports.
1, 4-bit or 8-bit read and test is possible.
4-bit pull-up resistors are software assignable; pull-up
resistors are automatically disabled for output pins.
These pins can not be used as push-pull output. Refer to
the NOTES of table 10-3. Port Mode Group Flags.
SEG51/LCDCK
SEG50/LCDSY
P8.2P8.3
P9.0P9.3
I/O
Same as P4, P5.
SEG49
SEG48
SEG47SEG44
P10.0P10.3
I/O
Same as P4, P5.
SEG43SEG40
SCK
I/O
Serial I/O interface clock signal.
P0.0/K0
SO
I/O
Serial data output.
P0.1/K1