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Электронный компонент: S5A1903X01-E0R0

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DATA PROCESSOR
S5A1903X01
1
INTRODUCTION
The S5A1903X01 implements the voice intelligibility processor (VIP).
The VIP is a signal processing algorithm designed to increase the
intelligibility of human speech in a high ambient noise environment.
Unlike noise cancellation or adaptive speech filtering systems, VIP
operates on the speech signal only and is totally independent of the
noise. This approach makes speech clearer and easier to understand
regardless of the characteristics of the noise source, and eliminates
the need for processing of the noise signal.
In addition to VIP, the S5A1903X01 includes voice equalizer. The
equalizer is composed of four different frequency bands, and each
band is controlled between +12dB and -12dB. Thus, it can be used to
compensate of speaker characteristics.
The Figure 1 shows how the S5A1903X01 interfaces to Vocoder and Codec in cellular phone.
MAIN FEATURES
IP Mode
Equalizer Mode
16-bit Fixed Point DSP Core
Two Internal 256-word Data RAM
2K-word Internal Program ROM
Wide Range of System Clock
: 8 - 40 MHz
-- PCM Input/ Output Interface
-- I
2
C Host Interface
-- Low Power Consumption
less than 4mA in working mode
10uA in sleep mode
-- Packages: 32-LQFP/ 32-BCC
-- 3V Single Power Supply
ORDERING INFORMATION
APPLICATIONS
Cellular Phone
Wireless and Traditional Telephone
Device
Package
Temperature Range
S5A1903X01-E0R0
32 LQFP
0
C
-
70
C
32-LQFP
S5A1903X01
DATA PROCESSOR
2
BLOCK DIAGRAM
System Block Diagram
VOCODER
RESB
SCL
SDA
DIN
FS
MCLK
VIP
DOUT
VOICE
CODEC
CKIN
DATA PROCESSOR
S5A1903X01
3
Chip Block Diagram
MSM
VOCODER
I
2
C
I/F
VIP
SSP1611
SRAM
256
CODEC
Digital
I/F
P.ROM 2K
SRAM
256
NOTE:
Not Scaled
S5A1903X01
DATA PROCESSOR
4
Functional Block Diagram
DIN
PCM
INPUT
I/F
PCM
OUTPUT
I/F
DOUT
Voice
Intelligibility
Proces
BPF (Center: 300HZ)
BPF (Center: 600HZ)
BPF (Center: 1.2kHZ)
HPF (Cutoff: 2.4kHZ)
+
DATA PROCESSOR
S5A1903X01
5
PIN ASSIGNMENTS
25
26
27
28
29
30
31
32
1
2
3
4
5
6
7
8
9
10
17
16
15
14
13
12
11
24
23
22
21
20
19
18
S5A1903X01
32BCC
(Top View)
VDD4
TODR
GPO3
GPO2
DOUT
GND4
GPO1
SCL
SDA
GND2
CKIN
VDD2
MCLK
DIN
GPO0
VDD1
GPI0
GPI1
GPI2
GPI3
GND1
RESB
FS
TCLKDR
TIDR
TSHFTDR
GND3
TUPDDR
TSELDR1
TSEKDR0
VDD3
SAS