Ordering number : ENN5981

42800RM (OT) No. 5981-1/17

Overview

The LA9250M is a servo signal-processing IC for CD
players. In combination with a CD DSP such as the
LC78626KE, it can implement a CD player with a
minimal number of external components.

Functions

· I/V amplifier
· SLC
· FE
· Focus servo amplifier
· Spindle servo amplifier (with gain switching function)
· Focus detection (DRF and FZD)
· Defect detection
· RF amplifier with AGC
· APC
· TE (with variable gain and auto balance function)
· Tracking servo amplifier
· Sled servo amplifier (with turn-off function)
· Track detection (HFL, TES)
· Shock detection

Features

· Low-voltage operation: 2.4 V (minimum)
· Low current drain: 15 mA (at V

= 3.0 V, typical)

· Built-in EF balance adjustment
· Built-in RF level AGC function
· RF level follower function for the tracking servo gain

(with turn-off function)

Package Dimensions

unit: mm

3159-QIP64E

14.0

17.2

1.0

1.6

0.15

0.35

0.1

15.6

0.8

3.0max

2.7

14.0

17.2

1.0

1.6

0.8

SANYO: QIP64E

[LA9250M]

LA9250M

SANYO Electric Co.,Ltd. Semiconductor Company

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

CD Player Analog Signal Processor (ASP)

Monolithic Linear IC

Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft's
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.

Parameter

Symbol

Conditions

Ratings

Unit

Maximum supply voltage

max

Pin 56

Allowable power dissipation

Pd max

75°C

200

Operating temperature

Topr

15 to +75

°C

Storage temperature

Tstg

40 to +150

°C

Specifications

Maximum Ratings

at Ta = 25°C, with pin 46 tied to ground

No. 5981-2/17

LA9250M

Parameter

Symbol

Conditions

Ratings

Unit

Recommended supply voltage

Allowable operating supply voltage range

2.4 to 5.5

Operating Conditions

at Ta = 25°C, with pin 46 tied to ground

Parameter

Symbol

Conditions

Ratings

Unit

min

typ

max

Current drain

CCO

No input

Reference voltage

REF

1.2

1.5

1.8

[Interface]

SLOFvth

SLOF

0.8

SP8vth

SP8: 8 cm mode

0.8

EFBALvth

EFBALvth EFBAL

2.3

FSTAvth

ESTA

2.3

LASERvth

LASERvth LASER

0.8

CLK

R = 390 k

, C = 0.1 µF

[RF Amplifier]

RF no-signal voltage

RFo

0.75

1.00

1.25

Minimum gain

min

FIN1, FIN2: 1 M

-input, PH1 = 2 V, f = 200 kHz, RF

[Focus Amplifier]

FDO gain

FIN1, FIN2: 1 M

-input, FDO

3.5

5.0

6.5

FDO offset

FDost

The difference from the reference voltage, servo on.

340

+340

F search voltage (high) 1

FS max1

FDO, FSS = GND

0.8

F search voltage (low) 1

FS min1

FDO, FSS = GND

0.8

F search voltage (high) 2

FS max2

FDO, FSS = V

0.8

F search voltage (low) 2

FS min2

FDO, FSS = V

[Tracking Amplifier]

TE gain max

max

f = 10 kHz, E: 1 M

-input, PH1 = 0.5 V, TGRF = open

6.0

7.5

9.0

TE gain min

min

f = 10 kHz, E: 1 M

-input, PH1 = 2 V, TGRF = open

0.5

+1.8

+4.0

TE-3dB

TEfc

E: 1 M

-input

kHz

TO gain

TO gain, THLD mode

10.0

12.0

14.0

TGL offset

TGLost

Servo on, TGL = high, TO

260

+260

TGH offset

TGHost

TGL = low, the difference from the TGL offset, TO

+35

THLD offset

THDost

THLD mode, the difference from the TGL offset, TO

+35

Off 1 offset

OFF1ost

TOFF = High

+25

Balance range (high)

BAL-H

GainE/F input, TB = 3 V, TBC = open

+35

Balance range (low)

BAL-L

GainE/F input, TB = 0 V, TBC = open

TGLvth

0.8

1.5

1.8

PH no-signal voltage

PHo

The difference from RFSM

0.90

0.65

0.40

BH no-signal voltage

BHo10

The difference from RFSM

0.40

0.65

0.90

DRF detection voltage

DRFvth

At RFSM, the difference from VR

0.50

0.25

0.10

DRF output voltage (high)

DRF-H

2.5

2.9

DRF output voltage (low)

DRF-L

0.5

FZD detection voltage 1

FZD1

FE, the difference from VR

0.2

FZD detection voltage 2

FZD2

FE, the difference from VR

HFL detection voltage

HFLvth

At RF, the difference from VR

0.25

0.10

0.05

HFL output voltage (high)

HFL-H

2.5

2.9

HFL output voltage (low)

HFL-L

0.5

TES output voltage (low-high)

TES-LH

TESI, the difference from VR

0.15

0.10

0.05

TES output voltage (high-low)

TES-HL

TESI, the difference from VR

0.05

0.10

0.15

TES output voltage (high)

TES-H

2.5

2.9

TES output voltage (low)

TES-L

0.5

JP output voltage (high)

JP-H

TJP = 3 V, at TO, the difference from TJP = 1.5 V

0.05

0.25

0.45

Electrical Characteristics

at Ta = 25°C, with pin 46 tied to ground, pin 56 = 3 V

Continued on next page.

No. 5981-3/17

LA9250M

Continued from preceding page.

Parameter

Symbol

Conditions

Ratings

Unit

min

typ

max

[Spindle Amplifier]

Offset 12

SPD12ost At SPD, the difference from VR, SP8 = 0 V: 12 cm mode

+40

Offset 8

SPD8ost

At SPD, the difference from VR, SP8 = 3 V: 8 cm mode

+40

Offset off

SPDof

At SPD, the difference from VR, SP8 = 3 V: 8 cm mode

+40

Output voltage H12

SPD-H12

The difference from offset 12,

0.35

0.50

0.65

SP8 = 0 V, 12 cm mode, CLV = 3 V

Output voltage H8

SPD-H8

The difference from offset 8,

0.10

0.20

0.30

SP8 = 3 V, 8 cm mode, CLV = 3 V

[Sled Amplifier]

Offset SLD

SLDost

SLEQ = VR, the difference from VR

+80

Offset off

SLDof

SLOF = High

+40

SLC no-signal voltage

SLCo

SLC

1.0

1.5

2.0

Shock no-signal voltage

SCIo

SCI, the difference from VR

+40

Shock detection voltage (high)

SCIvthH

SCI, the difference from VR

140

190

Shock detection voltage (low)

SCIvthL

SCI, the difference from VR

190

140

The difference between the LF2 voltage when DEF is

DEF detection voltage

DEFvth

detected with RF = 1.9 V and the LF2 voltage when

0.20

0.35

0.50

RF = 1.9 V.

DEF output voltage (high)

DEF-H

2.5

2.9

DEF output voltage (low)

DEF-L

0.5

APC reference voltage

LDS

The LDS voltage such that LDD = 1.5 V

120

170

220

APC off voltage

LDDof

LDD

2.7

2.9

Pin Functions

Pin No.

Function

FIN2

Pickup photodiode (focus, RF) connection

FIN1

Pickup photodiode (focus, RF) connection

Pickup photodiode (tracking) connection

TE signal DC component input. Pickup photodiode (tracking) connection

TE signal gain setting resistor connection. A resistor is connected between this pin and TE.

TE signal output

TESI

TES comparator input. Takes the bandpass filtered TE signal as its input.

SCI

Shock detection input

Tracking gain time constant setting

TA amplifier output

In conjunction with the TD and VR pins, used to form the tracking phase compensation circuit constant

Tracking phase compensation setting

Track jump signal amplitude setting

Tracking control signal output

(NC)

No connection

Focusing control signal output

In conjunction with the FD and FA pins, used to form the focusing phase compensation circuit constant

In conjunction with the FD- and FA- pins, used to form the focusing phase compensation circuit constant

In conjunction with the FA and FE pins, used to form the focusing phase compensation circuit constant

FE signal output

FE signal gain setting resistor connection. A resistor is connected between this pin and FE.

CLV pin input signal inverted output

SPG

Gain setting resistor connection (12 cm spindle mode)

Continued on next page.

No. 5981-4/17

LA9250M

Continued from preceding page.

Pin No.

Function

In conjunction with the SPD pin, spindle phase compensation time constant connection

SPD

Spindle control signal output

SLEQ

Sled phase compensation time constant connection

SLD

Sled control signal output

Sled feed signal input from the microcontroller

OSC

Oscillator frequency setting

(NC)

No connection

SLOF

Sled servo off control input

TGRF

Tracking servo gain RF level follower function setting

SP8

Spindle 8 cm/12 cm mode switching control from the DSP

EFBAL

E/F balance adjustment signal input from the DSP

FSTA

Focus search control signal input from the DSP

LASER

Laser on/off control from the DSP

(NC)

No connection

TJP

Track jump signal input from the DSP

TGL

Tracking gain control signal input from the DSP

TOFF

Tracking off control signal input from the DSP

TES

TES signal output to the DSP

HFL

Output for the HFL signal that indicates whether the main beam is positioned over pits or mirror

CLV

CLV error signal input from the DSP

GND

RF output

In conjunction with the RF pin, sets the RF gain and sets the EFM 3T compensation

SLC

Output for control of the RF waveform data slice level according to the DSP

SLI

Input for control of the RF waveform data slice level according to the DSP

DEF

Disc defect detection output

DRF

RF level detection output

FSC

Focus search smoothing capacitor output

TBC

E/F balance variation range setting

FSS

Focus search mode setting

REFI

Reference voltage bypass capacitor connection

Reference voltage output

LF2

Disc defect detection time constant setting

PH1

RF signal peak hold capacitor connection

BH1

RF signal bottom hold capacitor connection

LDD

APC circuit output

LDS

APC circuit input

(NC)

No connection

Operation

1. APC (Auto Laser Power Control)

This circuit controls the laser power, turning the laser on and off (pin 38). The laser is turned on when the LASER pin
is high.

2. RF amplifier (eye pattern output)

The pickup photodiode output current input to FIN1 (pin 2) and FIN2 (pin 1) is I/V converted, passed through an
AGC circuit, and output from the RFSUM amplifier RF pin (pin 47). The built-in AGC circuit has a variable range of
about ±4 dB, and its time constant is set by the external capacitor connected to PH1 (pin 60). The EFM signal bottom
level is also controlled, and the response is set by the external capacitor attached to PH1 (pin 60). The center gain for
the AGC variable range is set by the value of the resistor between RF (pin 47) and RF- (pin 48). If required, these
pins can also be used for EFM signal 3T compensation.

3. SLC (Slice Level Controller)

Since the SLC circuit sets the duty of the EFM signal input to the DSP to 50%, the DC level is controlled by
integrating the EFMO signal from the DSP.

4. Focus Servo

The focus error signal is acquired by detecting the difference between (A + C) and (B + D) from the pickup and the
result is output from FE (pin 21). The FE signal gain is set by the value of the resistor between FE and FE

(pin 22).

The FA amplifier is the pickup phase compensation amplifier, and its equalization curve is set by an external
capacitor and resistor.
The FD amplifier provides a phase compensation circuit and a focus search signal synthesis function.
A focus search operation is started by switching FSTA (pin 37) from low to high. A ramp waveform is generated by
an internal oscillator; this ramp completes in about 560 ms. We recommend holding FSTA (pin 37) high until another
focus search is to be performed. Focus is detected (the focus zero cross state) from the focus error signal generated, in
effect, by this waveform, and this turns the focus servo on. The ramp waveform amplitude is set by the value of the
resistor between FD (pin 17) and FE

(pin 18).

Since FSC (pin 53) is used to smooth the focus search ramp waveform, a capacitor is connected between FSC and VR
(pin 58). FSS (pin 55) switches the focus search mode; when FSS is shorted to V

the circuit performs a + search

with respect to the reference voltage VR, and when open or shorted to ground, it performs a ± search.

5. Tracking Servo

The pickup photodiode output current input to E (pin 3) and F (pin 4) is I/V converted and passed first through a
balance adjustment VCA circuit and then through a VCA circuit that performs gain following for the RF AGC circuit.
The resulting signal is then output from TE (pin 7). The gain follower function can be turned off by setting TGRF
(pin 34) high.
The tracking error gain is set by the value of the resistor between TE

(pin 6) and TE (pin 7).

The TH amplifier detects either the JP signal or the TGL signal from the DSP, and functions to change the response
characteristics of the servo according to the THLD signal generated internally. When a defect is detected, the circuit
switches to THLD mode internally. Set DEF (pin 51) low to prevent this. Note that an external bandpass filter that
extracts only the shock component from the tracking error signal is formed on SCI (pin 9), and that the gain is
automatically increased if this signal is inserted.
The TA output (pin 11) has an internal resistor so that a low-pass filter can be formed.
The TD amplifier circuit is provided to perform servo loop phase compensation, and its characteristics are set by
external RC components. This amplifier also provides a muting function, and the servo can be turned off by setting
TOFF (pin 42) high.
The TO amplifier provides a function for synthesizing JP pulses, and JP (pin 14) is used to set the JP pulse
conditions.
The E/F balance adjustment operation is started by switching EFBAL (pin 36) from low to high. After that, the
adjustment operation is performed by a clock generated by an internal oscillator, and the adjustment completes in
about 500 ms. We recommend holding EFBAL (pin 36) high until the next time an E/F balance operation is to be
performed.

No. 5981-12/17

LA9250M

This adjustment operation must be performed over the disc pit area, not over the disc mirror area. Note that
applications must take measures to assure that a stable TE signal is acquired so that track kick operations do not occur
during the adjustment. (This includes sled feed commands from the microcontroller.)
The E/F balance adjustment precision and adjustment range can be set to be optimal for the pickup characteristics by
the value of the resistor between TBC (pin 54) and the reference voltage, VR.

6. Sled Servo

The response characteristics are set at SLEQ (pin 27). The amplifier that follows SLEQ has a muting function, and
the sled servo can be turned off by setting SLOF (pin 33) high.
Sled feed is performed in a current input form at SL

(pin 29) and SL

(pin 30). In particular, a resistor is connected

to a microcontroller output port and the feed gain is set by the value of that resistor.

7. Spindle Servo

A servo circuit that holds the disc at a constant linear velocity is formed by the internal servo circuit in conjunction
with the DSP. A signal from the DSP is accepted by CLV (pin 45), and output from SPD (pin 26). The phase
compensation characteristics are set by SP (pin 23), SP

(pin 25), and SPD. The 12 cm mode amplifier gain is set by a

resistor connected between SPG (pin 24) and the reference voltage. In 8 cm mode, this amplifier is internally buffered
and not affected by SPG. The circuit switches to 8 cm mode when SP8 (pin 35) is set high.

8. TES and HFL (Traversal signal)

The sub-beam signals from the pickup are connected to E (pin 3) and F (pin 4) so that HFL and TES have the phase
relationship shown in the figure when the pickup moves from the outside towards the inside of the disc. The TES
comparator has a hysteresis of about ±100 mV at the minus polarity of the comparator with respect to the TESI (pin
8) input. An external bandpass filter is formed so that only the required signal is extracted from the TE signal.

9. DRF (Optical level decision)

A peak hold operation is applied to the EFM signal (RF output) by a capacitor at PH1 (pin 60), and DRF goes high
when the RF peak value exceeds about 1.3 V (when V

= 3.0 V). The PH1 capacitor is related to the settings of both

the DRF detection time constant and the RF AGC response.

No. 5981-13/17

LA9250M

RFSM

HFL

TES

2.0 V

1.4 V

1.0 V

A11267

DRF

RFSM

Pickup position

Focus

2.0 V

1.3 V
1.0 V

A11268

10. Focus Detection

The pickup is seen as being in focus when, after a VR + 0.2 V level is detected in the focus error signal S-curve, that
S-curve next goes to the VR level.

11. Defect Detection

The mirror surface level is held by the capacitor on LF2 (pin 59), and DEF (pin 51) goes high if a drop in the EFM
signal (RF output) exceeds about 0.35 V. When DEF goes high, the tracking servo goes to THLD mode. When a
defect is detected applications can prevent the LA9250M from going to THLD mode either by setting DEF to low or
by setting LF2 (pin 59) low and thus setting the LA9250M not to output DEF.

12. Oscillator Circuit

The oscillator frequency is set by the external RC circuit attached to OSC (pin 31). This oscillator frequency is used
as the reference clock for focus search and E/F balance adjustment.

No. 5981-14/17

LA9250M

Focus

REF + 0.2 V

A11269

EFM signal
(RFSM output)

LF2 (pin 59)

DEF (pin 51)

0.35 V

A11270

Test Circuit

No. 5981-15/17

LA9250M

0.1

SLC

SLI

DEF

DRF

FSC

TBC

FSS

REFI

LF2

PH1

BH1

LDD

SPG

SPD

SLEQ

REF

SLD

OSC

68k

24k

20k

50k

100k

LDS

10k

SLI

0.068

100pF

0.01

REF

15k

200k

390k

REF

15k

30k

39k

20k

REF

TD-

SCI

TESI

TESI AC

TE-

FIN1

FIN2

A11346

0.01

F1I

F2I

F2IAC

F1IAC

EIAC

FIAC

0.33

0.47

0.1

100k

0.1

10k

SLI1

100k

0.1

SLOF

TGRF

SP8

EFBAL

FSTA

LASER

TJP

TGL

TOFF

TES

HFL

CLV

GND

RF-

LA9250M

No. 5981-16/17

LA9250M

Sample Application Circuit

APC

LA9250M

VCA

SLED SERVO

F. SERVO

&F. LOGIC

I/V

RF DET

REF

SLC

RF AMP

BAL

T. SERVO

&T. LOGIC

SPINDLE

SERVO

LATCH

GND

VDD

10pF

GND

10k

100

0.33

0.1

0.047

0.15

0.1

REF

0.01

220

APC.ADJ

LASER

100

FSS.SW:Hi +F-SEARCH

LOW: +-

F-SEARCH

0.022

0.01

4.7

SLC

SLI

DEF

DRF

FSC

TBC

FSS

VCC

REFI

LF2

PH1

BH1

LDD

10k

15k

1.8k

470k

24k

FD-

FA-

FE-

SP-

SPG

SPD

SLEQ

REF

SLD

OSC

SL-

39k

0.0047

47k

56k

P-CP

220k

2.2k

REF

4.7k

560

56k

220k

10k

100k

LDS

20k

4pF

10k

51k

10pF

0.001

0.033

330

56k

22k

15k

9.1k

MCN1

0.01

0.001

0.0033

0.47

100pF

P-CP

SLD

0.001

0.22

33k

0.15

2.7k

0.01

P-CP

330

0.033

0.22

0.0033

0.22

GND

REF

D-V

REF

DXX

2.2k

REF

TOFF

REF

390k

0.1

0.01

0.1

330

22k

680

33k

56k

1.2k

0.1

100

0.1

GND

SCI

TESI

FIN1

FIN2

VCA

TGRF.Hi TE GAIN DCES NOT FOLLOW RF LEVEL.

Micro-controller

A11271

SLOF

TGRF

SP8

BAL

FSTA

LASER

TJP

TGL

TOFF

TES

HFL

CLV

GND

LC78626KE

DEF1

TAI

PDO

ISET

EFMO

EFMIN

TEST2

CLV+

CLV-

V/P

HFL

TES

EFLG

SBSY

OUT

XVDD

MUTE

RVDD

RCHO

LCH0

LVDD

MUTE

N.C.

TEST4

TEST1

TEST5

4.2M

16M

TEST11

RES

CQCK

COIN

SQOUT

RWC

WRQ

FSX

SBCK

SFSY

TOFF

TCL

JP+

JP-

PCK

FSEQ

VDD

CONT1

CONT2

CONT3

CONT4

CONT5

EMPH

C2F

DOUT

TEST3

PS No. 5981-17/17

LA9250M

This catalog provides information as of April, 2000. Specifications and information herein are subject to
change without notice.

Specifications of any and all SANYO products described or contained herein stipulate the performance,
characteristics, and functions of the described products in the independent state, and are not guarantees
of the performance, characteristics, and functions of the described products as mounted in the customer's
products or equipment. To verify symptoms and states that cannot be evaluated in an independent device,
the customer should always evaluate and test devices mounted in the customer's products or equipment.

SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all
semiconductor products fail with some probability. It is possible that these probabilistic failures could
give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire,
or that could cause damage to other property. When designing equipment, adopt safety measures so
that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective
circuits and error prevention circuits for safe design, redundant design, and structural design.

In the event that any or all SANYO products (including technical data, services) described or contained
herein are controlled under any of applicable local export control laws and regulations, such products must
not be exported without obtaining the export license from the authorities concerned in accordance with the
above law.

No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system,
or otherwise, without the prior written permission of SANYO Electric Co., Ltd.

Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification"
for the SANYO product that you intend to use.

Information (including circuit diagrams and circuit parameters) herein is for example only; it is not
guaranteed for volume production. SANYO believes information herein is accurate and reliable, but
no guarantees are made or implied regarding its use or any infringements of intellectual property rights
or other rights of third parties.

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: LA9250M

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: LA9250M