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Электронный компонент: LC75838E

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Ordering number : ENN7135
D2001TN (OT) No. 7135-1/24
Overview
The LC75863E and LC75863W are 1/3 duty LCD display
drivers that can directly drive up to 75 segments and can
control up to four general-purpose output ports. These
products also incorporate a key scan circuit that accepts
input from up to 30 keys to reduce printed circuit board
wiring.
Features
Key input function for up to 30 keys (A key scan is
performed only when a key is pressed.)
1/3duty - 1/2bias and 1/3duty - 1/3bias drive schemes
can be controlled from serial data (up to 75 segments).
Sleep mode and all segments off functions that are
controlled from serial data.
Segment output port/general-purpose output port
function switching that is controlled from serial data.
Serial data I/O supports CCB format communication
with the system controller.
Direct display of display data without the use of a
decoder provides high generality.
Independent V
LCD
for the LCD driver block (V
LCD
can
be set to in the range V
DD
-0.5 to 6.0 volts.)
Provision of an on-chip voltage-detection type reset
circuit prevents incorrect displays.
RC oscillator circuit.
Package Dimensions
unit: mm
3156-QIP48E
unit: mm
3163A-SQFP48
14.0
17.2
1.5
1.5
1.6
0.15
0.35
0.1
15.6
0.8
1.0
3.0max
1
48
12
13
24
25
36
37
2.7
14.0
17.2
1.5
1.5
1.6
1.0
SANYO: QIP48E
[LC75863E]
0.5
7.0
9.0
0.15
0.18
0.75
0.5
0.75
0.75
0.5
0.75
0.5
0.1
1
12
13
24
25
36
37
48
7.0
9.0
1.7max
SANYO: SQFP48
[LC75863W]
LC75863E, 75863W
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
1/3 Duty LCD Display Drivers with Key Input Function
CMOS IC
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft's
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
CCB is a trademark of SANYO ELECTRIC CO., LTD.
CCB is SANYO's original bus format and all the bus
addresses are controlled by SANYO.
No. 7135-2/24
LC75863E, 75863W
Parameter
Symbol
Conditions
Ratings
Unit
Maximum supply voltage
V
DD
max
V
DD
0.3 to +7.0
V
V
LCD
max
V
LCD
0.3 to +7.0
V
IN
1
CE, CL, DI
0.3 to +7.0
Input voltage
V
IN
2
OSC,TEST
0.3 to V
DD
+0.3
V
V
IN
3
V
LCD
1, V
LCD
2, KI1 to KI5
0.3 to V
LCD
+0.3
V
OUT
1
DO
-0.3 to +7.0
Output voltage
V
OUT
2
OSC
0.3 to V
DD
+0.3
V
V
OUT
3
S1 to S25, COM1 to COM3, KS1 to KS6, P1 to P4
0.3 to V
LCD
+0.3
I
OUT
1
S1 to S25
300
A
Output current
I
OUT
2
COM1 to COM3
3
I
OUT
3
KS1 to KS6
1
mA
I
OUT
4
P1 to P4
5
Allowable power dissipation
Pd max
Ta = 85C
150
mW
Operating temperature
Topr
40 to +85
C
Storage temperature
Tstg
55 to +125
C
Specifications
Absolute Maximum Ratings
at Ta=25C, V
SS
=0V
Pin Assignment
K
I
3
K
I
4
VDD
S23
COM1
KI5
S22
S21
S20
VLCD
VLCD1
VLCD2
VSS
LC75863E
(QIP48E)
LC75863W
(SQFP48)
TEST
OSC
DO
CE
CL
36
25
37
24
13
12
1
48
DI
K
I
1
K
I
2
K
S
4
K
S
5
K
S
6
C
O
M
3
K
S
1
/
S
2
4
C
O
M
2
S
1
1
S
1
2
K
S
2
/
S
2
5
K
S
3
S19
S18
S17
S16
S15
S14
S13
S
7
S
8
S
9
S
1
0
S
5
S
6
P
3
/
S
3
P
4
/
S
4
P
1
/
S
1
P
2
/
S
2
Top view
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
Supply voltage
V
DD
V
DD
4.5
6.0
V
V
LCD
V
LCD
V
DD
0.5
6.0
Input voltage
V
LCD
1
V
LCD
1
2/3 V
LCD
V
LCD
V
V
LCD
2
V
LCD
2
1/3 V
LCD
V
LCD
Input high level voltage
V
IH
1
CE, CL, DI
0.8 V
DD
6.0
V
V
IH
2
KI1 to KI5
0.6 V
DD
V
LCD
Input low level voltage
V
IL
CE, CL, DI, KI1 to KI5
0
0.2 V
DD
V
Allowable Operating Ranges
at Ta = 40 to +85C, V
SS
=0V
Continued on next page.
No. 7135-3/24
LC75863E, 75863W
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
Hysteresis
V
H
CE, CL, DI, KI1 to KI5
0.1 V
DD
V
Power-down detection voltage
V
DET
2.5
3.0
3.5
V
Input high level current
I
IH
CE, CL, DI: V
I
= 6.0V
5.0
A
Input low level current
I
IL
CE, CL, DI: V
I
= 0V
5.0
A
Input floating voltage
V
IF
KI1 to KI5
0.05 V
DD
V
Pull-down resistance
R
PD
KI1 to KI5: V
DD
= 5.0V
50
100
250
k
Output off leakage current
I
OFFH
DO: VO = 6.0V
6.0
A
V
OH
1
KS1 to KS6: I
O
= 500A
V
LCD
1.0 V
LCD
0.5 V
LCD
0.2
Output high level voltage
V
OH
2
P1 to P4: I
O
= 1mA
V
LCD
1.0
V
V
OH
3
S1 to S25: I
O
= 20A
V
LCD
1.0
V
OH
4
COM1 to COM3: I
O
= 100A
V
LCD
1.0
V
OL
1
KS1 to KS6: I
O
= 25A
0.2
0.5
1.5
V
OL
2
P1 to P4: I
O
= 1mA
1.0
Output low level voltage
V
OL
3
S1 to S25: I
O
= 20A
1.0
V
V
OL
4
COM1 to COM3: I
O
= 100A
1.0
V
OL
5
DO: I
O
= 1mA
0.1
0.5
V
MID
1
COM1 to COM3: 1/2bias, I
O
= 100A
1/2V
LCD
1.0
1/2V
LCD
+ 1.0
V
MID
2
S1 to S25: 1/3bias,I
O
= 20A
2/3V
LCD
1.0
2/3V
LCD
+ 1.0
Output middle level voltage
*
2
V
MID
3
S1 to S25: 1/3bias, I
O
= 20A
1/3V
LCD
1.0
1/3V
LCD
+ 1.0
V
V
MID
4
COM1 to COM3: 1/3bias,I
O
= 100A
2/3V
LCD
1.0
2/3V
LCD
+ 1.0
V
MID
5
COM1 to COM3: 1/3bias,I
O
= 100A
1/3V
LCD
1.0
1/3V
LCD
+ 1.0
Oscillator frequency
fosc
OSC: R
OSC
= 39k
, C
OSC
= 1000pF
30.4
38
45.6
kHz
I
DD
1
V
DD
:Sleep mode
100
I
DD
2
V
DD
: V
DD
= 6.0V, output open,fosc = 38kHz
270
540
Current drain
I
LCD
1
V
LCD
: Sleep mode
5
A
I
LCD
2
V
LCD
: V
LCD
= 6.0V, output open, 1/2bias,
100
200
fosc = 38kHz
I
LCD
3
V
LCD
: V
LCD
= 6.0V, output open, 1/3bias,
60
120
fosc = 38kHz
Electrical Characteristics for the Allowable Operating Ranges
Note:
*
2. Excluding the bias voltage generation divider resistor built into V
LCD
1 and V
LCD
2. (See Figure 1.)
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
Recommended external resistance
R
OSC
OSC
39
k
Recommended external capacitance
C
OSC
OSC
1000
pF
Guaranteed oscillator range
f
OSC
OSC
19
38
76
kHz
Data setup time
t
ds
CL, DI
:Figure 2
160
ns
Data hold time
t
dh
CL, DI
:Figure 2
160
ns
CE wait time
t
cp
CE, CL
:Figure 2
160
ns
CE setup time
t
cs
CE, CL
:Figure 2
160
ns
CE hold time
t
ch
CE, CL
:Figure 2
160
ns
High level clock pulse width
t
H
CL
:Figure 2
160
ns
Low level clock pulse width
t
L
CL
:Figure 2
160
ns
Rise time
t
r
CE, CL, DI
:Figure 2
160
ns
Fall time
t
f
CE, CL, DI
:Figure 2
160
ns
DO output delay time
t
dc
DO R
PU
=4.7k
, C
L
=10pF
*
1
:Figure 2
1.5
s
DO rise time
t
dr
DO R
PU
=4.7k
, C
L
=10pF
*
1
:Figure 2
1.5
s
Note:
*
1. Since DO is an open-drain output, these times depend on the values of the pull-up resistor R
PU
and the load capacitance C
L
.
Continued from preceding page.
1. When CL is stopped at the low level
Figure 2
No. 7135-4/24
LC75863E, 75863W
tdh
50%
VIH1
VIH1
VIL
VIL
VIH1
VIL
tdr
tdc
tch
tcs
tcp
tds
tr
CL
tL
tH
tf
DO
DI
D1
D0
CE
2. When CL is stopped at the high level
50%
VIH1
VIL
tdh
VIH1
VIL
VIH1
VIL
tdr
tdc
tch
tcs
tcp
tds
tf
CL
tH
tL
tr
DO
DI
D1
D0
CE
Figure 1
V
LCD
To the common segment driver
Excluding these resistors.
V
LCD
2
V
LCD
1
Block Diagram
No. 7135-5/24
LC75863E, 75863W
VDET
CCB
INTERFACE
COM1
COM2
COM3
COMMON
DRIVER
CLOCK
GENERATOR
VSS
VLCD2
VLCD1
VLCD
CE
VDD
DI
TEST
CL
DO
OSC
KI5
KI4
KI3
KI2
KI1
KS6
KS5
KS4
KS3
S25/KS2
S24/KS1
KEY SCAN
KEY BUFFER
CONTROL
REGISTER
SHIFT REGISTER
SEGMENT DRIVER & LATCH
S1/P1
S3/P3
S2/P2
S4/P4
S5
S23