Ordering number : ENN

6349

51200RM (OT)/30899TH (OT) No. 6349-1/5

Overview

The LC82211T is a high-speed JPEG codec that support
motion JPEG. The encode function compresses digital
video (YUV422) in real time and the decode function
expands compressed code data and outputs a digital video
signal. The LC82211T can support a wide range of digital
video applications including cameras and video capture
systems. Since the LC82211T includes 4 megabits of
image memory (DRAM) on chip, it can significantly
reduce the mounting area required for this functionality.

Features

· Implements encoding and decoding based on the JPEG

standard.

· Processes 640

480 pixel images at 30 frames per

second.

· On-chip image memory (4M DRAM)
· Image memory compression function that reduce image

memory requirements by one half.

· The capture and display image size, and the compression /

expansion image size can be set to arbitrary values
independently.

· Image memory can be accessed from the CPU bus.
· YUV422 to YUV420 subsampling function
· DMA transfer support. Single mode, demand mode, and

Hitachi SH mode are supported.

· Maximum operating clock frequency: 18 MHz
· Supply voltage: 3.3 V
· Package: TQFP-120

Package Dimensions

unit: mm

3257-TQFP120

Preliminary

LC82211T

SANYO Electric Co.,Ltd. Semiconductor Company

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

Motion JPEG Codec

CMOS IC

120

0.4

14.0

(1.2)

(0.5)

0.125

16.0

0.5

0.15

1.2max

0.1

0.4

14.0

(1.2)

(1.0)

16.0

SANYO: TQFP120

[LC82211T]

Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft's
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.

No. 6349-3/5

LC82211T

Pin Functions

Pin No.

I/O

Attribute

Function

CLK

Clock input

ZRESET

Reset

ZWE

DRAM Write Enable (Connected internally)

ZRAS0

DRAM RAS0 (Connected internally)

ZRAS1

DRAM RAS1 (Unused)

MA0

MA1

DRAM Address (Connected internally)

MA2

MA3

CPUTYPE

0: Intel Mode, 1: Motorola Mode

DRAK

Hitachi SH series DRAK

MA4

MA5

MA6

DRAM address (Connected internally)

MA7

MA8

MA9

ZOE

DRAM Output Enable (Connected internally)

ZCASH

DRAM CASH (Connected internally)

ZCASL

DRAM CASL (Connected internally)

ZIRQ

Interrupt request

ZCS

Chip select

ZWR/ZDS

Intel: WR, Motolora: DS

ZRD/RW

Intel: RD, Motolora: RW

ZDRQ

DMA Request

ZDACK

DMA Acknowledge

RDY

Intel: Ready, Motolora: DTACK

CPU Address

I/O

CPU Data

I/O

CPU Data

I/O

Continued on next page.

No. 6349-4/5

LC82211T

Continued from preceding page.

Pin No.

I/O

Attribute

Function

I/O

CPU Data

D10

I/O

D11

I/O

D12

I/O

CPU Data

D13

I/O

D14

I/O

D15

I/O

GND

ZPDN

Power down

MD8

I/O

MD9

I/O

DRAM data (Connected internally)

MD10

I/O

MD11

I/O

MD12

I/O

MD13

I/O

DRAM data (Connected internally)

MD14

I/O

CLKSEL

Clock selection 0: No divider circuit, 1: Divider circuit used

MD15

I/O

DRAM data (Connected internally)

TEST

Test or clock selection (see note)

MD0

I/O

DRAM data (Connected internally)

MD1

I/O

MD2

I/O

DRAM data (Connected internally)

MD3

I/O

MD4

I/O

MD5

I/O

DRAM data (Connected internally)

MD6

I/O

MD7

I/O

DIR

Video bus I/O direction

C0/R0

I/O

C1/R1

I/O

Video data

C2/R2

I/O

C3/R3

I/O

C4/R4

I/O

Video data

C5/B0

I/O

100

C6/B1

I/O

Video data

Continued on next page.

PS No. 6349-5/5

LC82211T

This catalog provides information as of May, 2000. Specifications and information herein are subject to
change without notice.

Specifications of any and all SANYO products described or contained herein stipulate the performance,
characteristics, and functions of the described products in the independent state, and are not guarantees
of the performance, characteristics, and functions of the described products as mounted in the customer's
products or equipment. To verify symptoms and states that cannot be evaluated in an independent device,
the customer should always evaluate and test devices mounted in the customer's products or equipment.

SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all
semiconductor products fail with some probability. It is possible that these probabilistic failures could
give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire,
or that could cause damage to other property. When designing equipment, adopt safety measures so
that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective
circuits and error prevention circuits for safe design, redundant design, and structural design.

In the event that any or all SANYO products (including technical data, services) described or contained
herein are controlled under any of applicable local export control laws and regulations, such products must
not be exported without obtaining the export license from the authorities concerned in accordance with the
above law.

No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system,
or otherwise, without the prior written permission of SANYO Electric Co., Ltd.

Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification"
for the SANYO product that you intend to use.

Information (including circuit diagrams and circuit parameters) herein is for example only; it is not
guaranteed for volume production. SANYO believes information herein is accurate and reliable, but
no guarantees are made or implied regarding its use or any infringements of intellectual property rights
or other rights of third parties.

Continued from preceding page.

Pin No.

I/O

Attribute

Function

101

C7/B2

I/O

Video data

102

Y0/B3

I/O

Video data

103

Y1/B4

I/O

104

105

106

Y2/G0

I/O

107

Y3/G1

I/O

108

Y4/G2

I/O

Video data

109

Y5/G3

I/O

110

Y6/G4

I/O

111

Y7/G5

I/O

112

113

114

VSYNC

Vertical sync signal

115

HSYNC

Horizontal sync signal

116

PIXCLK

Pixel clock

117

FIELD

Field signal

118

PXEN

Pixel enable (1: Enable, 0: Disable)

119

HACTIVE

Horizontal active period output

120

Notes:
· Signal names starting with Z are active-low signals. Signal names starting with S are Schmitt inputs, and those starting with R have a built-in pull-up resistor.
· Clock internal divider mode

TEST/CLKSEL3

CLKSEL

MODE

No internal divider

Internally divided by 2

Internally divided by 3

Test mode

Note:

1. This signal goes low during the vertical blanking period.

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