91400 RM (IM) HO No.6722-1/29
Ver.1.03
21700
Preliminary
Overview
The LC868364A microcontroller is an 8-bit single chip microcontroller with the following on-chip functional blocks:
- CPU: Operable at a minimum bus cycle time of 0.5
s
- On-chip ROM capacity: 64K bytes
- On-chip RAM capacity: 512 bytes
- Dot-matrix liquid crystal display (LCD) automatic display controller/driver
- External memory
- 16-bit timer/counter (or two 8-bit timers)
- 16-bit timer/PWM (or two 8-bit timers)
- 13-source 9-vectored interrupt function
All of the above functions are fabricated on a single chip.
Features
(1) Read Only Memory (ROM):
65,280
8 bits
(2) Random Access Memory (RAM): 512
8 bits (calculation area)
128
8 bits (display area)
8-Bit Single Chip Microcontroller with
64K-Byte ROM and 512-Byte RAM On Chip
LC868364A
Ordering number : ENN*6722
CMOS IC
LC868364A
No.6722-2/29
(3) Bus Cycle Time/Instruction Cycle Time
Bus cycle time
Instruction Cycle Time
System Clock Oscillation
Oscillation Frequency
Voltage Other
12MHz
OCR7=0
0.5
s
1
s Ceramic
(CF)
6MHz
3.3-6.5V
OCR7=1
0.75
s 1.5
s Ceramic
(CF)
4MHz
2.7-6.5V
OCR7=1
6MHz
OCR7=0
1.0
s
2
s Ceramic
(CF)
3MHz
2.4-6.5V
OCR7=1
7.5
s 15.0
s OCR7=0
3.8
s 7.5
s
Internal RC
(or external RC)
800kHz 2.4-6.5V
OCR7=1
183
s 366
s OCR7=0
93
s 183
s
Crystal (Xtal)
32.768kHz
2.2-6.5V
OCR7=1
* Bus cycle time: ROM-read period OCR7: Oscillation control register bit-7
(4) Ports
- Input/output ports: 6 ports (48 terminals)
I/O programmable in nibble units:
1 port (8 terminals)
I/O programmable for each bit individually: 5 ports (40 terminals)
- Input port: 1 port (4 terminals)
- LCD drive common output ports:
32 terminals/16 terminals (switched by mask option)
- LCD drive segment output ports:
32 terminals/48 terminals (switched by mask option)
(5) External Program Memory Access Function
- Ports
1. Data input/output:
1 port (8 terminals)
2. Address output:
2 ports (16 terminals)
3. Bank address output: Use normal I/O ports as bank address output by program control.
- External program memory access function
External program memory space: 64K bytes
Internal/external program can be switched by program. (at initial: internal program operation mode)
Enabling/ disabling of switching from external program to internal program is provided.
- External data memory access function
By LDC instruction execution:
External data memory space: 64K bytes
(Use normal I/O ports as bank address output by program control.)
1. When internal program is operating:
Access to the internal or external ROM data is selectable by program.
2. When external program is operating:
Only the external ROM data can be accessed.
(Only the external program memory space (64K bytes) can be referred.)
- External RAM memory access function (Able to be used when internal program is executed)
By LDX instruction/STX instruction execution:
External RAM space: 64K bytes (Use normal I/O ports as bank address output by program control.)
(When using the external RAM space in the external program operation mode, refer to the "LC868364 User's Manual"
for details.)
(6) LCD Automatic Display Controller/Common Driver/Segment Driver
- Display duty:
1/32 duty, 1/16 duty
- Display bias:
1/5, 1/7 bias
- Graphic display
A maximum of 1,024 dots capability (without external segment driver)
32
80 dots display capability per each segment driver (LC868920A) can be expanded, when 1/32 duty is selected.
Note: If the display capability is expanded by the LC86920A when 1/16 duty is selected, only S1-S32 of the LC868364A can be
used, and S33-S48 can not be used. (Refer to the LC868920A specification sheet.)
LC868364A
No.6722-3/29
- LCD contrast
LCD display contrast is changeable by program.
- LCD power supply (max. 6V): externally boosted output terminal
(assigned at P40 terminal, The terminal function is selectable by program.)
- LCD driver
Following two kinds of combination can be switched by mask option.
Segment Output Terminals
Common Output Terminals
1 32
32
2 48
16
- LCD clock: Select the crystal oscillation circuit output
(in order to reduce the current consumption when LCD is on)
- LCD drive frequency: 102Hz (32.768kHz crystal oscillation)
(7) Serial Interface
- Synchronous 8-bit serial interface
2 channels (built-in 8-bit baud rate generator)
(8) Timer
- Timer 0 (T0L, T0H)
16-bit timer/counter
2-bit prescaler + 8-bit programmable prescaler
Mode 0: Two 8-bit timers with programmable prescaler
Mode 1: 8-bit timer with programmable prescaler + 8-bit counter
Mode 2: 16-bit timer with programmable prescaler
Mode 3: 16-bit counter
- Timer 1 (T1L, T1H)
16-bit timer/PWM
Mode 0: Two 8-bit timers
Mode 1: 8-bit timer + 8-bit PWM
Mode 2: 16-bit timer
Mode 3: Variable bit PWM (9-16 bits)
- Base Timer
Generates an overflow every 500ms for a clock application. (using a 32.768kHz crystal oscillation for the base timer
clock.)
Clock for the base timer is selectable from 32.768kHz crystal oscillation, system clock or programmable prescaler
output of Timer 0.
(9) Buzzer Output
- Built-in 4kHz and 2kHz buzzer generation function
(10) Remote Receiver Circuit (shares with P73/INT3/T0IN terminal)
- Noise rejection function
- Polarity switch function
(11) Watchdog Timer
- External RC circuit is required (connected to P70/INT0 terminal)
- Interrupt or system reset is activated when the timer overflows.
LC868364A
No.6722-4/29
(12) Interrupt
- 13-source and 9-vectored interrupt function:
1. External interrupt INT0 (including watchdog timer)
2. External interrupt INT1
3. External interrupt INT2, timer/counter T0L (lower 8 bits of Timer 0)
4. External interrupt INT3, base timer
5. Timer/counter T0H (upper 8 bits of Timer 0)
6. Timer T1L (lower 8 bits of Timer 1), Timer T1H (upper 8 bits of Timer 1)
7. Serial interface SIO0
8. Serial interface SIO1
9. Port 0 or Port 3
- Built-in Interrupt Priority Control
Three interrupt priorities are supported (low, high and highest) and multi-level nesting is possible. Low or high
priority can be assigned to the 11 interrupt sources, from the external interrupt INT2, Timer/Counter T0L (Timer 0,
lower 8 bits) to Port 0 or Port 3. For the external interrupt INT0 and INT1, low or highest priority can be set
regardless of the interrupt priority register.
(13) Sub-routine Stack Level
- A maximum of 128 levels: (sets stack inside RAM)
(14) Multiplication/Division Instruction
- 16 bits
8-bit (7 instruction-cycle-times)
- 16 bits 8-bit (7 instruction-cycle-times)
(15) Three Types of Oscillation Circuit
- Built-in/external RC oscillation circuit used for the system clock
- CF oscillation circuit used for the system clock
- Xtal oscillation circuit used for the clock, system clock and LCD
* Crystal oscillation clock is also used as LCD display base clock. The current consumption of this microcontroller
becomes smaller than the Sanyo's previous microcontrollers by this configuration.
Built-in/external RC oscillation circuit: switched by mask option
(16) Standby Function
- HALT mode
In this operation mode, the program execution is stopped. The mode can be released by a system reset or an
interrupt request.
- HOLD mode
The HOLD mode is used to stop the oscillations;
CF, RC, and Xtal oscillations. This mode can be released by the following conditions:
System reset
Feed the selected level to INT0 or INT1 terminals.
Feed "L" level to the Port 0 or Port 3.
(17) Operating Supply Voltage Range
- VDD=2.4 to 6.5V
- VLCD=2.5 to 6.5V (LCD power supply)
(18) Shipping Form
- Chip
(19) Development Tool
- Evaluation (EVA) chip:
LC868099
- Emulator:
EVA86000(main) + ECB868300 (evaluation board)
LC868364A
No.6722-5/29
Pad Assignment
(Display duty: 1/32 duty)
- Chip size (X
Y): 5.38mm
4.84mm
- Thickness of chip : 480
m
- Pad size
: 100
m
100
m
- Pad pitch
: 120
m
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
COM32
COM31
COM30
COM29
COM28
COM27
COM26
COM25
COM24
COM23
COM22
COM21
COM20
COM19
COM18
COM17
COM16
COM15
COM14
COM13
COM12
COM11
COM10
COM9
COM8
COM7
COM6
COM5
COM4
COM3
COM2
COM1
VDD
CF2
CF1
VSS
XT2
XT1
RES
EROE
ADLC
P27
P26
P25
P24
P23
P22
P21
P20
P07
P06
P05
P04
P03
P02
P01
P00
P37
P36
P35
P34
P33
P32
P31
P30
VDD
1
135
130
125
120
115
110
105
103
40
45
50
55
60
65
70
S
E
G26
S
E
G25
S
E
G24
S
E
G23
S
E
G22
S
E
G21
S
E
G20
S
E
G19
S
E
G18
S
E
G17
S
E
G16
S
E
G15
S
E
G14
S
E
G13
S
E
G12
S
E
G11
S
E
G10
SE
G
9
SE
G
8
SE
G
7
SE
G
6
SE
G
5
SE
G
4
SE
G
3
SE
G
2
SE
G
1
V1
V2
V3
V4
V5
VLC
D
RC
1
RC
2
VS
S
P4
0
P4
1
P4
2
P4
3
P4
4
P4
5
P4
6
P4
7
P7
0
P7
1
P7
2
P7
3
P1
0
P1
1
P1
2
P1
3
P1
4
P1
5
P1
6
P1
7
P5
7
P5
6
P5
5
P5
4
P5
3
P5
2
P5
1
P5
0
35 30 25 20 15 10 5
2
75 80 85 90 95 100
102
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