91400 RM (IM) HK / SY No.6715-1/25
Ver.1.03
O3098
Preliminary
Overview
The LC875164A/48A/32A microcontroller is 8-bit single chip microcontroller with the following on-chip functional blocks:
- CPU: Operable at a minimum bus cycle time of 100ns
- 64K/48K/32K bytes ROM
- 1024 byte RAM
- two high performance 16 bit timer/counters (can be divided into 8 bit units)
- two 8 bit timers with prescalers
- timer for use as date/time clock
- two synchronous serial I/O ports (with automatic block transmit/receive function)
- one asynchronous/synchronous serial I/O port
- 12-bit PWM
2
- 8-channel
8-bit AD converter
- high speed 8-bit parallel interface
- 19-source 10-vectored interrupt system
All of the above functions are fabricated on a single chip.
Features
(1) Read Only Memory
- 65536
8 bits (LC875164A)
- 49151
8 bits (LC875148A)
- 32512
8 bits (LC875132A)
8-Bit Single Chip Microcontroller with
64/48/32K-Byte ROM and 1024-Byte RAM On Chip
LC875164A/48A/32A
Ordering number : ENN*6715
CMOS IC
LC875164A/48A/32A
No.6715-2/25
(2) Bus Cycle Time
- 100ns (10MHz)
Note: The bus cycle time indicates ROM read time.
(3) Minimum Instruction Cycle Time
: 300ns (10MHz)
(4) Ports
- Input/output ports
Each bit data direction programmable
59 (P1n,P2n,P3n,P70 to P73,P8n,PAn,PBn,PCn,S2Pn)
Nibble data direction programmable
8 (P0n)
- Input ports
2 (XT1,XT2)
- PWM Output ports
2 (PWM0,PWM1)
- Oscillator pins
2 (CF1,CF2)
- Reset pin
1 ( RES )
- Power supply
6 (VSS1 to 3,VDD1 to 3)
(5) Timers
- Timer0: 16 bit timer/counter with capture register
Mode 0: 2 channel 8 bit timer with programmable 8 bit prescaler and 8 bit capture register
Mode 1: 8 bit timer with 8 bit programmable prescaler and 8 bit capture register + 8 bit counter with 8 bit
capture register
Mode 2: 16 bit timer with 8 bit programmable prescaler and 16 bit capture register
Mode 3: 16 bit counter with 16 bit capture register
- Timer1: PWM/16 bit timer/counter (with toggle output)
Mode 0: 8 bit timer (with toggle output) + 8 bit timer counter (with toggle output)
Mode 1: 2 channel 8 bit PWM
Mode 2: 16 bit timer/counter (with toggle output)
Mode 3: 16 bit timer (with toggle output) Lower order 8 bits can be used as PWM output.
- Timer4: 8-bit timer with 6-bit prescaler
- Timer5: 8-bit timer with 6-bit prescaler
- Base timer
1. The clock signal can be selected from any of the following: sub-clock (32.768kHz crystal oscillator), system
clock, and prescaler output for timer 0.
2. Interrupts can be selected to occur at one of five different times.
(6) SIO
- SIO0: 8 bit synchronous serial interface
1. LSB first/MSB first function available
2. Internal 8-bit baud-rate generator (maximum transmit clock period 4/3 T
CYC
)
3. Continuous automatic data communications (1 - 256 bits)
- SIO1: 8 bit asynchronous/synchronous serial interface
Mode 0: Synchronous 8 bit serial IO (2-wire or 3-wire, transmit clock 2 - 512 T
CYC
)
Mode 1: Asynchronous serial IO (half duplex, 8 data bits, 1 stop bit, baud rate 8 - 2048 T
CYC
)
Mode 2: Bus mode 1 (start bit, 8 data bits, transmit clock 2 - 512 T
CYC
)
Mode 3: Bus mode 2 (start detection, 8 data bits, stop detection)
- SIO2: 8 bit synchronous serial interface
1. LSB-first
2. Built in 8-bit baud-rate generator (Maximum clock period 4/3 T
CYC
)
3. Continuous automatic data communication (1 - 32 bytes)
(7) AD converter
- 8-bits
8-channels
(8) PWM
- 2 channel synchronous variable 12 bit PWM
(9) Parallel interface
- RS, RD , WR , CS0 - CS2 Outputs (reversible polarity)
- read/write possible in 1 T
CYC
LC875164A/48A/32A
No.6715-3/25
(10) Remote control receiver circuit (connected to P73/INT3/T0IN terminal)
- Noise rejection function (noise rejection filter time constant can selected from 1/32/128 T
CYC
)
(11) Watchdog timer
- The watchdog timer period set by external RC.
- Watchdog timer can be set to produce interrupt, system reset
(12) Interrupts
- 19-source, 10-vectored interrupts:
1. Three level (low, high and highest) multiple interrupts are supported. During interrupt handling, an equal or
lower level interrupt request is refused.
2. If interrupt requests to two or more vector addresses occur at once, the higher level interrupt takes precedence.
In the case of equal priority levels, the vector with the lowest address takes precedence.
No.
Vector
Selectable Level
Interrupt signal
1
00003H
X or L
INT0
2
0000BH
X or L
INT1
3
00013H
H or L
INT2/T0L/INT4
4
0001BH
H or L
INT3/INT5/Base timer
5
00023H
H or L
T0H
6
0002BH
H or L
T1L/T1H
7
00033H
H or L
SIO0
8
0003BH
H or L
SIO1/SIO2
9
00043H
H or L
ADC
10
0004BH
H or L
Port 0/T4/T5/PWM0, 1
Priority Level : X > H > L
For equal priority levels, vector with lowest address takes precedence.
(13) Subroutine stack levels
- 512 levels max. Stack is located in RAM
(14) Multiplication and division
- 16 bit
8 bit
(executed in 5 cycles)
- 24 bit
16 bit (12 cycles )
- 16 bit 8 bit
(8 cycles)
- 24 bit 16 bit (12 cycles)
(15) Oscillation circuits
- On-chip RC oscillation circuit used for system clock
- On-chip CF oscillation circuit used for system clock
- On-chip Crystal oscillation circuit used for system clock and time-base clock
(16) Standby function
- HALT mode
HALT mode is used to reduce power consumption. Program execution is stopped. Peripheral circuits still operate.
1. Oscillation circuits are not stopped automatically
2. Release on system reset
- HOLD mode
HOLD mode is used to reduce the power dissipation. Both program execution and peripheral circuits are stopped.
1. CF, RC and crystal oscillation circuits stop automatically
2. Release occurs on any of the following conditions
input to the reset pin goes low
a specified level is input to at least one of INT0, INT1, INT2, INT4, INT5
an interrupt condition arises at port 0
LC875164A/48A/32A
No.6715-4/25
- X'tal HOLD mode
X'tal HOLD mode is used to reduce power consumption. Program execution is stopped. All peripheral circuits
except the base timer are stopped.
1. CF and RC oscillation circuits stop automatically
2. Crystal oscillator is maintained in its state at HOLD mode inception.
3. Release occurs on any of the following conditions
input to the reset pin goes low
a specified level is input to at least one of INT0, INT1, INT2, INT4, INT5
an interrupt condition arises at port 0
an interrupt condition arises at the base-timer
(17) Factory shipment
- delivery form QIP80E
- delivery form SQFP80
(18) Development Tools
- Evaluation chip
: LC876099
- Emulator
: EVA87000 + ECB875100 (Evaluation chip board) + POD875100 (POD)
LC875164A/48A/32A
No.6715-5/25
Pin Assignment
Package Dimension
(unit : mm)
3174
SANYO : QIP-80E
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
PB4/D4
PB3/D3
PB2/D2
PB1/D1
PB0/D0
VSS3
VDD3
PC7/A7
PC6/A6
PC5/A5
PC4/A4
PC3/A3
PC2/A2
PC1/A1
PC0/A0
PA0/CS2#
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
SI2P2/SCK2
SI2P1/S12/SB2
SI2P0/SO2
P17/T1PWMH/BUZ
P16/T1PWML
P15/SCK1
P14/SI1/SB1
P13/SO1
P12/SCK0
P11/SI0/SB0
P10/SO0
P34
P33
P32
P31
P30
PB5
/
D5
PB6
/
D6
PB7
/
D7
P2
7
/
I
N
T
5
/T
1
I
N
P2
6
/
I
N
T
5
/T
1
I
N
P2
5
/
I
N
T
5
/T
1
I
N
P2
4
/
I
N
T
5
/T
1
I
N
P2
3
/
I
N
T
4
/T
1
I
N
P2
2
/
I
N
T
4
/T
1
I
N
P2
1
/
I
N
T
4
/T
1
I
N
P2
0
/
I
N
T
4
/T
1
I
N
P0
7
P0
6
P0
5
P0
4
P0
3
P0
2
P0
1
P0
0
VSS2
VDD2
PWM
0
PWM
1
S
I
2P
3/
S
C
K
2
0
PA
1
/
CS1
#
PA
2
/
CS0
#
PA
3
/
W
R
#
PA
4
/
RD
#
PA
5
/
RS
P7
0
/
I
N
T
0
/T
0
L
CP
P
7
1/
I
N
T
1
/
T
0H
CP
P7
2
/
I
N
T
2
/T
0
I
N
P7
3
/
I
N
T
3
/T
0
I
N
RE
S#
XT1
XT2
VSS1
CF
1
CF
2
VDD1
P8
0
/
A
N
0
P8
1
/
A
N
1
P8
2
/
A
N
2
P8
3
/
A
N
3
P8
4
/
A
N
4
P8
5
/
A
N
5
P8
6
/
A
N
6
P8
7
/
A
N
7
LC875164A/48A/32A
QIP80
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