ChipFind - документация

Электронный компонент: STK672-080

Скачать:  PDF   ZIP
Ordering number : ENN6507A
52004TN (OT) / 22002TN (OT) No. 6507-1/17
Overview
The STK672-080 is a stepping motor driver hybrid IC that
uses power MOSFETs in the output stage. It includes a
built-in microstepping controller and is based on a
unipolar constant-current PWM system. The STK672-080
supports application simplification and standardization by
providing a built-in 4 phase distribution stepping motor
controller. It supports five excitation methods: 2 phase,
1-2 phase, W1-2 phase, 2W1-2 phase, and 4W1-2 phase
excitations, and can provide control of the basic stepping
angle of the stepping motor divided into 1/16 step units. It
also allows the motor speed to be controlled with only a
clock signal.
The use of this hybrid IC allows designers to implement
systems that provide high motor torques, low vibration
levels, low noise, fast response, and high-efficiency drive.
Compared to the earlier SANYO STK672-050, the
STK672-080 features a significantly smaller package for
easier mounting in end products.
Applications
Facsimile stepping motor drive (send and receive)
Paper feed and optical system stepping motor drive in
copiers
Laser printer drum drive
Printer carriage stepping motor drive
X-Y plotter pen drive
Other stepping motor applications
Features
Can implement stepping motor drive systems simply by
providing a DC power supply and a clock pulse
generator.
<Control Block Features>
One of five drive types can be selected with the drive
mode settings (M1, M2, and M3)
--2 phase excitation drive
--1-2 phase excitation drive
--W1-2 phase excitation drive
--2W1-2 phase excitation drive
--4W1-2 phase excitation drive
Phase retention even if excitation is switched.
The MOI phase origin monitor pin is provided.
The CLK input counter block can be selected to be one of
the following by the high/low setting of the M3 input pin.
--Rising edge only
--Both rising and falling edges
Note*: Conditions: V
CC
1 = 24 V, I
OH
= 2.0 A, 2W1-2
excitation mode.
Continued on next page.
Package Dimensions
unit: mm
4186
1
15
46.6
41.2
12.7
25.5
(6.6)
14
2.0=28
3.6
0.5
2.0
8.5
4.0
0.4
2.9
1.0
[STK672-080]
STK672-080
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
Stepping Motor Driver (Sine Wave Drive) Output Current: 2.8 A (No Heat Sink
*
)
Unipolar constant-current chopper (external excitation PWM) circuit with built-in microstepping controller
Thick-Film Hybrid IC
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft's
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
The CLK input pin include built-in malfunction
prevention circuits for external pulse noise.
Both an ENABLE and RESET pin are provided as
Schmitt trigger inputs with built-in 20 k
(typical) pull-
up resistors.
No audible noise is generated by the differences in the
time constant between phases A and B when the motor
position is held fixed due to the adoption of external
excitation.
The reference voltage Vref can be set to any level
between 0 and 1/2 V
CC
2. This allows the STK672-080
to provide microstepping operation even for small motor
currents.
<Driver Block>
Provides a wide range of operatng supply voltage
required for external excitation PWM drive (V
CC
1 = 10
to 45 V).
Current detection resistor (0.15
) built-in the hybrid IC
itself.
Power MOSFETs adopted for low drive loss
Provides a motor output drive current of I
OH
= 2.8 A
(When Tc = 105C).
No. 6507-2/17
STK672-080
Parameter
Symbol
Conditions
Ratings
Unit
Maximum supply voltage1
V
CC
1 max
No signal
52
V
Maximum supply voltage2
V
CC
2 max
No signal
0.3 to +7.0
V
Input voltage
V
IN
max
Logic input pins
0.3 to +7.0
V
Phase output current
I
OH
max
0.5 s, 1 pulse, when V
CC
1 applied.
3.3
A
Repeatable avalanche current
Ear max
30
mJ
Power loss
Pd max
c-a = 0
8
W
Operating substrate temperature
Tc max
105
C
Junction temperature
Tj max
150
C
Storage temperature
Tstg
40 to +125
C
Specifications
Absolute Maximum Ratings
at Tc = 25C
Parameter
Symbol
Conditions
Ratings
Unit
Supply voltage1
V
CC
1
With input signals present
10 to 45
V
Supply voltage2
V
CC
2
With input signals present
5 5%
V
Input voltage
V
IH
0 to V
CC
2
V
Phase driver voltage handling
V
DSS
Tr1, 2, 3, and 4 (the A, A, B, and B outputs)
100 (min)
V
Phase current 1
I
OH
1
Tc = 105C, CLK
200 Hz
2.8
A
Phase current 2
I
OH
2
Tc = 80C, CLK
200 Hz
3
A
Allowable Operating Ranges
at Ta = 25C
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
Control supply current
I
CC
Pin 6 input, with ENABLE pin held low.
2.1
14
mA
Output saturation voltage
Vsat
R
L
= 12
0.65
1
V
Average output current
Io ave
Load: R = 3.5 W/L = 3.8 mH per phase
0.445
0.5
0.56
A
FET diode Forward voltage
Vdf
If = 1 A
1
1.5
V
[Control Inputs]
Input voltage
V
IH
Except for the Vref pin
4
V
V
IL
Except for the Vref pin
1
V
Input current
I
IH
Except for the Vref pin
0
1
10
A
I
IL
Except for the Vref pin
125
250
510
A
[Vref Input Pin]
Input voltage
V
I
Pin 7
0
2.5
V
Input current
I
I
Pin 7, 2.5-V input
330
415
545
A
[Control Outputs]
Output voltage
V
OH
I = 3 mA, pin MOI
2.4
V
V
OL
I = +3 mA, pin MOI
0.4
V
Electrical Characteristics
at Tc = 25C, V
CC
1 = 24 V, V
CC
2 = 5 V
Continued on next page.
Continued from preceding page.
No. 6507-3/17
STK672-080
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
[Current Distribution Ratio (AB)]
2W1-2, W1-2, 1-2
Vref
= 1/8
100
%
2W1-2, W1-2
Vref
= 2/8
92
%
2W1-2
Vref
= 3/8
83
%
2W1-2, W1-2, 1-2
Vref
= 4/8
71
%
2W1-2
Vref
= 5/8
55
%
2W1-2, W1-2
Vref
= 6/8
40
%
2W1-2
Vref
= 7/8
21
%
2
Vref
100
%
PWM frequency
fc
37
47
57
kHz
Continued from preceding page.
Note: A constant-voltage power supply must be used.
The design target value is shown for the current distribution ratio.
1
4
1
3
1
5
1
2
1
1
1
0
9
8
6
7
5
4
3
2
+
+
1
M
1
M
2
C
W
B
C
L
O
C
K
E
x
c
i
t
a
t
i
o
n

m
o
d
e
c
o
n
t
r
o
l
E
x
c
i
t
a
t
i
o
n

s
t
a
t
e

m
o
n
i
t
o
r
C
R

o
s
c
i
l
l
a
t
o
r
P
W
M

c
o
n
t
r
o
l
P
h
a
s
e
a
d
v
a
n
c
e
c
o
u
n
t
e
r
C
u
r
r
e
n
t
d
i
s
t
r
i
b
u
t
i
o
n
r
a
t
i
o

s
w
i
t
c
h
i
n
g
P
h
a
s
e

e
x
c
i
t
a
t
i
o
n

d
r
i
v
e
s
i
g
n
a
l

g
e
n
e
r
a
t
i
o
n
R
e
f
e
r
e
n
c
e

c
l
o
c
k
g
e
n
e
r
a
t
i
o
n
P
s
e
u
d
o
-
s
i
n
e
w
a
v
e

g
e
n
e
r
a
t
o
r
R
a
i
s
i
n
g

e
d
g
e
/
f
a
l
l
i
n
g

e
d
g
e
d
e
t
e
c
t
i
o
n

a
n
d

s
w
i
t
c
h
i
n
g
M
3
R
E
S
E
T
M
o
I
E
N
A
B
L
E
S
U
B
P
G
B
B
B
A
B
A
V
r
e
f
V
C
C
2
A
1
3
2
5
6
Internal Block Diagram
No. 6507-4/17
STK672-080
Test Circuit Diagrams
No. 6507-5/17
STK672-080
11
8
9
7
13
1
2
3
4
5
A
RL
AB
B
BB
6
+
VCC2
VCC2
STK672-080
Start
Vref=2.5V
V
1
2
3
4
5
A
AB
B
BB
6
VCC1
STK672-080
V
A
A13257
A13258
Vsat
Vdf
I
IH
, I
IL
loave, Icc, fc
To measuring Io ave: With SW1 set to the b position, input Vref and switch SW2.
To measuring fc: With SW1 set to the a position, set Vref to 0 V, and switch SW3.
To measuring Icc: Set the ENABLE pin low.
+
Start
11
8
9
7
13
1
2
3
4
5
A
a
b a
b
AB
B
SW2
SW3
SW1
BB
6
15
VCC2
Vref
ENABLE
VCC1
VCC1
STK672-080
A13260
8
1
6
A
A
2.5V
VCC2
M1
STK672-080
A13259
9
M2
12
M3
11
CLK
10
CWB
14
13
RESET
15
ENABLE
7
Vref
A
A
fc
IIL
IIH
No. 6507-6/17
STK672-080
7
5
A
Two-phase stepping motor
AB
6
14
14
8
14
14
9
14
14
12
15
11
13
10
14
+
+
VCC2=5V
VCC2=5V
SG
100
F or higher
PG
Vref
Ro1
Ro2
VCC2=5V
CLK
ENABLE
CBW
Vf
0.3V
RESET
MoI
VCC1=10V to 45V
STK672-080
A13261
B
BB
RoX
4
3
2
1
Ioave
IOL IOH
0A
Motor current waveform
A13262
Simplified power-on reset circuit
(This circuit cannot be used to detect
drops in the power-supply voltage.)
A value of about 100
is recommended for
R
O
2 to minimize the influence of the Vref
pin internal impedance, which is 6 k
.
R
O
X: The input impedance is 6 k
30%.
Power-on reset
The application must perform a power-on reset operation when V
CC
2 power is first applied to this hybrid IC.
Application circuit that used 2W1-2 phase excitation (microstepping operation) mode.
Setting the Motor Current
The motor current I
OH
is set by the Vref voltage on the hybrid IC pin 7. The following formula gives the relationship
between I
OH
and Vref.
R
O
X = (R
O
2
6 k
)
(R
O
2 + 6 k
) (1)
Vref = V
CC
2
R
O
X
(R
O
1 + R
O
X) (2)
1
Vref
I
OH
= --
---- (3)
k
R
S
K: 4.7 (Voltage division ratio), Rs: 0.15
(The hybrid IC's internal current detection resistor (precision: 3%)
Applications can use motor currents from the current (0.05 to 0.1 A) set by the duty of the frequency set by the oscillator
up to the limit of the allowable operating range, I
OH
= 2.8 A
Function Table
M2
0
0
1
1
M1
0
1
0
1
Phase switching clock edge timing
M3
1
2 phase excitation
1-2 phase excitation
W1-2 phase excitation
2W1-2 phase excitation
Rising edge only
0
1-2 phase excitation
W1-2 phase excitation
2W1-2 phase excitation 4W1-2 phase excitation
Rising and falling edges
Forward
Reverse
CWB
0
1
ENABLE
Motor current is cut off when low
RESET
Active low
No. 6507-7/17
STK672-080
D1
Rs
L2
VCC1
IOFF
L1
MOSFET
Enable
Divider
Latch circuit
CR
oscillator
Current
divider
Noise
filter
A (control signal)
AND
Q
S
R
800kHz
45kHz
Vref
A=1
+
ION
A13263
Functional Description
External Excitation Chopper Drive Block Description
Since this hybrid IC adopts an external excitation method, no external oscillator circuit is required.
When a high level is input to A in the basic driver block circuit shown in the figure and the MOSFET is turned on, the
comparator + input will go low and the comparator output will go low. Since a set signal with the PWM period will be
input, the Q output will go high, and the MOSFET will be turned on as its initial value.
The current I
ON
flowing in the MOSFET passes through L1 and generates a potential difference in Rs. Then, when the Rs
potential and the Vref potential become the same, the comparator output will invert, and the reset signal Q output will
invert to the low level. Then, the MOSFET will be turned off and the energy stored in L1 will be induced in L2 and the
current I
OFF
will be regenerated to the power supply. This state will be maintained until the time when an input to the
latch circuit set pin occurs.
In this manner, the Q output is turned off and on repeatedly by the reset and set signals, thus implementing constant
current control. The resistor and capacitor on the comparator input are spike removal circuit elements and synchronize
with the PWM frequency. Since this hybrid IC uses a fixed frequency due to the external excitation method and at the
same time also adopts a synchronized PWM technique, it can suppress the noise associated with holding a position when
the motor is locked.
Driver Block Basic Circuit Structure
Input Pin Functions
Pin No.
Symbol
Function
Pin circuit type
11
CLK
Phase switching clock
Built-in pull-up resistor CMOS Schmitt trigger input
10
CWB
Rotation direction setting (CW/CCW)
Built-in pull-up resistor CMOS Schmitt trigger input
15
ENABLE
Output cutoff
Built-in pull-up resistor CMOS Schmitt trigger input
8, 9, 12
M1, M2, M3
Excitation mode setting
Built-in pull-up resistor CMOS Schmitt trigger input
13
RESET
System reset
Built-in pull-up resistor CMOS Schmitt trigger input
7
Vref
Current setting
Input impedance 6 k
(typ.) 30%
Input Signal Functions and Timing
CLK (phase switching clock)
Input frequency range: DC to 50 kHz
Minimum pulse width: 10 s
Duty: 40 to 60% (However, the minimum pulse width takes precedence when M3 is high.)
Pin circuit type: Built-in pull-up resistor (20 k
, typical) CMOS Schmitt trigger structure
Built-in multi-stage noise rejection circuit
Function
--When M3 is high or open: The phase excited (driven) is advanced one step on each CLK rising edge.
--When M3 is low: The phase is advanced one step by both rising and falling edges, for a total of two steps per cycle.
CWB (Method for setting the rotation direction)
Pin circuit type: Built-in pull-up resistor (20 k
, typical) CMOS Schmitt trigger structure
Function
--When CWB is low: The motor turns in the clockwise direction.
--When CWB is high: The motor turns in the counterclockwise direction.
Notes: When M3 is low, the CWB input must not be changed for about 6.25 s before or after a rising or falling edge
on the CLK input.
ENABLE (Controls the on/off state of the A, A, B, and B excitation drive outputs and selects either operating or hold
as the internal state of this hybrid IC.)
Pin circuit type: Built-in pull-up resistor (20 k
, typical) CMOS Schmitt trigger structure
Function
--When ENABLE is high or open: Normal operating state
--When ENABLE is low: This hybrid IC goes to the hold state and excitation drive output (motor current) is forcibly
turned off. In this mode, the hybrid IC system clock is stopped and no inputs other than the
reset input have any effect on the hybrid IC state.
CLK Input Acquisition Timing (M3 = Low)
No. 6507-8/17
STK672-080
CLK input
System clock
Phase excitation counter clock
Control output timing
Excitation counter up/down
Control output switching timing
A13264
No. 6507-9/17
STK672-080
Output Pin Functions
Pin No.
Symbol
Function
Pin circuit type
14
MoI
Phase excitation monitor
Standard CMOS structure
M1, M2, and M3 (Excitation mode and CLK input edge timing selection)
Pin circuit type: Built-in pull-up resistor (20 k
, typical) CMOS Schmitt trigger structure
Valid mode setting timing: Applications must not change the mode in the period 5 s before or after a CLK signal rising
or falling edge.
Mode Setting Acquisition Timing
M2
0
0
1
1
M1
0
1
0
1
Phase switching clock edge timing
M3
1
2 phase excitation
1-2 phase excitation
W1-2 phase excitation
2W1-2 phase excitation
Rising edge only
0
1-2 phase excitation
W1-2 phase excitation
2W1-2 phase excitation 4W1-2 phase excitation
Rising and falling edges
CLK input
System clock
M1 to M3
Mode switching timing
Excitation counter up/down
Mode setting
Mode switching clock
Hybrid IC internal setting state
Phase excitation clock
A13265
Function:
RESET (Resets all parts of the system.)
Pin circuit type: Built-in pull-up resistor (20 k
, typical) CMOS Schmitt trigger structure
Function
--All circuit states are set to their initial values by setting the RESET pin low. (Note that the pulse width must be at
least 10 s.)
At this time, the A and B phases are set to their origin, regardless of the excitation mode. The output current goes to
about 71% after the reset is released.
Notes: When power is first applied to this hybrid IC, Vref must be established by applying a reset. Applications must
apply a power on reset when the V
CC
2 power supply is first applied.
Vref (Sets the current level used as the reference for constant-current detection.)
Pin circuit type: Analog input structure
Function
--Constant-current control can be applied to the motor excitation current at 100% of the rated current by applying a
voltage less than the control system power supply voltage V
CC
2 minus 2.5 V.
--Applications can apply constant-current control proportional to the Vref voltage, with this value of 2.5 V as the
upper limit.
Output Signal Functions and Timing
A, A, B, and B (Motor phase excitation outputs)
Function
--In the 4 phase and 2 phase excitation modes, a 3.75 s (typical) interval is set up between the A and A and B and B
output signal transition times.
Phase States During Excitation Switching
Excitation phases before and after excitation mode switching <clockwise direction>
No. 6507-10/17
STK672-080
B 24
24
27
28
31
3
4
5
8
11
12
15
16
19
20
25
A
A
A
0
16
17
1
A
A
B
B
B 24
25
26
27
28
29
30 31 0 1 2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
24
26
28
30 0 2
4
6
8
10
12
14
16
18
20
22
22
23
A
A
B
B
8
9
12
4
28
20
20
24
28 0 4
8
12
16
B 24
26
28
30
A
A
A
0
16
18
20
22
24
28
0
4
8
12
16
20
20
28
4
12
20
28
4
0
12
16
16
18
20
22
24
25
27
29
31
1
3
5
7
9
23
22
8
24
20
10
26
18
12
16 14
28
30
6
4
2
0
11
21
13
19
15
17
24
28 0 4
8
12
16
20
26
28
30
0
2
4
6
8
10
12
14
2
4
6
B
B
A
B
A
B
30
2
26
6
10
14
22
18
A
B
A
B
A
B
A
B
B
A
A
B
B
8
10
12
14
12
4
28
20
2W1-2 phase
2 phase
W1-2 phase
2 phase
1-2 phase
2 phase
2 phase
1-2 phase
Excitation phase according to the first clock input pulse after changing the excitation mode setting (M1 to M2)
Excitation phase immediately before setting the excitation mode
2W1-2 phase
1-2 phase
W1-2 phase
1-2 phase
1-2 phase
W1-2 phase
2 phase
W1-2 phase
2 phase
2W1-2 phase
2W1-2 phase
W1-2 phase
W1-2 phase
2W1-2 phase
1-2 phase
2W1-2 phase
24
0
8
16
20
22
30
28
4
12
20
14
6
28
4
12
A
B
A
B
29
1
25
5
9
13
21
24
28 0 4
8
12
16
20
17
A
B
A
B
29
5
13
21
28
20
4
12
17
A
B
A
B
A13266
No. 6507-11/17
STK672-080
Excitation phases before and after excitation mode switching <counterclockwise direction>
B 24
23
24
25
28
29
0 1
4
5
8
9
12
13
16
17
20
21
A
A
A
0
16
15
31
A
A
B
B
B 24
25
26
27
28
29
30 31 0 1 2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
24
26
28
30 0 2
4
6
8
10
12
14
16
18
20
22
22
23
A
A
B
B
8
7
12
4
28
20
20
24
28 0 4
8
12
16
B 24
30
A
A
A
0
16
22
24
28
0
4
8
12
16
20
20
28
4
12
16
28
24
20
0
4
12
16
18
20
22
24
25
27
29
31
1
3
5
7
9
23
22
8
24
20
10
26
18
12
16 14
28
30
6
4
2
0
11
21
13
19
15
17
24
28 0 4
8
12
16
20
26
28
30
0
2
4
6
8
10
12
14
6
B
B
A
B
A
B
30
2
26
6
10
14
22
18
A
B
A
B
A
B
A
B
B
A
A
B
B
8
14
12
4
28
20
24
0
8
16
20
26
2
10
28
4
12
20
28
4
12
20
18
28
4
12
A
B
A
B
30
3
27
7
11
15
23
24
28 0 4
8
12
16
20
19
A
B
A
B
27
3
11
19
A
B
A
B
A13267
2W1-2 phase
2 phase
W1-2 phase
2 phase
1-2 phase
2 phase
2 phase
1-2 phase
2W1-2 phase
1-2 phase
W1-2 phase
1-2 phase
1-2 phase
W1-2 phase
2 phase
W1-2 phase
2 phase
2W1-2 phase
2W1-2 phase
W1-2 phase
W1-2 phase
2W1-2 phase
1-2 phase
2W1-2 phase
No. 6507-12/17
STK672-080
M1
0
M2
0
M3
RESET
CWB
CLK
MOI
0
1
2 Phase Excitation Timing Chart (M3=1)
1-2 Phase Excitation Timing Chart (M3=1)
2W1-2 Phase Excitation Timing Chart (M3=1)
W1-2 Phase Excitation Timing Chart (M3=1)
M1
1
0
1
0
M2
0
M3
RESET
CWB
CLK
MOI
M1
1
1
0
M2
0
M3
RESET
CWB
CLK
MOI
0
M1
1
0
1
0
1
0
M2
M3
RESET
CWB
CLK
MOI
MOSFET Gate Signal
Comparator Reterence Voltage
A
A
B
B
Vref A
Vref B
100%
71%
100%
71%
Comparator Reterence Voltage
Vref A
100%
92%
71%
40%
Vref B
100%
92%
71%
40%
MOI
Comparator Reterence Voltage
Vref A
100%
92%
83%
71%
55%
40%
20%
MOI
MOSFET Gate Signal
A
A
B
B
MOSFET Gate Signal
Comparator Reterence Voltage
A
A
B
B
Vref A
Vref B
100%
71%
100%
71%
MOSFET Gate Signal
A
A
B
B
Vref B
100%
92%
83%
71%
55%
40%
20%
A13268
Excitation Time and Timing Charts
CLK rising edge operation
CLK rising and falling edge operation
No. 6507-13/17
STK672-080
M1
0
M2
0
M3
RESET
CWB
CLK
MOSFET Gate Signal
Comparator Reterence Voltage
A
A
B
B
MOI
Vref A
Vref B
100%
71%
100%
71%
Comparator Reterence Voltage
Vref A
Vref B
100%
92%
83%
71%
55%
40%
20%
20%
0
M1
1
0
M2
0
M3
RESET
CWB
CLK
0
M1
0
M2
0
1
M3
RESET
CWB
CLK
MOI
100%
92%
83%
71%
55%
40%
Comparator Reterence Voltage
Vref A
100%
97%
88%
77%
66%
48%
31%
66%
48%
31%
14%
92%
83%
71%
55%
40%
20%
0
M1
1
0
1
0
M2
0
M3
RESET
CWB
CLK
MOI
0
MOSFET Gate Signal
A
A
B
B
MOSFET Gate Signal
Comparator Reterence Voltage
A
A
B
B
MOI
Vref A
Vref B
100%
71%
40%
92%
100%
92%
71%
40%
MOSFET Gate Signal
A
A
B
B
Vref B
100%
97%
88%
77%
14%
92%
83%
71%
55%
40%
20%
A13269
1-2 Phase Excitation Timing Chart (M3=0)
W1-2 Phase Excitation Timing Chart (M3=0)
4W1-2 Phase Excitation Timing Chart (M3=0)
2W1-2 Phase Excitation Timing Chart (M3=0)
Thermal Design
<Hybrid IC Average Internal Power Loss Pd>
The main elements internal to this hybrid IC with large average power losses are the current control devices, the
regenerative current diodes, and the current detection resistor. Since sine wave drive is used, the average power loss
during microstepping drive can be approximated by applying a waveform factor of 0.64 to the square wave loss during 2
phase excitation.
The losses in the various excitation modes are as follows.
fclock
I
OH
fclock
2 phase excitation
Pd
2EX
= (Vsat + Vdf) ------ I
OH
t2 + ---------- (Vsat t1 + Vdf t3)
2
2
fclock
I
OH
fclock
1-2 phase excitation
Pd
1-2EX
= 0.64 {(Vsat + Vdf) ------ I
OH
t2 + ---------- (Vsat t1 + Vdf t3)}
4
4
fclock
I
OH
fclock
W1-2 phase excitation
Pd
W1-2EX
= 0.64 {(Vsat + Vdf) ------ I
OH
t2 + ---------- (Vsat t1 + Vdf t3)}
8
8
fclock
I
OH
fclock
2W1-2 phase excitation
Pd
2W1-2EX
= 0.64 {(Vsat + Vdf) ------ I
OH
t2 + ---------- (Vsat t1 + Vdf t3)}
16
16
fclock
I
OH
fclock
4W1-2 phase excitation
Pd
4W1-2EX
= 0.64 {(Vsat + Vdf) ------ I
OH
t2 + ---------- (Vsat t1 + Vdf t3)}
16
16
Here, t1 and t3 can be determined from the same formulas for all excitation methods.
L
R + 0.35
L
V
CC
1 + 0.35
t1 = --------
n (1 ---------- I
OH
)
t3 = ----
n (--------------------)
R + 0.35
V
CC
1
R
I
OH
R + V
CC
1 + 0.35
However, the formula for t2 differs with the excitation method.
2
3
2 phase excitation
t2 = ------ (t1 +t3)
1-2 phase excitation
t2 = ------ t1
fclock
fclock
7
15
W1-2 phase excitation
t2 = ------ t1
2W1-2 phase excitation
t2 = ------ t1
fclock
4W1-2 phase excitation
fclock
Motor Phase Current Model Figure (2 Phase Excitation)
fclock: CLK input frequency (Hz)
Vsat: The voltage drop of the power MOSFET and the current detection resistor (V)
Vdf: The voltage drop of the body diode and the current detection resistor (V)
I
OH
: Phase current peak value (A)
t1: Phase current rise time (s)
V
CC
1: Supply voltage applied to the motor (V)
t2: Constant-current operating time (s)
L: Motor inductance (H)
t3: Phase switching current regeneration time (s)
R: Motor winding resistance (W)
No. 6507-14/17
STK672-080
t3
t1
t2
IOH
A13270
Next we determine the usage conditions with no heat sink by determining the allowable hybrid IC internal average loss
from the thermal resistance of the hybrid IC substrate, namely 25.5 C/W.
105 50
For a Tc max of 105C at an ambient temperature of 50C
Pd
EX
= -------- = 2.15 W
25.5
105 40
For a Tc max of 105C at an ambient temperature of 40C
Pd
EX
= -------- = 2.54 W
25.5
This hybrid IC can be used with no heat sink as long as it is used at operating conditions below the losses listed above.
(See
Tc P
d
curve in the graph on page 17.)
<Hybrid IC internal power element (MOSFET) junction temperature calculation>
The junction temperature, Tj, of each device can be determined from the loss Pds in each transistor and the thermal
resistance
j-c.
Tj = Tc +
j-c
Pds (C)
Here, we determine Pds, the loss for each transistor, by determining Pd
EX
in each excitation mode.
Pds = Pd/4
Since the average loss includes the loss of the current detection resistor, we take that voltage drop into consideration in
the calculation.
Vsat = I
OH
Ron + I
OH
Rs
Vdf = Vdf + I
OH
Rs
The steady-state thermal resistance of a power MOSFET is 15.6C/W.
No. 6507-15/17
STK672-080
4
0
8
12
16
20
0
2
4
6
8
10
12
14
16
2
1.0
3
7
5
10
2
10
2
3
5
7
100
2
3
5
No. Fin 25.5(
C/W)
No. Fin 25.5(
C/W)
40
C
50
C
60
C
c-a= Tc max Ta (
C/W)
Tc max=105
C
Pd
Guaranteed ambient
temperature
2 mm thick Al plate (with no surface preparation)
(with the surface painted black)
Vertical
standing type
Convection
cooling
<Determining the Size of the Hybrid IC Heat Sink>
Determine
c-a for the heat sink from the average power loss determined in the previous item.
Tc max: Hybrid IC substrate temperature (C)
Ta: Application internal temperature (C)
Pd
EX
: Hybrid IC internal average loss (W)
Determine
c-a from the above formula and then size S (in cm
2
) of the heat sink from the graphs shown below.
The ambient temperature of the device will vary greatly according to the air flow conditions within the application.
Therefore, always verify that the size of the heat sink is adequate to assure that the Hybrid IC back surface (the aluminum
plate side) will never exceed a Tc max of 105C, whatever the operating conditions are.
Tc max Ta
c-a = ------------ [C/W]
Pd
EX
IC internal average power dissipation, Pd -- W
Heat sink thermal resistance,
c-a --

C/W
Heat sink thermal resistance,
c-a --

C/W
Heat sink area, S -- cm
2
c-a -- Pd
c-a -- S
No. 6507-16/17
STK672-080
35
37
39
41
43
45
47
49
51
53
55
4
4.5
5
5.5
6
39
41
35
37
43
45
47
49
51
53
55
0
20
40
60
80
100
120
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
0
0.5
1
2
1.5
2.5
3
3.5
0.4
0
0.2
0.6
0.8
1
1.2
1.4
1.6
0
0.5
1
1.5
2
2.5
3
0.5
0
1
1.5
2
2.5
0
10
20
30
40
50
0.5
0
1
1.5
2
2.5
0
20
40
60
80
100
120
100
0
50
150
200
250
300
350
400
450
0
20
40
60
80
100
120
100
150
50
0
200
250
300
350
400
450
0
0.5
1
1.5
2
2.5
IOH=1A
Vref=0
Vref=2.5V
Vref=2V
Vref=1
IOH=2
Tc=105
C
Tc=105
C
Tc=25
C
Tc=25
C
Tc=25
C
Supply voltage, V
CC
2 -- V
PWM frequency, fc -- kHz
fc -- V
CC
2
Substrate temperature, Tc -- C
PWM frequency, fc -- kHz
fc -- Tc
Motor current, I
OH
-- A
Output saturation voltage, Vsat -- V
Motor Current vs. Output Supply Voltage
Motor current, I
OH
-- A
Internal diode forward voltage, Vdf -- V
Internal Diode Forward Voltage vs. Motor Current
Motor voltage, V
CC
1 -- V
Motor current, I
OH
-- A
Motor Current vs. Motor Voltage
Substrate temperature, Tc -- C
Motor current, I
OH
-- A
Motor Current vs. Substrate Temperature
Reference voltage, Vref -- V
Input current, IVref --
A
Reference Voltage vs. Input Current
Substrate temperature, Tc -- C
Reference voltage input current, IVref --
A
Reference Voltage Input Current vs. Substrate Temperature
PS No. 6507-17/17
STK672-080
This catalog provides information as of May, 2004. Specifications and information herein are subject to
change without notice.
Specifications of any and all SANYO products described or contained herein stipulate the performance,
characteristics, and functions of the described products in the independent state, and are not guarantees
of the performance, characteristics, and functions of the described products as mounted in the customer's
products or equipment. To verify symptoms and states that cannot be evaluated in an independent device,
the customer should always evaluate and test devices mounted in the customer's products or equipment.
SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all
semiconductor products fail with some probability. It is possible that these probabilistic failures could
give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire,
or that could cause damage to other property. When designing equipment, adopt safety measures so
that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective
circuits and error prevention circuits for safe design, redundant design, and structural design.
In the event that any or all SANYO products (including technical data, services) described or contained
herein are controlled under any of applicable local export control laws and regulations, such products must
not be exported without obtaining the export license from the authorities concerned in accordance with the
above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system,
or otherwise, without the prior written permission of SANYO Electric Co., Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification"
for the SANYO product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not
guaranteed for volume production. SANYO believes information herein is accurate and reliable, but
no guarantees are made or implied regarding its use or any infringements of intellectual property rights
or other rights of third parties.
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
0
0.5
1
1.5
2
2.5
20
0
10
30
40
50
60
70
80
0
0.5
1
1.5
2
2.5
3
3.5
0
10
20
30
40
50
60
0
2
3
5 7 1000
2
3
5 7 10000 2
3
5 7 100000
1
0
0.5
1.5
2
2.5
3
3.5
0
20
40
60
80
100
120
V
CC
1: 24 V motor: PK264-02B
Motor voltage: 24 V
Motor resistance (R): 0.4
Inductance (L): 1.2 mH
2ex
2W1-2ex
CLK
200Hz
VCC1 : 24V
Test motor : PK264-02B
Motor current :
IOH :
2-phase excitation: 1.5 A
2W1-2 phase excitation: 2 A
With no heat sink
Hold mode
Notes The above current ranges apply when the output voltage is not in the avalanche state.
The above operating substrate temperatures (Tc) are measured when the motor is operating. Since Tc will vary depending on the ambient
temperature (Ta), the value of I
OH
, and whether I
OH
is continuous or intermittent, the actual values of Tc must be verified (measured) in an actual
operating end product.
Motor current, I
OH
-- A
Reference voltage, Vref -- V
Motor Current vs. Reference Voltage
Hybrid IC internal average power dissipation, Pd -- W
Substrate temperature rise,
Tc --

C
Tc -- Pd
CLK frequency, PPS - Hz
Substrate temperature rise,
Tc --

C
Substrate Temperature Rise Test
Operating substrate temperature, Tc -- C
Motor current, I
OH
-- A
Motor Current (I
OH
) Derating Curves for the Operating Substrate Temperature Tc