1
www.semtech.com
SC4607
Very Low Input, MHz Operation,
High Efficiency Synchronous Buck
POWER MANAGEMENT
Revision: September 28, 2004
Description
Features
Applications
Typical Application Circuit
Asynchronous start up
BiCMOS voltage mode PWM controller
Operation of frequency to 1MHz
2.25V to 5.5V input voltage range
Output voltages as low as 0.5V
+/-1% reference accuracy
Sleep mode (Icc = 10A typ)
Adjustable lossless short circuit current limiting
Combination pulse by pulse & hiccup mode
current limit
High efficiency synchronous switching
Up to 97% duty cycle
1A peak current driver
10-pin MSOP package
Distributed power architecture
Servers/workstations
Local microprocessor core power supplies
DSP and I/O power supplies
Battery-powered applications
Telecommunications equipment
Data processing applications
The SC4607 is a voltage mode step down (buck) regula-
tor controller that provides accurate high efficiency power
conversion from an input supply range of 2.25V to 5.5V.
The SC4607 is capable of producing an output voltage
as low as 0.5V and has a maximum duty cycle of 97%. A
high level of integration reduces external component
count, and makes it suitable for low voltage applications
where cost, size, and efficiency are critical.
The SC4607 drives external, N-channel MOSFETs with a
peak gate current of 1A. The SC4607 prevents shoot
through currents by offering nonoverlap protection for
the gate drive signals of the external MOSFETs. The
SC4607 features lossless current sensing of the voltage
drop across the drain to source resistance of the high
side MOSFET during its conduction period.
The quiescent supply current in sleep mode is typically
lower than 10A. A 1.2ms soft start is internally provided
to prevent output voltage overshoot during start-up.
The SC4607 is an ideal choice for converting 2.5V, 3.3V,
5V or other low input supply voltages. It's available in 10
pin MSOP package
*External components can be modified to provide a Vout as low as 0.5V
R3
C3
4.7u
C2 2.2n
C6
330u
R1
14.3k
C1
180p
C14
0.1u
Vin = 2.25V - 5.5V
R6
0
R5
0
D2
L1
1.8u
C5
22u
C4
22u
Vout = 1.5V (as low as 0.5V * ) / 12A
C71
1u
M1
C10
220u
M2
C12
22u
C9
4.7n
R8
200
R7
10k
R9
4.99k
C20
560pF
VCC
2
ISET
3
COMP
4
FS/SYNC
5
BST
1
DRVH
10
DRVL
8
VSENSE
6
GND
7
PHASE
9
U1
SC4607
C11
22u
R13
1
2
2004 Semtech Corp.
www.semtech.com
SC4607
POWER MANAGEMENT
Absolute Maximum Ratings
Electrical Characteristics
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All voltages with respect to GND. Currents are positive into, negative out of the specified terminal.
Unless otherwise specified, VCC = 3.3V, CT = 270pF, T
A
= -40
C to 85C, T
A
=T
J
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified
in the Electrical Characteristics section is not implied.
3
2004 Semtech Corp.
www.semtech.com
SC4607
POWER MANAGEMENT
Electrical Characteristics (Cont.)
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Notes:
(1). Guaranteed by design.
(2). Guaranteed by characterization.
Unless otherwise specified, VCC = 3.3V, CT = 270pF, T
A
= -40
C to 85C, T
A
=T
J
4
2004 Semtech Corp.
www.semtech.com
SC4607
POWER MANAGEMENT
Ordering Information
Pin Descriptions
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(
(10 Pin MSOP)
Notes:
(1) Only available in tape and reel packaging. A reel
contains 2500 devices.
(2) Lead free product. This product is fully WEEE and
RoHS compliant.
Pin Configuration
Top View
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SC4607
POWER MANAGEMENT
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6
2004 Semtech Corp.
www.semtech.com
SC4607
POWER MANAGEMENT
Block Diagram
Marking Information
nnnn = Part Number (Example: 1456)
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xxxx 01-1)
4607
4607
7
2004 Semtech Corp.
www.semtech.com
SC4607
POWER MANAGEMENT
Typical Characteristics
Oscillator Internal Accuracy
vs
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574
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3.5
4
4.5
5
5.5
Vcc (V)
I
n
te
r
n
a
l
Ac
cu
r
a
cy
(k
Hz
)
TA = 25C
Oscillator Internal Accuracy
vs
Temperature
577
578
579
580
581
582
583
584
-40
-20
0
20
40
60
80
Temperature (C)
I
n
t
e
rn
a
l
A
c
c
u
ra
cy (
k
H
z
)
Vcc = 3.3V
Sense Voltage
vs
Input Voltage
499.4
499.5
499.6
499.7
499.8
499.9
500.0
2.5
3
3.5
4
4.5
5
5.5
Vcc (V)
S
e
n
se V
o
l
t
ag
e
(
m
V
)
T
A
= 25C
Sense Voltage
vs
Temperature
498.0
498.5
499.0
499.5
500.0
500.5
-40
-20
0
20
40
60
80
Temperature (C)
S
e
n
se V
o
l
t
ag
e
(
m
V
)
Vcc = 3.3V
Current Limit Bias Current
vs
Input Voltage
50
51
52
53
54
55
2.5
3
3.5
4
4.5
5
5.5
Vcc (V)
Cu
r
r
e
n
t
L
i
m
i
t
Bi
a
s
Cu
r
r
e
n
t
(
u
A)
T
A
= 25C
Current Limit Bias Current
vs
Temperature
40
45
50
55
60
65
-40
-20
0
20
40
60
80
Temperature (C)
Cu
r
r
e
n
t
L
i
m
i
t
Bi
a
s
Cu
r
r
e
n
t
(
u
A)
Vcc = 3.3V
8
2004 Semtech Corp.
www.semtech.com
SC4607
POWER MANAGEMENT
Application Information
Enable:
The SC4607 is enabled by applying a voltage greater than
2.25 volts to the VCC pin. The SC4607 is disabled when
VCC falls below 1.95 volts or when sleep mode opera-
tion is invoked by clamping the FS/SYNC pin to a voltage
below 75mV. 10A is the typical current drawn through
the VCC pin during sleep mode. During the sleep mode,
the high side and low side MOSFETs are turned off and
the internal soft start voltage is held low.
Oscillator:
The FS/SYNC pin is used to set the PWM oscillator fre-
quency through an external timing capacitor that is con-
nected from the FS/SYNC pin to the GND pin. The re-
sulting ramp waveform on the FS/SYNC pin is a triangle
at the PWM frequency with a peak voltage of 1.3V and a
valley voltage of 0.3V. The PWM duty ratio is limited by
the ramp to a maximum of 97%, which allows the boot-
strap capacitor to be charged during each cycle. The ca-
pacitor tolerance adds to the accuracy of the oscillator
frequency. The approximate operating frequency and soft
start time are both determined by the value of the exter-
nal timing capacitor as shown in Table 1.
g
n
i
m
i
T
l
a
n
r
e
t
x
E
e
u
l
a
V
r
o
t
i
c
a
p
a
C
)
F
p
(
y
c
n
e
u
q
e
r
F
)
z
H
k
(
)
s
(
e
m
i
T
t
r
a
t
S
t
f
o
S
0
4
1
0
0
0
1
8
2
6
0
5
1
0
6
9
1
0
7
0
7
2
0
8
5
0
2
2
1
0
6
5
0
5
3
8
3
8
1
Table 1: Operating Frequency and Soft Start Time
Values Based On the Value of the External Timing
Capacitor Placed Across the FS/SYNC and GND Pins
Synchronous mode operation is invoked by using a sig-
nal from an external clock. A low value resistor (100
typical) must be inserted in series with the timing capaci-
tor between the timing capacitor and the GND pin. The
other terminal of the timing capacitor will remain con-
nected to the FS/SYNC pin. The external clock signal is
then connected to the junction of the external timing
capacitor and the added resistor as shown in Figure 1.
Rsync
100 ohm
Ctiming
External
Clock
Signal
SC4607
FS/SYNC
Figure 1
UVLO:
When the FS/SYNC pin is not pulled and held below 75mV,
the voltage on the Vcc pin determines the operation of
the SC4607. As Vcc increases during start up, the UVLO
block senses Vcc and keeps the high side and low side
MOSFETs off and the internal soft start voltage low until
Vcc reaches 2.25V. If no faults are present, the SC4607
will initiate a soft start when Vcc exceeds 2.25V. A hys-
teresis (100mV) in the UVLO comparator provides noise
immunity during its start up.
Soft Start:
The soft start function is required for step down control-
lers to prevent excess inrush current through the DC bus
during start up. Generally this can be done by sourcing a
controlled current into a timing capacitor and then using
the voltage across this capacitor to slowly ramp up the
error amp reference. The closed loop creates narrow
width driver pulses while the output voltage is low and
allows these pulses to increase to their steady state duty
cycle as the output voltage reaches its regulated value.
With this, the inrush current from the input side is con-
trolled. The duration of the soft start in the SC4607 is
controlled by an internal timing circuit which is used dur-
ing start up and over current to set the hiccup time. The
soft start time can be obtained from Table 1.
9
2004 Semtech Corp.
www.semtech.com
SC4607
POWER MANAGEMENT
Application Information (Cont.)
The SC4607 implements its soft start by ramping up the
error amplifier reference voltage providing a controlled
slew rate of the output voltage, then preventing over-
shoot and limiting inrush current during its start up. Dur-
ing start up of a converter with a big capacitive load, the
load current demands large supply current. To avoid this
an external soft start scheme can be implemented as
shown in Figure 2. Cs can be adjusted for different appli-
cations.
Output of a converter
Q
MMBT2222A-7
Rp
47.5k
Rs
2.05k
Cs
330n
Pin COMP
Vo
Figure 2
Over Current Protection:
The SC4607 detects over current conditions by sensing
the voltage across the drain-to-source of the high side
MOSFET. The SC4607 determines the high side MOSFET
current level by sensing the drain-to-source conduction
voltage across the high side MOSFET via the V
in
(see the
Typical Application Circuit on page 1) and PHASE pin dur-
ing the high side MOSFET's conduction period. This volt-
age value is then compared internally to a user pro-
grammed current limit threshold. Note that user should
place Kelvin sensing connections directly from the high
side MOSFET source to the PHASE pin.
The current limit threshold is programmed by the user
based on the RDS(on) of the high side MOSFET and the
value of the external set resistor RSET (where RSET is
represented by R3 in the applications schematics of this
document). The SC4607 uses an internal current source
to pull a 50A current from the input voltage to the ISET
pin through external resistor RSET.
The current limit threshold resistor (RSET) value is calcu-
lated using the following equation:
A
50
R
I
R
)
ON
(
DS
MAX
SET
=
The R
DS(ON)
sensing used in the SC4607 has an addi-
tional feature that enhances the performance of the over
current protection. Because the R
DS(ON)
has a positive
temperature coefficient, the 50
A current source has a
positive coefficient of about 0.28%/C providing first or-
der correction for current sensing vs temperature. This
compensation depends on the high amount of thermal
transferring that typically exists between the high side N-
MOSFET and the SC4607 due to the compact layout of
the power supply.
When the converter detects an over current condition (I
> I
MAX
) as shown in Figure 3, the first action the SC4607
takes is to enter the cycle by cycle protection mode (Point
B to Point C), which responds to minor over current cases.
Then the output voltage is monitored. If the over current
and low output voltage (set at 70% of nominal output
voltage) occur at the same time, the Hiccup mode op-
eration (Point C to Point D) of the SC4607 is invoked
and the internal soft start capacitor is discharged. This is
like a typical soft start cycle:
nom
O
V
-
6
.
0
nom
O
V
-
O
V
O
I
I
MAX
D
C
B
A
nom
O
V
-
6
.
0
nom
O
V
-
O
V
O
I
I
MAX
D
C
B
A
Figure 3. Over current protection characteristic of
SC4607
Power MOSFET Drivers:
The SC4607 has two drivers which are optimized for driv-
ing external power N-Channel MOSFETs.. The driver block
consists two 1 Amp drivers. DRVH drives the high side
N-MOSFET (main switch), and DRVL drives the low side
N-MOSFET (synchronous rectifier transistor).
The output drivers also have gate drive non-overlap
mechanism that provides a dead time between DRVH
and DRVL transitions to avoid potential shoot through
problems in the external MOSFETs. By using the proper
0.7
10
2004 Semtech Corp.
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SC4607
POWER MANAGEMENT
design and the appropriate MOSFETs, the SC4607 is
capable of driving a converter with up to 12A of output
current. As shown in Figure 4, t
d1,
the delay from the
top MOSFET off to the bottom MOSFET on is adaptive by
detecting the voltage of the phase node. t
d2
, the delay
from the bottom MOSFET off to the top MOSFET on is
fixed, is 40ns for the SC4607. This control scheme guar-
antees avoidance of cross conduction or shoot through
between the upper and lower MOSFETs and also mini-
mizes the conduction loss in the body diode of the bot-
tom MOSFET for high efficiency applications.
BOTTOM MOSFET Gate Drive
TOP MOSFET Gate Drive
Phase node
Ground
t
d1
t
d2
BOTTOM MOSFET Gate Drive
TOP MOSFET Gate Drive
Phase node
Ground
t
d1
t
d2
Figure 4. Timing Waveforms for Gate Drives and Phase
Node
Inductor Selection:
The factors for selecting the inductor include its cost,
efficiency, size and EMI. For a typical SC4607 applica-
tion, the inductor selection is mainly based on its value,
saturation current and DC resistance. Increasing the in-
ductor value will decrease the ripple level of the output
voltage while the output transient response will be de-
graded. Low value inductors offer small size and fast tran-
sient responses while they cause large ripple currents,
poor efficiencies and more output capacitance to smooth
out the large ripple currents. The inductor should be able
to handle the peak current without saturating and its
copper resistance in the winding should be as low as
possible to minimize its resistive power loss. A good trade-
off among its size, loss and cost is to set the inductor
ripple current to be within 15% to 30% of the maximum
output current.
The inductor value can be determined according to its
operating point and the switching frequency as follows:
OMAX
s
in
out
in
out
I
I
f
V
)
V
V
(
V
L
-
=
Where:
f
s
= switching frequency and
I = ratio of the peak to peak inductor current to the
maximum output load current.
The peak to peak inductor current is:
OMAX
p
p
I
I
I
=
-
After the required inductor value is selected, the proper
selection of the core material is based on the peak in-
ductor current and efficiency requirements. The core
must be able to handle the peak inductor current I
PEAK
without saturation and produce low core loss during the
high frequency operation is:
2
I
I
I
p
p
OMAX
PEAK
-
+
=
The power loss for the inductor includes its core loss and
copper loss. If possible, the winding resistance should
be minimized to reduce inductor's copper loss. The core
loss can be found in the manufacturer's datasheet. The
inductor' copper loss can be estimated as follows:
WINDING
LRMS
2
COPPER
R
I
P
=
Where:
I
LRMS
is the RMS current in the inductor. This current can
be calculated as follow is:
2
OMAX
LRMS
I
3
1
1
I
I
+
=
Output Capacitor Selection:
Basically there are two major factors to consider in se-
lecting the type and quantity of the output capacitors.
The first one is the required ESR (Equivalent Series Re-
sistance) which should be low enough to reduce the volt-
age deviation from its nominal one during its load changes.
The second one is the required capacitance, which should
be high enough to hold up the output voltage. Before the
SC4607 regulates the inductor current to a new value
during a load transient, the output capacitor delivers all
the additional current needed by the load. The ESR and
ESL of the output capacitor, the loop parasitic inductance
between the output capacitor and the load combined
with inductor ripple current are all major contributors to
the output voltage ripple. Surface mount speciality poly-
mer aluminum electrolytic chip capacitors in UE series
from Panasonic provide low ESR and reduce the total
capacitance required for a fast transient response.
POSCAP from Sanyo is a solid electrolytic chip capacitor
that has a low ESR and good performance for high fre-
Application Information (Cont.)
11
2004 Semtech Corp.
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SC4607
POWER MANAGEMENT
Application Information (Cont.)
quency with a low profile and high capacitance. Above
mentioned capacitors are recommended to use in
SC4607 application:
Input Capacitor Selection:
The input capacitor selection is based on its ripple cur-
rent level, required capacitance and voltage rating. This
capacitor must be able to provide the ripple current by
the switching actions. For the continuous conduction
mode, the RMS value of the input capacitor can be cal-
culated from:
2
in
out
in
out
OMAX
)
RMS
(
CIN
V
)
V
V
(
V
I
I
-
=
This current gives the capacitor's power loss as follows:
)
ESR
(
CIN
)
RMS
(
CIN
2
CIN
R
I
P
=
This capacitor's RMS loss can be a significant part of the
total loss in the converter and reduce the overall con-
verter efficiency. The input ripple voltage mainly depends
on the input capacitor's ESR and its capacitance for a
given load, input voltage and output voltage. Assuming
that the input current of the converter is constant, the
required input capacitance for a given voltage ripple can
be calculated by:
)
R
I
V
(
fs
)
D
1
(
D
I
C
)
ESR
(
CIN
OMAX
I
OMAX
IN
-
-
=
Where:
D = V
out
/V
in
, duty ratio and
V
I
= the given input voltage ripple.
Because the input capacitor is exposed to the large surge
current, attention is needed for the input capacitor. If
tantalum capacitors are used at the input side of the
converter, one needs to ensure that the RMS and surge
ratings are not exceeded. For generic tantalum capaci-
tors, it is wise to derate their voltage ratings at a ratio of
2 to protect these input capacitors.
Boost Capacitor Selection:
The boost capacitor selection is based on its discharge
ripple voltage, worst case conduction time and boost
current. The worst case conduction time T
w
can be esti-
mated as follows:
max
s
D
f
1
Tw
=
Where:
f
s
= the switching frequency and
Dmax = maximum duty ratio, 0.97 for the SC4607.
The required minimum capacitance for boost capacitor
will be:
W
D
B
boost
T
V
I
C
=
Where:
I
B
= the boost current and
V
D
= discharge ripple voltage.
With f
s
= 300kH, V
D
=0.3V and I
B
=50mA, the required
capacitance for the boost capacitor is:
nF
540
97
.
0
k
300
1
3
.
0
05
.
0
D
f
1
V
I
C
max
s
D
B
boost
=
=
=
Power MOSFET Selection:
The SC4607 can drive an N-MOSFET at the high side
and an N-MOSFET synchronous rectifier at the low side.
The use of the high side N-MOSFET will significantly re-
duce its conduction loss for high current. For the top
MOSFET, its total power loss includes its conduction loss,
switching loss, gate charge loss, output capacitance loss
and the loss related to the reverse recovery of the bot-
tom diode, shown as follows:
s
in
rr
OSS
s
GATE
GT
2
GS
GD
G
GATE
s
in
PEAK
_
TOP
ON
_
TOP
RMS
_
TOP
2
TOTAL
_
TOP
f
V
)
Q
Q
(
f
V
Q
)
Q
Q
(
R
V
f
V
I
R
I
P
+
+
+
+
+
=
Where:
R
G
= gate drive resistor,
Q
GD
= the gate to drain charge of the top MOSFET,
Q
GS2
= the gate to source charge of the top MOSFET,
Q
GT
= the total gate charge of the top MOSFET,
Q
OSS
= the output charge of the top MOSFET and
Q
rr
= the reverse recovery charge of the bottom diode.
12
2004 Semtech Corp.
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SC4607
POWER MANAGEMENT
Figure 5. The compensation network includes C1, C2,
R1, R7, R8 and C9. R9 is used to program the output
voltage according to
)
R
R
1
(
5
.
0
V
9
7
out
+
=
Figure 4. Compensation network provides 3
poles and 2 zeros.
C2
R1
C1
C4
R
Vout
L1
C9
R8
R7
R9
VCC
ISET
COMP
FS/SY NC
BST
DRVH
DRVL
VSENSE
GND
PHASE
SC4607
Figure 4. Compensation network provides 3
poles and 2 zeros.
C2
R1
C1
C4
R
Vout
L1
C9
R8
R7
R9
VCC
ISET
COMP
FS/SY NC
BST
DRVH
DRVL
VSENSE
GND
PHASE
SC4607
Figure 5. Compensation network provides 3 poles and
2 zeros.
For voltage mode step down applications as shown in
Figure 5, the power stage transfer function is:
4
1
2
1
4
C
I
VD
C
L
s
R
L
s
1
C
R
1
s
1
V
)
s
(
G
+
+
+
=
Where:
R = load resistance and
R
C
= C
4
's ESR.
The compensation network will have the characteristic
as follows:
2
P
2
Z
1
P
1
Z
I
COMP
s
1
s
1
s
1
s
1
s
)
s
(
G
+
+
+
+
=
Where
)
C
C
(
R
1
2
1
7
I
+
=
2
1
1
Z
C
R
1
=
9
8
7
2
Z
C
)
R
R
(
1
+
=
Application Information (Cont.)
For the top MOSFET, it experiences high current and high
voltage overlap during each on/off transition. But for the
bottom MOSFET, its switching voltage is the body diode's
forward drop of the bottom MOSFET during its on/off
transition. So the switching loss for the bottom MOSFET
is negligible. Its total power loss can be determined by:
F
AVG
D
s
GATE
GB
ON
_
BOT
RMS
_
BOT
2
TOTAL
_
BOT
V
_
I
f
V
Q
R
I
P
+
+
=
Where:
Q
GB
= the total gate charge of the bottom MOSFET and
V
F
= the forward voltage drop of the body diode of the
bottom MOSFET.
For a low voltage and high output current application such
as the 3.3V/1.5V@12A case, the conduction loss is of-
ten dominant and selecting low R
DS(ON)
MOSFETs will no-
ticeably improve the efficiency of the converter even
though they give higher switching losses.
The gate charge loss portion of the top/bottom MOSFET's
total power loss is derived from the SC4607. This gate
charge loss is based on certain operating conditions (f
s
,
V
GATE
, and I
O
).
The thermal estimations have to be done for both
MOSFETs to make sure that their junction temperatures
do not exceed their thermal ratings according to their
total power losses P
TOTAL
, ambient temperature T
A
and their
thermal resistance R
JA
as follows:
JA
TOTAL
A
(max)
J
R
P
T
T
+
<
Loop Compensation Design:
For a DC/DC converter, it is usually required that the
converter has a loop gain of a high cross-over frequency
for fast load response, high DC and low frequency gain
for low steady state error, and enough phase margin for
its operating stability. Often one can not have all these
properties at the same time. The purpose of the loop
compensation is to arrange the poles and zeros of the
compensation network to meet the requirements for a
specific application.
The SC4607 has an internal error amplifier and requires
the compensation network to connect among the COMP
pin and VSENSE pin, GND, and the output as shown in
13
2004 Semtech Corp.
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SC4607
POWER MANAGEMENT
2
1
1
2
1
1
P
C
C
R
C
C
+
=
9
8
2
P
C
R
1
=
After the compensation, the converter will have the fol-
lowing loop gain:
C
L
s
R
L
s
1
C
R
1
s
1
s
1
s
1
s
1
s
1
s
V
V
1
)
s
(
G
)
s
(
G
G
)
s
(
T
1
2
1
4
C
2
P
2
Z
1
P
1
Z
I
I
M
VD
COMP
PWM
+
+
+
+
+
+
+
=
=
Where:
G
PWM
= PWM gain
V
M
= 1.0V, ramp peak to valley voltage of SC4607
The design guidelines for the SC4607 applications are
as following:
1. Set the loop gain crossover corner frequency
C
for given switching corner frequency
S
= 2
f
s,
2. Place an integrator at the origin to increase DC
and low frequency gains.
3. Select
Z1
and
Z2
such that they are placed near
O
to damp the peaking and the loop gain has a
-20dB/dec rate to go across the 0dB line for
obtaining a wide bandwidth.
4. Cancel the zero from C
4
's ESR by a compensator
pole
P1
(
P1
=
ESR
= 1/( R
C
C
4
)).
5. Place a high frequency compensator pole
p
2
(
p
2
=
f
s
) to get the maximum attenuation of the switch-
ing ripple and high frequency noise with the adequate
phase lag at
C
.
The compensated loop gain will be as given in Figure 6:
-20dB/dec
0dB
Gvd
T(s)
z1
z2
o
c
p1
ESR
p2
Loop gain T(s)
Power stage
G
VD
(s)
-40dB/dec
-20dB/dec
0dB
Gvd
T(s)
z1
z2
o
c
p1
ESR
p2
Loop gain T(s)
Power stage
G
VD
(s)
-40dB/dec
Figure 6. Asymptotic diagrams of power stage and its
loop gain.
Application Information (Cont.)
Layout Guidelines:
In order to achieve optimal electrical, thermal and noise
performance for high frequency converters, special at-
tention must be paid to the PCB layouts. The goal of lay-
out optimization is to identify the high di/dt loops and
minimize them. The following guideline should be used to
ensure proper functions of the converters.
1. A ground plane is recommended to minimize noises
and copper losses, and maximize heat dissipation.
2. Start the PCB layout by placing the power compo-
nents first. Arrange the power circuit to achieve a
clean power flow route. Put all the connections on
one side of the PCB with wide copper filled areas if
possible.
3. The Vcc bypass capacitor should be placed next to
the Vcc and GND pins.
4. The trace connecting the feedback resistors to the
output should be short, direct and far away from the
noise sources such as switching node and switching
components.
5. Minimize the traces between DRVH/DRVL and the
gates of the MOSFETs to reduce their impedance to
drive the MOSFETs.
6. Minimize the loop including input capacitors, top/bot-
tom MOSFETs. This loop passes high di/dt current.
Make sure the trace width is wide enough to reduce
copper losses in this loop.
7. ISET and PHASE connections to the top MOSFET for
current sensing must use Kelvin connections.
8. Maximize the trace width of the loop connecting the
inductor, bottom MOSFET and the output capacitors.
9. Connect the ground of the feedback divider and the
compensation components directly to the GND pin
of the SC4607 by using a separate ground trace.
Then connect this pin to the ground of the output
capacitor as close as possible
14
2004 Semtech Corp.
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SC4607
POWER MANAGEMENT
Design Example 2: 3.3V to 2.5V @ 20A application with SC4607
Application Information (Cont.)
Design Example 1: 3.3V to1.5V @12A application with SC4607
R3
1.05k
C3
4.7u
C2 1.5n
R1
20k
C1
270p
C18
0.1u
Vin=3.3V
C7
330u
D2
L1 1.3u
C5
22u
C4
22u
C17
1u
M11
M12
M22
C10
150u
M21
C9
2.7n
R8
365
Vo=2.5V/20A
R7
16.5k
R9
4.12k
R6
0
R5
0
C16
560pF
ETQPAF1R3EA
4TPD330M
4 x C3216X5R0J226M
2 x 4TPE150M
4 x Si7882
VCC
2
ISET
3
COMP
4
FS/SY NC
5
BST
1
DRVH
10
DRVL
8
VSENSE
6
GND
7
PHASE
9
U1
SC4607
C13
22u
C14
22u
C11
150u
R13
1
R3
C3
4.7u
C2 2.2n
C7
330u
R1
14.3k
C1
270p
C14
100u
Vin=3.3V
D2
L1
2.3u
C5
22u
C4
22u
C71
1u
M1
R6
0
R5
0
C13
100u
M2
C11
22u
C9
5.6n
R8
169
Vo=1.5V/12A
R7
8.25k
R9
4.12k
C16
560pF
C10
22u
VCC
2
ISET
3
COMP
4
FS/SY NC
5
BST
1
DRVH
10
DRVL
8
VSENSE
6
GND
7
PHASE
9
U1
SC4607
R13
1
15
2004 Semtech Corp.
www.semtech.com
SC4607
POWER MANAGEMENT
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Bill of Materials - 3.3V to 1.5V @ 12A
16
2004 Semtech Corp.
www.semtech.com
SC4607
POWER MANAGEMENT
PCB Layout - 3.3V to 1.5V @ 12A
TOP
TOP
BOTTOM
BOTTOM
BOTTOM
BOTTOM
TOP
TOP
17
2004 Semtech Corp.
www.semtech.com
SC4607
POWER MANAGEMENT
Semtech Corporation
Power Management Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805)498-2111 FAX (805)498-3804
Outline Drawing - MSOP-10
Contact Information
Land Pattern - MSOP-10
bbb
C A-B D
DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS
3.
OR GATE BURRS.
DATUMS AND TO BE DETERMINED AT DATUM PLANE
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
-B-
NOTES:
1.
2.
-A-
-H-
SIDE VIEW
A
B
C
D
H
PLANE
0
.010
.004
-
.016
.003
.024
(.037)
-
.000
.030
-
-
-
-
0.25
0.10
8
0
-
8
0.60
(.95)
.032
.009
0.40
0.08
.043
.006
.037 0.75
0.00
-
0.80
0.23
-
0.95
1.10
0.15
-
-
-
e
.193 BSC
.020 BSC
DETAIL
aaa C
SEATING
INDICATOR
ccc C
2X N/2 TIPS
PIN 1
2X E/2
10
SEE DETAIL
A1
A
A2
bxN
D
0.25
A
PLANE
GAGE
.003
E1
1 2
N
.114
.114
.118
.118
.007
-
10
01
c
(L1)
L
A
0.08
3.00
3.00
4.90 BSC
0.50 BSC
.122
.122
2.90
2.90
.011 0.17
3.10
3.10
0.27
-
REFERENCE JEDEC STD MO-187, VARIATION BA.
4.
DIM
ccc
A1
e
bbb
aaa
01
L1
N
L
D
E1
E
A2
b
c
A
MILLIMETERS
NOM
INCHES
DIMENSIONS
MIN NOM MAX MIN
MAX
E
THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
NOTES:
1.
P
(C)
X
Z
G
Y
.063
.224
.011
.020
.098
(.161)
5.70
1.60
0.30
0.50
2.50
(4.10)
MILLIMETERS
DIMENSIONS
DIM
INCHES
Y
Z
G
P
X
C
PDF 
ZIP