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Электронный компонент: LH168P

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In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in
catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device.
1
DESCRIPTION
The LH168P is a 309-output TFT-LCD source
driver IC which can simultaneously display 262 144
colors in 64 gray scales.
FEATURES
Selectable number of LCD drive outputs : 309/300
Built-in 6-bit digital input DAC
Possible to display 262 144 colors in 64 gray
scales with reference voltage input of 11 gray
scales : This reference voltage input corresponds
to < correction and intermediate reference voltage
input can be abbreviated
Cascade connection
Sampling sequence :
Output shift direction can be selected
XO
1
, YO
1
, ZO
1
/XO
103
, YO
103
, ZO
103
or
ZO
103
, YO
103
, XO
103
/ZO
1
, YO
1
, XO
1
Shift clock frequency : 55 MHz (MAX.)
Supply voltages
V
CC
(for logic system) : +3.0 to +5.5 V
V
LS
(for LCD drive system) : +3.0 to +5.5 V
Package : 350-pin TCP (Tape Carrier Package)
PIN CONNECTIONS
LH168P
LH168P
309-output TFT-LCD Source Driver IC
XO
103
YO
103
ZO
103
307
308
309
XO
1
YO
1
ZO
1
1
2
3
CHIP SURFACE
GND
V
LS
V
9
V
7
V
5
V
3
V
1
XI
5
XI
4
XI
3
XI
2
XI
1
XI
0
YI
5
YI
4
YI
3
YI
2
YI
1
YI
0
SPOI
GND
MODE
CK
V
CC
SPIO
LS
ZI
5
ZI
4
ZI
3
ZI
2
ZI
1
ZI
0
LBR
V
0
V
2
V
4
V
6
V
8
V
10
V
LS
GND
350
349
348
347
346
345
344
343
342
341
340
339
338
337
336
335
334
333
332
331
330
329
328
327
326
325
324
323
322
321
320
319
318
317
316
315
314
313
312
311
310
350-PIN TCP
TOP VIEW
NOTE :
Doesn't prescribe TCP outline.
2
LH168P
PIN DESCRIPTION
PIN NO.
SYMBOL
I/O
DESCRIPTION
1 to 309
XO
1
-ZO
103
O
LCD drive output pins
310, 330, 350
GND
Ground pins
311, 349
V
LS
Power supply pins for analog circuit
312 to 317
V
10
, V
8
, V
6
, V
4
, V
2
, V
0
I
Reference voltage input pins
318
LBR
I
Shift direction selection input pin
319 to 324
ZI
0
-ZI
5
I
Data input pins
325
LS
I
Latch input pin
326
SPIO
I/O
Start pulse input/cascade output pin
327
V
CC
Power supply pin for digital circuit
328
CK
I
Shift clock input pin
329
MODE
I
309/300-output selection input pin
331
SPOI
I/O
Start pulse input/cascade output pin
332 to 337
YI
0
-YI
5
I
Data input pins
338 to 343
XI
0
-XI
5
I
Data input pins
344 to 348
V
1
, V
3
, V
5
, V
7
, V
9
I
Reference voltage input pins
LH168P
3
BLOCK DIAGRAM
CK 328
YI
0
332
XI
5
LS
343
XI
0
338
SPOI 331
LBR 318
MODE 329
V
0
317
V
1
V
2
V
3
V
4
V
5
V
6
V
7
V
8
V
9
V
10
312
1
ZI
0
319
YI
5
337
ZI
5
324
325
307
311
326
330
327
350
310
SPIO
V
LS
349 V
LS
XO
1
2
YO
1
3
ZO
1
XO
103
308
YO
103
309
ZO
103
6
6
6
6
6
6
64
6
6
6
6
103
2
1
6
6
V
CC
GND
GND GND
SHIFT REGISTER
SAMPLING MEMORY
HOLD MEMORY
DATA
LATCH
REFERENCE
VOLTAGE
GENERATION
CIRCUIT
LEVEL SHIFTER
DA CONVERTER
OUTPUT CIRCUIT
344
316
345
315
346
314
347
313
348
FUNCTIONAL OPERATIONS OF EACH BLOCK
BLOCK
FUNCTION
Shift Register
Used as a bi-directional shift register which performs the shifting operation by CK and
selects bits for data sampling.
Data Latch
Used to temporary latch the input data which is sent to the sampling memory.
Sampling Memory
Used to sample the data to be entered by time sharing.
Hold Memory
Used for latch processing of data in the sampling memory by LS input.
Level Shifter
Used to shift the data in the hold memory to the power supply level of the analog circuit
unit and sends the shifted data to DA converter.
Reference Voltage
Generation Circuit
Used to generate a gamma-corrected 64-level voltage by the resistor dividing circuit.
DA Converter
Used to generate an analog signal according to the display data and sends the signal to
the output circuit.
Output Circuit
Used as a voltage follower, configured with an operational amplifier and an output buffer,
which outputs analog signals of 64 gray scales to LCD drive output pin.
INPUT/OUTPUT CIRCUITS
I
V
CC
GND
To Internal Circuit
Fig. 1 Input Circuit (1)
Applicable pins
CK, LS, LBR, XI
0
-XI
5
,
YI
0
-YI
5
, ZI
0
-ZI
5
I
V
CC
V
CC
GND
To Internal Circuit
Fig. 2 Input Circuit (2)
Applicable pin
MODE
LH168P
4
LH168P
5
V
CC
GND
Output Signal
Output Control Signal
V
CC
GND
To Internal Circuit
I
O
Nch Tr
Pch Tr
Fig. 3 Input/Output Circuit
Applicable pins
SPIO, SPOI
O
V
LS
GND
From Internal Circuit
Operational Amplifier
+
Fig. 4 Output Circuit
Applicable pins
XO
1
-XO
103
,
YO
1
-YO
103
,
ZO
1
-ZO
103