ChipFind - документация

Электронный компонент: LH28F128BFHT-PBTL75A

Скачать:  PDF   ZIP
P
RELIMINARY
P
RODUCT
S
PECIFICATION
Integrated Circuits Group
LH28F128BFHT-
PBTL75A
Flash Memory
16Mbit (8Mbitx16)
(Model Number: LHF12F17)
Spec. Issue Date: June 7, 2004
LHF12F17
Handle this document carefully for it contains material protected by international copyright law. Any reproduction,
full or in part, of this material is prohibited without the express written permission of the company.
When using the products covered herein, please observe the conditions written herein and the precautions outlined in
the following paragraphs. In no event shall the company be liable for any damages resulting from failure to strictly
adhere to these conditions and precautions.
(1) The products covered herein are designed and manufactured for the following application areas. When using the
products covered herein for the equipment listed in Paragraph (2), even for the following application areas, be sure
to observe the precautions given in Paragraph (2). Never use the products for the equipment listed in Paragraph
(3).
Office electronics
Instrumentation and measuring equipment
Machine tools
Audiovisual equipment
Home appliance
Communication equipment other than for trunk lines
(2) Those contemplating using the products covered herein for the following equipment which demands high
reliability, should first contact a sales representative of the company and then accept responsibility for
incorporating into the design fail-safe operation, redundancy, and other appropriate measures for ensuring
reliability and safety of the equipment and the overall system.
Control and safety devices for airplanes, trains, automobiles, and other transportation equipment
Mainframe computers
Traffic control systems
Gas leak detectors and automatic cutoff devices
Rescue and security equipment
Other safety devices and safety equipment, etc.
(3) Do not use the products covered herein for the following equipment which demands extremely high performance
in terms of functionality, reliability, or accuracy.
Aerospace equipment
Communications equipment for trunk lines
Control equipment for the nuclear power industry
Medical equipment related to life support, etc.
(4) Please direct all queries and comments regarding the interpretation of the above three Paragraphs to a sales
representative of the company.
Please direct all queries regarding the products covered herein to a sales representative of the company.
Rev. 0.04
LHF12F17 1
Rev. 0.04
CONTENTS
PAGE
56-Lead TSOP (Normal Bend) Pinout ....................... 3
Pin Descriptions.......................................................... 4
Simultaneous Operation Modes
Allowed with 6 Planes........................................ 5
Memory Map .............................................................. 6
Identifier Codes and OTP Address
for Read Operation ............................................. 9
OTP Block Address Map for OTP Program............. 10
Bus Operation............................................................ 11
Command Definitions .............................................. 12
Functions of Block Lock and Block Lock-Down..... 14
Block Locking State Transitions
upon Command Write....................................... 14
Block Locking State Transitions
upon WP#/ACC Transition .............................. 15
Status Register Definition......................................... 16
Extended Status Register Definition ........................ 18
PAGE
1 Electrical Specifications ........................................ 19
1.1 Absolute Maximum Ratings........................... 19
1.2 Operating Conditions ..................................... 19
1.2.1 Capacitance.............................................. 20
1.2.2 AC Input/Output Test Conditions............ 20
1.2.3 DC Characteristics................................... 21
1.2.4 AC Characteristics
- Read-Only Operations............................ 23
1.2.5 AC Characteristics
- Write Operations .................................... 27
1.2.6 Reset Operations...................................... 29
1.2.7 Block Erase, Full Chip Erase,
(Page Buffer) Program and
OTP Program Performance ...................... 30
LHF12F17 2
LH28F128BFHT-PBTL75A
128Mbit (8Mbit
16)
Page Mode Dual Work Flash MEMORY
128-M density with 16-bit I/O Interface
High Performance Reads
75/25ns 8-Word Page Mode
6-Plane Dual Work Operation
Read operations are available during Block Erase or
(Page Buffer) Program between two different Planes
Plane Architecture:
16M, 24M, 24M, 24M, 24M, 16M
Low Power Operation
2.7V Read and Write Operations
V
CCQ
for Input/Output Power Supply Isolation
Automatic Power Savings Mode reduces I
CCR
in Static Mode
Enhanced Code + Data Storage
5
s Typical Erase/Program Suspends
OTP (One Time Program) Block
4-Word Factory-Programmed Area
4-Word User-Programmable Area
High Performance Program with Page Buffer
16-Word Page Buffer
5
s/Word (Typ.) at WP#/ACC=9.5V
Operating Temperature -40
C to +85C
CMOS Process (P-type silicon substrate)
Flexible Blocking Architecture
Eight 4-Kword Parameter Blocks
Two-hundred and fifty-five 32-Kword Main Blocks
Bottom Parameter Location
Enhanced Data Protection Features
Individual Block Lock and Block Lock-Down with
Zero-Latency
All blocks are locked at power-up or device reset.
Block Erase, Full Chip Erase, (Page Buffer) Word
Program Lockout during Power Transitions
Automated Erase/Program Algorithms
3.0V Low-Power
11s/Word (Typ.)
Programming
9.5V No Glue Logic 9
s/Word (Typ.)
Production Programming and 0.8s Erase (Typ.)
Cross-Compatible Command Support
Basic Command Set
Common Flash Interface (CFI)
Extended Cycling Capability
Minimum 100,000 Block Erase Cycles
56-Lead TSOP (Normal Bend)
ETOX
TM*