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Электронный компонент: LH28F640SPHT-PTL12

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LHF64P01
Handle this document carefully for it contains material protected by international copyright law. Any reproduction,
full or in part, of this material is prohibited without the express written permission of the company.
When using the products covered herein, please observe the conditions written herein and the precautions outlined in
the following paragraphs. In no event shall the company be liable for any damages resulting from failure to strictly
adhere to these conditions and precautions.
(1) The products covered herein are designed and manufactured for the following application areas. When using the
products covered herein for the equipment listed in Paragraph (2), even for the following application areas, be sure
to observe the precautions given in Paragraph (2). Never use the products for the equipment listed in Paragraph
(3).
Office electronics
Instrumentation and measuring equipment
Machine tools
Audiovisual equipment
Home appliance
Communication equipment other than for trunk lines
(2) Those contemplating using the products covered herein for the following equipment which demands high
reliability, should first contact a sales representative of the company and then accept responsibility for
incorporating into the design fail-safe operation, redundancy, and other appropriate measures for ensuring
reliability and safety of the equipment and the overall system.
Control and safety devices for airplanes, trains, automobiles, and other transportation equipment
Mainframe computers
Traffic control systems
Gas leak detectors and automatic cutoff devices
Rescue and security equipment
Other safety devices and safety equipment, etc.
(3) Do not use the products covered herein for the following equipment which demands extremely high performance
in terms of functionality, reliability, or accuracy.
Aerospace equipment
Communications equipment for trunk lines
Control equipment for the nuclear power industry
Medical equipment related to life support, etc.
(4) Please direct all queries and comments regarding the interpretation of the above three Paragraphs to a sales
representative of the company.
Please direct all queries regarding the products covered herein to a sales representative of the company.
Rev. 0.06
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LHF64P01 1
CONTENTS
PAGE
56-Lead TSOP (Normal Bend) Pinout ....................... 3
Pin Descriptions.......................................................... 4
CE0, CE1, CE2 Truth Table ....................................... 5
Memory Map .............................................................. 6
Identifier Codes Address ............................................ 7
OTP Block Address Map............................................ 8
Bus Operation............................................................. 9
Command Definitions .............................................. 10
Functions of Block Lock .......................................... 12
Status Register Definition......................................... 13
Extended Status Register Definition ........................ 14
STS Configuration Definition .................................. 15
PAGE
1 Electrical Specifications ........................................ 16
1.1 Absolute Maximum Ratings........................... 16
1.2 Operating Conditions ..................................... 16
1.2.1 Capacitance.............................................. 17
1.2.2 AC Input/Output Test Conditions............ 17
1.2.3 DC Characteristics................................... 18
1.2.4 AC Characteristics -
Read-Only Operations .............................. 20
1.2.5 AC Characteristics - Write Operations .... 24
1.2.6 Reset Operations...................................... 26
1.2.7 Block Erase, (Page Buffer) Program
and Block Lock Configuration
Performance.............................................. 27
2 Related Document Information ............................. 28
3 Package and packing specification........................ 29
Rev. 0.06
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LHF64P01 2
LH28F640SPHT-PTL12
64Mbit (4Mbit
16/8Mbit
8)
Page Mode Flash MEMORY
64-Mbit Density
Bit Organization
8/
16
High Performance Page Mode Reads
for Memory Array
120/25ns 4-Word/ 8-Byte Page Mode
V
CC
=2.7V-3.6V Operation
V
CCQ
for Input/Output Power Supply Isolation
Automatic Power Savings Mode reduces I
CCR
in Static Mode
OTP (One Time Program) Block
4-Word/ 8-Byte Factory-Programmed Area
3963-Word/ 7926-Byte User-Programmable Area
High Performance Program with Page Buffer
16-Word/ 32-Byte Page Buffer
Page Buffer Program Time 12.5
s/byte (Typ.)
Operating Temperature -40
C to +85
C
Symmetrically-Blocked Architecture
Sixty-four 64-KWord/ 128-KByte Blocks
Enhanced Data Protection Features
Individual Block Lock
Absolute Protection with V
PEN
V
PENLK
Block Erase, (Page Buffer) Program Lockout during
Power Transitions
Automated Erase/Program Algorithms
Program Time 210
s (Typ.)
Block Erase Time 1s (Typ.)
Cross-Compatible Command Support
Basic Command Set
Common Flash Interface (CFI)
Extended Cycling Capability
Minimum 100,000 Block Erase Cycles
56-Lead TSOP (Normal Bend)
CMOS Process (P-type silicon substrate)
ETOX
TM*
Flash Technology
Not designed or rated as radiation hardened
The product, which is Page Mode Flash memory, is a high density, low cost, nonvolatile read/write storage solution for a
wide range of applications. The product can operate at V
CC
=2.7V-3.6V and V
PEN
=2.7V-3.6V
The product supports high performance page mode. It allows code execution directly from Flash, thus eliminating time
consuming wait states.
Fast program capability is provided through the use of high speed Page Buffer Program.
The block locking scheme is available for memory array and this scheme provides maximum flexibility for safe nonvolatile
code and data storage.
OTP (One Time Program) block provides an area to store security code and to protect its code.
* ETOX is a trademark of Intel Corporation.
Rev. 0.06
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LHF64P01 3
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
56-LEAD TSOP
STANDARD PINOUT
14mm x 20mm
TOP VIEW
A
19
A
18
A
17
A
16
V
CC
A
15
A
14
A
13
A
12
CE
0
V
PEN
RP#
A
11
A
10
A
9
A
8
GND
A
7
A
6
A
5
A
4
A
3
A
2
A
1
WE#
OE#
STS
DQ
15
DQ
7
DQ
14
DQ
6
DQ
13
DQ
5
DQ
12
DQ
4
V
CCQ
GND
DQ
11
DQ
3
DQ
10
V
CC
DQ
9
DQ
1
DQ
8
DQ
0
A
0
BYTE#
NC
1
2
3
4
56
55
54
53
A
22
CE
1
A
21
A
20
CE
2
DQ
2
GND
NC
Figure 1. 56-Lead TSOP (Normal Bend) Pinout
Rev. 0.06

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