Integrated Circuits Group
LH28F008BJT-TTLZ2
Boot Block Flash Memory
8M (1M 8)
(Model No.:
LHF08JZ2)
Spec No.:
FM01Z005
Issue Date:
December 7, 2001
P
RELIMINARY
P
RODUCT
S
PECIFICATIONS
LHF08JZ2
Rev. 1.27
Handle this document carefully for it contains material protected by international copyright law.
Any reproduction, full or in part, of this material is prohibited without the express written
permission of the company.
When using the products covered herein, please observe the conditions written herein and the
precautions outlined in the following paragraphs. In no event shall the company be liable for any
damages resulting from failure to strictly adhere to these conditions and precautions.
(1) The products covered herein are designed and manufactured for the following application
areas. When using the products covered herein for the equipment listed in Paragraph (2),
even for the following application areas, be sure to observe the precautions given in
Paragraph (2). Never use the products for the equipment listed in Paragraph (3).
Office electronics
Instrumentation and measuring equipment
Machine tools
Audiovisual equipment
Home appliance
Communication equipment other than for trunk lines
(2) Those contemplating using the products covered herein for the following equipment which
demands high reliability, should first contact a sales representative of the company and then
accept responsibility for incorporating into the design fail-safe operation, redundancy, and
other appropriate measures for ensuring reliability and safety of the equipment and the
overall system.
Control and safety devices for airplanes, trains, automobiles, and other
transportation equipment
Mainframe computers
Traffic control systems
Gas leak detectors and automatic cutoff devices
Rescue and security equipment
Other safety devices and safety equipment, etc.
(3) Do not use the products covered herein for the following equipment which demands
extremely high performance in terms of functionality, reliability, or accuracy.
Aerospace equipment
Communications equipment for trunk lines
Control equipment for the nuclear power industry
Medical equipment related to life support, etc.
(4) Please direct all queries and comments regarding the interpretation of the above three
Paragraphs to a sales representative of the company.
Please direct all queries regarding the products covered herein to a sales representative of the
company.
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LHF08JZ2
1
Rev. 1.27
CONTENTS
PAGE
1 INTRODUCTION.............................................................. 3
1.1 Features ........................................................................ 3
1.2 Product Overview......................................................... 3
1.3 Product Description ...................................................... 4
1.3.1 Package Pinout ....................................................... 4
1.3.2 Block Organization................................................. 4
2 PRINCIPLES OF OPERATION........................................ 7
2.1 Data Protection ............................................................. 8
3 BUS OPERATION ............................................................ 8
3.1 Read.............................................................................. 8
3.2 Output Disable.............................................................. 8
3.3 Standby......................................................................... 8
3.4 Reset............................................................................. 8
3.5 Read Identifier Codes................................................... 8
3.6 Write........................................................................... 10
4 COMMAND DEFINITIONS........................................... 10
4.1 Read Array Command................................................ 12
4.2 Read Identifier Codes Command ............................... 12
4.3 Read Status Register Command ................................. 12
4.4 Clear Status Register Command................................. 12
4.5 Block Erase Command ............................................... 13
4.6 Full Chip Erase Command ......................................... 13
4.7 Byte Write Command................................................. 13
4.8 Block Erase Suspend Command ................................ 14
4.9 Byte Write Suspend Command .................................. 14
4.10 Set Block and Permanent Lock-Bit Commands ....... 15
4.11 Clear Block Lock-Bits Command ............................ 15
4.12 Block Locking by the WP# ...................................... 15
PAGE
5 DESIGN CONSIDERATIONS ....................................... 25
5.1 Three-Line Output Control ........................................ 25
5.2 Power Supply Decoupling ......................................... 25
5.3 V
CCW
Trace on Printed Circuit Boards ..................... 25
5.4 V
CC
, V
CCW
, RP# Transitions .................................... 25
5.5 Power-Up/Down Protection....................................... 26
5.6 Power Dissipation ...................................................... 26
5.7 Data Protection Method ............................................. 26
6 ELECTRICAL SPECIFICATIONS ................................ 27
6.1 Absolute Maximum Ratings ...................................... 27
6.2 Operating Conditions ................................................. 27
6.2.1 Capacitance .......................................................... 27
6.2.2 AC Input/Output Test Conditions ........................ 28
6.2.3 DC Characteristics ............................................... 29
6.2.4 AC Characteristics - Read-Only Operations ........ 31
6.2.5 AC Characteristics - Write Operations ................ 33
6.2.6 Alternative CE#-Controlled Writes...................... 35
6.2.7 Reset Operations .................................................. 37
6.2.8 Block Erase, Full Chip Erase, Byte Write and
Lock-Bit Configuration Performance ................. 38
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LHF08JZ2
2
Rev. 1.27
LH28F008BJT-TTLZ2
8M-BIT ( 1Mbit 8 )
Boot Block Flash MEMORY
Low Voltage Operation
V
CC
=V
CCW
=2.7V-3.6V Single Voltage
8bit I/O Interface
High-Performance Read Access Time
100ns(V
CC
=2.7V-3.6V)
Operating Temperature
0C to +70C
Low Power Management
Typ. 2A (V
CC
=3.0V) Standby Current
Automatic Power Savings Mode Decreases I
CCR
in
Static Mode
Typ. 120A (V
CC
=3.0V, T
A
=+25C, f=32kHz)
Read Current
Optimized Array Blocking Architecture
Two 8K-byte Boot Blocks
Six 8K-byte Parameter Blocks
Fifteen 64K-byte Main Blocks
Top Boot Location
Extended Cycling Capability
Minimum 100,000 Block Erase Cycles
Enhanced Automated Suspend Options
Byte Write Suspend to Read
Block Erase Suspend to Byte Write
Block Erase Suspend to Read
Enhanced Data Protection Features
Absolute Protection with V
CCW
V
CCWLK
Block Erase, Full Chip Erase, Byte Write and Lock-
Bit Configuration Lockout during Power
Transitions
Block Locking with Command and WP#
Permanent Locking
Automated Block Erase, Full Chip Erase, Byte
Write and Lock-Bit Configuration
Command User Interface (CUI)
Status Register (SR)
SRAM-Compatible Write Interface
Industry-Standard Packaging
40-Lead TSOP
ETOX
TM*
Nonvolatile Flash Technology
CMOS Process (P-type silicon substrate)
Not designed or rated as radiation hardened
The product is a high-density, low-cost, nonvolatile, read/write storage solution for a wide range of applications.
The product can operate at V
CC
=2.7V-3.6V and V
CCW
=2.7V-3.6V or 11.7V-12.3V. Its low voltage operation capability
realize battery life and suits for cellular phone application.
Its Boot, Parameter and Main-blocked architecture, low voltage and extended cycling provide for highly flexible component
suitable for portable terminals and personal computers. Its enhanced suspend capabilities provide for an ideal solution for code
+ data storage applications.
For secure code storage applications, such as networking, where code is either directly executed out of flash or downloaded to
DRAM, the product offers four levels of protection: absolute protection with V
CCW
V
CCWLK
, selective hardware block
locking or flexible software block locking. These alternatives give designers ultimate control of their code security needs.
The product is manufactured on SHARP's 0.25m ETOX
TM*
process technology. It come in industry-standard package: the
40-lead TSOP, ideal for board constrained applications.
*ETOX is a trademark of Intel Corporation.
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LHF08JZ2
3
Rev. 1.27
1 INTRODUCTION
This datasheet contains the product specifications. Section
1 provides a flash memory overview. Sections 2, 3, 4 and
5 describe the memory organization and functionality.
Section 6 covers electrical specifications.
1.1 Features
Key enhancements of the product are:
Single low voltage operation
Low power consumption
Enhanced Suspend Capabilities
Boot Block Architecture
Please note following:
V
CCWLK
has been lowered to 1.0V to support 2.7V-
3.6V block erase, full chip erase, byte write and lock-
bit configuration operations. The V
CCW
voltage
transitions to GND is recommended for designs that
switch V
CCW
off during read operation.
1.2 Product Overview
The product is a high-performance 8M-bit Boot Block
Flash memory organized as 1M-byte of 8 bits. The 1M-
byte of data is arranged in two 8K-byte boot blocks, six
8K-byte parameter blocks and fifteen 64K-byte main
blocks which are individually erasable, lockable and
unlockable in-system. The memory map is shown in
Figure 3.
The dedicated V
CCW
pin gives complete data protection
when V
CCW
V
CCWLK
.
A Command User Interface (CUI) serves as the interface
between the system processor and internal operation of the
device. A valid command sequence written to the CUI
initiates device automation. An internal Write State
Machine (WSM) automatically executes the algorithms
and timings necessary for block erase, full chip erase, byte
write and lock-bit configuration operations.
A block erase operation erases one of the device's 64K-
byte blocks typically within 1.2s (3V V
CC
, 3V V
CCW
),
8K-byte blocks typically within 0.6s (3V V
CC
, 3V V
CCW
)
independent of other blocks. Each block can be
independently erased minimum 100,000 times. Block
erase suspend mode allows system software to suspend
block erase to read or write data from any other block.
Writing memory data is performed in byte increments of
the device's 64K-byte blocks typically within 31s (3V
V
CC
, 3V V
CCW
), 8K-byte blocks typically within 32s
(3V V
CC
, 3V V
CCW
). Byte write suspend mode enables
the system to read data or execute code from any other
flash memory array location.
Individual block locking uses a combination of bits,
twenty-three block lock-bits, a permanent lock-bit and
WP# pin, to lock and unlock blocks. Block lock-bits gate
block erase, full chip erase and byte write operations,
while the permanent lock-bit gates block lock-bit
modification and locked block alternation. Lock-bit
configuration operations (Set Block Lock-Bit, Set
Permanent Lock-Bit and Clear Block Lock-Bits
commands) set and cleared lock-bits.
The status register indicates when the WSM's block erase,
full chip erase, byte write or lock-bit configuration
operation is finished.
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