DESCRIPTION
The LR38516 is a CMOS timing generator IC
which is designed for video-camcorders, and which
generates timing pulses for driving 350 k-pixel
progressive scan color CCD area sensors,
synchronous pulses for TV signals and processing
pulses for video signals.
FEATURES
Designed for 350 k-pixel progressive scan color
CCD area sensors
Frame rate : 30 frame/s
Shutter speed can be controlled in 1H period
using a serial code
TV mode selection, power mode selection and
the phase selection of DCLK can be also
controlled by using a serial code
+3 V, +4.5 V and +5 V power supplies
Package :
48-pin QFP (QFP048-P-0707) 0.5 mm pin-pitch
PIN CONNECTIONS
LR38516
In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in
catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device.
1
LR38516
Timing Generator IC for 350 k-pixel
Progressive Scan Color CCDs
1
48 47 46 45 44 43 42 41 40 39
37
13 14 15 16 17 18 19 20 21 22 23 24
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
VTAX
VTBX
VTCX
VTDX
OFDX
V
DD3
GND
VHAX
VHCX
ID
WEN
TST
1
DBLK
GND
ADCK
NC
V
DD4
FH
2
GND
FH
1
V
DD4
CLRX
CCD
2
CCD
1
TST
3
ED
2
ED
1
ED
0
HD
GND
V
DD3
DMVD
DCLK
CLK
CKO
CKI
PBLK
BCPX
BPX
CLPX
GND
FCDS
FS
V
DD5
RS
FR
GND
TST
2
38
48-PIN QFP
TOP VIEW
(QFP048-P-0707)
LR38516
2
BLOCK DIAGRAM
TST
3
ED
2
ED
1
ED
0
HD
GND
V
DD3
DMVD
DCLK
CLK
CKO
CKI
36
35
34
33
32
31
30
29
28
27
26
25
TST
2
GND
FR
RS
V
DD5
FS
FCDS
GND
CLPX
BPX
BCPX
PBLK
VTAX
VTBX
VTCX
VTDX
OFDX
V
DD3
GND
VHAX
VHCX
ID
WEN
TST
1
CCD
1
CCD
2
CLRX
V
DD4
FH
1
GND
FH
2
V
DD4
NC
ADCK
GND
DBLK
1/2
1/2
H COUNTER
RESET
OSC
RESET
GATE
DECODER
RESET
1/2
DATA LATCH & SHUTTER CONTROL
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
10
11
12
48
47
46
45
44
43
42
41
40
39
38
37
LEVEL
SHIFTER
V COUNTER
LR38516
3
PIN NO. SYMBOL
I/O
POLARITY
PIN NAME
DESCRIPTION
1
VTAX
O3
Vertical transfer
pulse output 1
A vertical transfer pulse for CCD.
Connect to V
1AX
pin of the vertical driver IC.
For details, see
"CONNECTION OF VERTICAL TRANSFER PULSES"
.
2
VTBX
O3
Vertical transfer
pulse output 2
A vertical transfer pulse for CCD.
Connect to V
2AX
pin of the vertical driver IC.
For details, see
"CONNECTION OF VERTICAL TRANSFER PULSES"
.
3
VTCX O3
Vertical transfer
pulse output 3
A vertical transfer pulse for CCD.
Connect to V
3AX
pin of the vertical driver IC.
For details, see
"CONNECTION OF VERTICAL TRANSFER PULSES"
.
4
VTDX O3
Vertical transfer
pulse output 4
A vertical transfer pulse for CCD.
Connect to V
4AX
pin of the vertical driver IC.
For details, see
"CONNECTION OF VERTICAL TRANSFER PULSES"
.
5
OFDX
O3
OFD pulse output
A pulse that sweeps the charge of the photo-diode
for the electronic shutter. Connect to OFD pin of CCD
through the vertical driver IC and DC offset circuit.
Held at H level at normal mode.
6
V
DD3
Power supply
Supply of +3 V power.
A grounding pin.
Ground
GND
7
9
VHCX
O3
Readout pulse
output 3
A pulse that transfers the charge of the photo-diode to
the vertical shift register.
For details, see
"CONNECTION OF VERTICAL TRANSFER PULSES"
.
8
VHAX
O3
Readout pulse
output 1
A pulse that transfers the charge of the photo-diode to
the vertical shift register.
For details, see
"CONNECTION OF VERTICAL TRANSFER PULSES"
.
The pulse is used in color separator. The signal
switches H and L at every line.
H : R color line
L : B color line
Line index pulse
output
O3
ID
10
11
WEN
O3
Write enable output
Write enable output for low-speed shutter pulse.
A test pin. Set open or to L level in the normal mode.
Test pin 1
ICD3
TST
1
12
13
PBLK
O5
Pre-blanking pulse
output
A pulse that corresponds to the cease period of the
horizontal transfer pulse.
A pulse to clamp the optical black signal.
Output stays low during the absence of effective pixels
within the vertical blanking.
Optical black clamp
pulse output
O5
BCPX
14
PIN DESCRIPTION
15
BPX
O5
Clamp pulse output
A pulse to clamp the signal. The phase is same as BCPX
(pin 14). This pulse is continuous at horizontal cycle.
A pulse to clamp the dummy outputs of CCD. The pulse
stays high during the sweep-out period.
Clamp pulse output
O5
CLPX
16
17
GND
Ground
A grounding pin.
LR38516
4
PIN NO. SYMBOL
I/O
POLARITY
PIN NAME
DESCRIPTION
A pulse to sample-hold the signal from CCD.
The polarity can be changed by serial data.
The output phase of FS is selected by serial data.
CDS pulse output 2
O6MA5
FS
19
20
V
DD5
Power supply
Supply of +5 V power.
A pulse to sample-hold the signal from CDS circuit.
The polarity can be changed by serial data.
The output phase of RS is selected by serial data.
S/H pulse output
O6MA5
RS
21
A grounding pin.
Ground
GND
23
22
FR
O6MA52
Reset pulse output
A pulse to reset the charge of output circuit.
Connect to
R
pin of CCD through the DC offset circuit.
The output phase of FR is selected by serial data.
24
TST
2
ICD3
Test pin 2
A test pin. Set open or to L level in the normal mode.
An input pin for reference clock oscillation.
Connect to CKO (pin 26) with R.
Frequency : 24.54545 MHz (1 560 fH)
fH = Horizontal frequency
Clock input
OSCI3
CKI
25
26
CKO
OSCO3
Clock output
An output pin for reference clock oscillation.
The output is the inverse of CKI (pin 25).
18
FCDS
O6MA5
CDS pulse output 1
A pulse to clamp the feed-through level from CCD.
The polarity can be changed by serial data.
The output phase of FCDS is selected by serial data.
An output pin to generate HD and VD pulses.
Connect to clock input pin of SSG IC.
Frequency : 12.27273 MHz (780 fH)
Clock output
O6MA3
CLK
27
An input pin for the data of the shift register, to control
the functions of LR38516. For details, see
"Serial Data
Control"
.
Shift register data
input
ED
2
35
IC3
An output pin for DSP IC. The output phase of DCLK is
selected by serial data step by 90.
Frequency : 12.27273 MHz (780 fH)
Clock output
O6MA3
DCLK
28
An input pin for reference of vertical pulse.
Connect to VD pin of DSP IC.
Vertical reference
pulse input
IC3
DMVD
29
30
V
DD3
Power supply
Supply of +3 V power.
A grounding pin.
Ground
GND
31
32
HD
IC3
Horizontal reference
pulse input
An input pin for reference of horizontal pulse.
Connect to HD pin of DSP IC.
An input pin for the strobe pulse, to control the functions
of LR38516. For details, see
"Serial Data Control"
.
Strobe pulse input
ED
0
33
IC3
IC3
34
ED
1
Shift register clock
input
An input pin for the clock of the shift register, to control
the functions of LR38516. For details, see
"Serial Data
Control"
.
ICD3
36
TST
3
Test pin 3
A test pin. Set open or to L level in the normal mode.
LR38516
5
PIN NO. SYMBOL
I/O
POLARITY
PIN NAME
DESCRIPTION
An input pin to select CCD.
At CCD
1
= H and CCD
2
= H
1/4-type 350 k-pixel CCD (at NTSC)
At CCD
1
= H and CCD
2
= L
1/3-type 350 k-pixel CCD (at NTSC)
CCD selection input 1
CCD
1
37
ICU4
ICU4
38
CCD
2
CCD selection input 2
ICU4
39
CLRX
Data clear input
An input pin for resetting all serial data at power on.
Connect V
DD
through the diode and GND through the
capacitor.
Supply of +4.5 V power.
Power supply
V
DD4
40
O6MA43
41
FH
1
Horizontal transfer
pulse output 1
A horizontal transfer pulse for CCD.
Connect to
H1
pin of CCD.
A grounding pin.
Ground
GND
42
O6MA43
43
FH
2
Horizontal transfer
pulse output 2
A horizontal transfer pulse for CCD.
Connect to
H2
pin of CCD.
Supply of +4.5 V power.
Power supply
V
DD4
44
45
NC
No connection
No connection.
An output pin for A/D converter. The output phase of
ADCK is selected by serial data step by 90.
AD clock output
O6MA4
ADCK
46
47
GND
Ground
A grounding pin.
Composite blanking pulse.
Vertical : 33H period
Dummy composite
output
O3
DBLK
48
IC3
: Input pin (CMOS level)
ICU4
: Input pin (CMOS level with pull-up resistor)
ICD3
: Input pin (CMOS level with pull-down resistor)
O3
: Output pin
O6MA3
: Output pin
O6MA4
: Output pin
O6MA43 : Output pin
O5
: Output pin
O6MA5
: Output pin
O6MA52 : Output pin
OSCI3
: Input pin for oscillation
OSCO3
: Output pin for oscillation
CONNECTION OF VERTICAL TRANSFER PULSES
OUTPUT PULSE
VTAX
VHAX
VTDX
VTBX
VHCX
VTCX
3-level pulse with V driver
2-level pulse with V driver
2-level pulse with V driver
3-level pulse with V driver
LEVEL SHIFT, INVERT, MIX
1/4-TYPE 350 k
V3B
V1
V2
V3A
V3
V2
V4
V1
1/3-TYPE 350 k, 380 k AND 450 k
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