51
RED
DLR2416
HIGH EFFICIENCY RED
DLO2416
GREEN
DLG2416
.200" 4-Character 5x7 Dot Matrix
Alphanumeric IntelligentDisplay
with Memory/Decoder/Driver
FEATURES
Dot Matrix Replacement for DL2416T
0.200" 5 x 7 Dot Matrix Characters
128 Special ASCII Characters for English, German,
Italian, Swedish, Danish, and Norwegian
Languages
Wide Viewing Angle: X Axis 50
Maximum,
Y Axis
75
Maximum
Close Multi-line Spacing, 0.8" Centers
Fast Access Time, 110 ns at 25
C
Full Size Display for Stationary Equipment
Built-in Memory
Built-in Character Generator
Built-in Multiplex and LED Drive Circuitry
Direct Access to Each Digit Independently
and Asynchronously
Independent Cursor Function
Memory Function: Clears Character and Cursor
Memory Simultaneously
True Blanking for Intensity Dimming Applications
End-Stackable, 4-Character Package
Intensity Coded for Display Uniformity
Extended Operating Temperature Range:
40
C to +85
C
Superior ESD Immunity
Wave Solderable
TTL Compatible over Operating Temperature
Range
Interdigit Blanking
DESCRIPTION
The DLR/DLO/DLG2416 is a four digit 5x7 dot matrix display module
with a built-in CMOS integrated circuit. This display is X/Y stackable.
The integrated circuit contains memory, ASCII ROM decoder, multi-
plexing circuitry and drivers. Data entry is asynchronous and can be
random. A display system can be built using any number of DLX2416s
since each digit can be addressed independently and will continue to
display the character last stored until replaced by another.
System interconnection is very straightforward. The least significant
two address bits (A0, A1) are normally connected to the like-named
inputs of all displays in the system. With two chip enables (CE1 and
CE2) four displays (16 characters) can easily be interconnected with-
out a decoder.
Data lines are connected to all DLX2416s directly and in parallel, as is
the write line (WR). The display will then behave as a write-only mem-
ory.
The cursor function causes all dots of a digit position to illuminate at
half brightness. The cursor is not a character, and when removed the
previously displayed character will reappear.
The DLX2416 has several features superior to competitive devices.
True "blanking" allows the designer to dim the display for more flexibil-
ity of display presentation. Finally the CLR clear function will clear the
cursor RAM and the ASCII character RAM simultaneously.
The character set consists of 128 special ASCII characters for English,
German, Italian, Swedish, Danish, and Norwegian.
All products are subjected to out-going AQL's of 0.25% for brightness
matching, visual alignment and dimensions, 0.065% for electrical and
functional.
.198
(5.03)
.800
(20.32)
max.
.600
.020
(15.24
.51)
.1.00 max.
(25.4)
.260 (6.60)
.100 16 pl.
(2.54) at Seating Plane
.260
(6.60) ref.
.012 (.30)
.002 (.05)
18 pl.
.031
(.79)
.031
(.79)
.250
(6.35)
.136
(3.45)
.050 4 pl.
(1.27)
.010 (.25) 8 pl.
Part No.
.Pin 1
Indicator
EIA Date Code
.070 (1.78)
.003 (.08)
Luminous
Intensity Code
.160
.020
(4.06
.51)
DLX2416
SIEMENS YYWW
Z
.018
(.46)
.002 (.05) 18 pl.
.095
(2.41)
ref.
TOLERANCE: XXX
.01 (.25)
Package Dimensions in inches (mm)
52
DLR/DLO/DLG2416
Maximum Ratings
DC Supply Voltage ........................................0.5 V to +7.0 Vdc
Input Voltage, Respect to GND
(all inputs) .......................................... 0.5 V to V
CC
+0.5 Vdc
Operating Temperature ..................................... 40
C to +85
C
Storage Temperature ....................................... 40
C to +100
C
Relative Humidity at 85
C.................................................... 85%
Maximum Solder Temperature, 0.063" (1.59 mm)
below Seating Plane, t<5 sec ...................................... 260
C
Optical Characteristics
Spectral Peak Wavelength
Red ...................................................................... 660 nm typ.
HER ..................................................................... 630 nm typ.
Green .................................................................. 565 nm typ.
Character Height ............................................. 0.200" (5.08 mm)
Time Averaged Luminous Intensity
(1)
at V
CC
=5 V
Red................................................................ 60
cd/LED typ.
HER ............................................................. 100
cd/LED typ.
Green .......................................................... 120
cd/LED typ.
LED to LED Intensity Matching at V
CC
=5 V .............1.8:1.0 max.
LED to LED Hue Matching (Green only)
at V
CC
=5 V ...........................................................
2 nm max.
Viewing Angle (off normal axis)
Horizontal ...............................................................
50
max.
Vertical . .................................................................
75
max.
Note 1: Peak luminous intensity values can be calculated by multiply-
ing these values by 7.
Figure 1. Top View
18 17 16 15 14 13 12 11 10
1 2 3 4 5 6 7 8 9
digit 3 digit 2 digit 1 digit 0
Pins and Functions
Figure 2. Timing characteristics --Write Cycle waveforms
Pin
Function
Pin
Function
1
CE1 Chip Enable
10
GND
2
CE2 Chip Enable
11
D0 Data Input
3
CLR Clear
12
D1 Data Input
4
CUE Cursor En-
able
13
D2 Data Input
5
CU Cursor Select
14
D3 Data Input
6
WR Write
15
D6 Data Input
7
A1 Digit Select
16
D5 Data Input
8
A0 Digit Select
17
D4 Data Input
9
V
CC
18
BL Display Blank
T
DS
T
DH
T
W
T
ACC
T
AH
T
AS
T
CEH
T
CUH
T
CES
T
CUS
T
CLRD
2.0 V
0.8 V
CE1, CE2
CU, CLR
A
0
, A
1
D
0
-D
6
WR
2.0 V
0.8 V
2.0 V
0.8 V
2.0 V
0.8 V
Note: These waveforms are not edge triggered.
DC Characteristics
Parameter
40
C
+25
C
+85
C
Units
Condition
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
I
CC
80 dots on
135
160
110
130
95
115
mA
V
CC
=5 V
I
CC
Cursor all dots at 50%
135
100
100
mA
V
CC
=5 V
I
CC
Blank
2.8
4.0
2.3
3.0
2.0
2.5
mA
V
CC
=5 V, BL=0.8 V
I
IL
(all inputs)
30
60
120
25
50
100
20
40
80
A
V
IN
=0.8 V, V
CC
=5 V
V
IH
(all inputs)
2.0
2.0
2.0
V
V
CC
=5 V
0.5 V
V
IL
(all inputs)
0.8
0.8
0.8
V
V
CC
=5 V
0.5 V
V
CC
4.5
5.0
5.5
4.5
5.0
5.5
4.5
5.0
5.5
V
53
DLR/DLO/DLG2416
AC Characteristics
Guaranteed Minimum Timing, Parameters at V
CC
=5.0 V
0.5 V
Note: T
ACC
=Set Up Time + Write Time + Hold Time.
Loading Data Table
X=don't care
Loading Cursor Table
X=don't care
s
= all dots on
Parameter
Symbol
40
C
+25
C
+85
C
Unit
Chip Enable Set Up Time
T
CES
0
0
0
ns
Address Set Up Time
T
AS
10
10
10
ns
Cursor Set Up Time
T
CUS
10
10
10
ns
Chip Enable Hold Time
T
CEH
0
0
0
ns
Address Hold Time
T
AH
20
30
40
ns
Cursor Hold Time
T
CUH
20
30
40
ns
Clear Disable Time
T
CLRD
1
1
1
s
Write Time
T
W
60
70
90
ns
Data Set Up Time
T
DS
20
30
50
ns
Data Hold Time
T
DH
20
30
40
ns
Clear Time
T
CLR
1
1
1
s
Access Time
T
ACC
90
110
140
ns
Control
Address
Data
Display Digit
BL
CE1
CE2
CUE
CU
WR
CLR
A1
A0
D6
D5
D4
D3
D2
D1
D0
3
2
1
0
H
X
X
L
X
H
H
previously loaded display
G
R
E
Y
H
H
X
L
X
X
H
X
X
X
X
X
X
X
X
X
G
R
E
Y
H
X
H
L
X
X
H
X
X
X
X
X
X
X
X
X
G
R
E
Y
H
L
L
L
H
L
H
L
L
H
L
L
L
H
L
H
G
R
E
E
H
L
L
L
H
L
H
L
H
H
L
H
L
H
L
H
G
R
U
E
H
L
L
L
H
L
H
H
L
H
L
L
H
H
L
L
G
L
U
E
H
L
L
L
H
L
H
H
H
H
L
L
L
L
H
L
B
L
U
E
L
X
X
X
X
H
H
X
X
blank display
H
L
L
L
H
L
H
H
H
H
L
L
L
H
H
H
G
L
U
E
H
X
X
L
X
H
L
X
X
clears character displays
H
L
L
L
H
L
L
X
X
see character code
see character set
Digit
BL
CE1
CE2
CE3
CE4
CUE
CU
WR
CLR
A1
A0
D6
D5
D4
D3
D2
D1
D0
3
2
1
0
H
X
X
X
X
L
X
H
H
previously loaded display
B
E
A
R
H
X
X
X
X
H
X
H
H
display previously stored cursors
B
E
A
R
H
H
H
L
L
H
L
L
H
L
L
X
X
X
X
X
X
H
B
E
A
s
H
H
H
L
L
H
L
L
H
L
H
X
X
X
X
X
X
H
B
E
s
s
H
H
H
L
L
H
L
L
H
H
L
X
X
X
X
X
X
H
B
s
s
s
H
H
H
L
L
H
L
L
H
H
H
X
X
X
X
X
X
H
s
s
s
s
H
H
H
L
L
H
L
L
H
H
L
X
X
X
X
X
X
L
s
E
s
s
H
X
X
X
X
L
X
H
H
disable cursor display
B
E
A
R
H
H
H
L
L
L
L
L
H
H
H
X
X
X
X
X
X
L
B
E
A
R
H
X
X
X
X
H
H
X
H
display stored cursors
B
E
s
s
54
DLR/DLO/DLG2416
Loading Data
Setting the chip enable (CE1, CE2) to their true state will enable
data loading. The desired data code (D0-D6) and digit address
(A0, A1) must be held stable during the write cycle for storing
new data.
Data entry may be asynchronous and random. Digit 0 is
defined as right hand digit with A1=A2=0.`
To clear the entire internal four-digit memory hold the clear
(CLR) low for 1
s. All illuminated dots will be turned off within
one complete display multiplex cycle, 1 msec minimum. The
clear function will clear both the ASCII RAM and the cursor
RAM.
Setting the chip enables (CE1, CE2) and cursor select (CU) to
their true state will enable cursor loading. A write (WR) pulse
will now store or remove a cursor into the digit location
addressed by A0, A1, as defined in data entry. A cursor will be
stored if D0=1 and will removed if D0=0. The cursor (CU) pulse
width should not be less than the write (WR) pulse or erroneous
data may appear in the display.
If the cursor is not required, the cursor enable signal (CUE)
may be tied low to disable the cursor function. For a flashing
cursor, simply pulse CUE. If the cursor has been loaded to any
or all positions in the display, then CUE will control whether the
cursor(s) or the characters will appear. CUE does not affect the
contents of cursor memory.
Loading Cursor
Setting the chip enables (CE1, CE2) and cursor select (CU) to
their true state will enable cursor loading. A write (WR) pulse
will now store or remove a cursor into the digit location
addressed by A0, A1, as defined in data entry. A cursor will be
stored if D0=1 and will removed if D0=0. The cursor (CU) pulse
width should not be less than the write (WR) pulse or erroneous
data may appear in the display.
If the cursor is not required, the cursor enable signal (CUE)
may be tied low to disable the cursor function. For a flashing
cursor, simply pulse CUE. If the cursor has been loaded to any
or all positions in the display, then CUE will control whether the
cursor(s) or the characters will appear. CUE does not affect the
contents of cursor memory.
Display Blanking
Blanking the display may be accomplished by loading a blank
or space into each digit of the display or by using the (BL) dis-
play blank input.
Setting the (BL) input low does not affect the contents of either
data or cursor memory.
A flashing circuit can easily be constructed using a 555 astable
multivibrator. Figure 3 illustrates a circuit in which varying R2
(100K~10K) will have a flash rate of 1 Hz~10 Hz.
The display can be dimmed by pulse width modulating the
(BL) at a frequency sufficiently fast to not interfere with the
internal clock. The dimming signal frequency should be 2.5
KHz or higher. Dimming the display also reduces power con-
sumption.
An example of a simple dimming circuit using a 556 is illus-
trated in Figure 4. Adjusting potentiometer R3 will dim the dis-
play by changing the blanking pulse duty cycle.
Figure 3. DLX2416--Flashing circuit using a 555
and Flashing (Blanking) timing
Figure 4. DLX2416Dimming circuit using a 556
and Dimming (Blanking) timing
555
Timer
R1
4.7 K
R2
100 K
C4
0.01
F
C3
10
F
VCC=5.0 V
To BL
Pin on
Display
1
2
3
4
8
7
6
5
Blanking Pulse Width
50% Duty Factor
500 ms
2 Hz Blanking Frequency
1
0
~
~
~
~
1
0
200
s
Blanking Pulse Width
4
s min., 196
s max.
5 KHz Blanking Frequency
~
~
~
~
C3
1000 pF
1
2
3
4
5
6
7
14
13
12
11
10
9
8
556
Dual Timer
R2
47 K
R1
200
C1
4700 pF
C4
0.01
F
R3
500 K
VCC=5.0 V
Dimming (Blanking)
Control
C2
0.01
F
To BL Pin
on Display
55
DLR/DLO/DLG2416
Figure 5. Internal block diagram
Figure 6. Typica schematic--16-character system
3 2 1 0
Display
Rows 0 to 6
Timing and Control Logic
Row Control Logic
&
Row Drivers
Row Decoder
RAM Read Logic
RAM
Memory
ROM
7 Bit ASCII Code
Column Data
D6
D5
D4
D3
D2
D1
D0
4480 bits
CUE
OSC
128
Counter
7
Counter
Column Enable
Latches and
Column Drivers
Latches
Column Decoder
WR
A0
A1
Write
4 X 7 bit
Columns 0 to 19
Address Lines
BL
128 X 35 Bit
ASCII
Character
Decode
Cursor
Memory
4 X 1 bit
Cursor Memory Bits 0 to 3
Decoder
Address
CE2
CE1
CE2
CE2
D
0
-D
6
+5
GND
BL
D
15
D
12
D
11
D
8
D
7
D
4
D
3
D
0
CLR
WR
CU
CUE
A A
0 1
7
14
2
CE1
CE1
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