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25.15.10.41.33a
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1
TECHNICAL DATA
EIB-TP-UART-IC
GENERAL DESCRIPTION
The TP - UART - IC (Twisted Pair - Universal Asynchronous Receive Transmit - IC) is a
transceiver which supports the connection of microcontrollers of sensors, actuators, or other
applications to the EIB (European - Installation - Bus).
This module supports every transmit- and receive - function and also the high ohmic decoupling
of energy from bus line. It generates further a stabilized 3.3V or 5V supply to use by a host
controller. Up to 256 subscribers can be connected to one bus line.
An UART interface is realized for communication with a host controller. The coupling can be
realized directly or via optical couplers.
The TP - UART - IC consists of two main parts: the digital part (UART - Interface) and the analog
part ( analog circuit part).
Features
Signaling for standard UART (LSB-First,
Idle is 1)
Baud rate 9600 or 19200 baud for the
communication:
TP - UART <--> Host - Controller
Direct coupling to host controller (TxD,
RxD), or via optical couplers (optional)
2 - wire protocol with software handshake
Buffering of send frames
No critical timing during transmission
64 Byte telegram buffer
Operating temperature range:
-25C to 85C
Supervision of EIB bus voltage
VB -
Tx0
Rx IN
MODE 0
MODE 1
TEST MODE
X 1
X 2
TSTOUT
RxD
11
12
13
14
15
16
17
18
19
20
10
9
8
7
6
5
4
3
2
1
VB +
VSP
CSA
VCC
DIV
SAVE
TSTIN
VIF
RESn
TxD
TP-UART-IC
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25.15.10.41.33a
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2
GENERAL DRAWING
Power
Supply
30V
TP-UART-
IC
+
-
A - Bus
B - Bus
Bus Device 1
Bus Device 2
Bus Device n
Optional Power Supply
230V / 50Hz
Optional
Electrical Isolation
(Optocoupler)
TxD
RxD
TxD
RxD
TxD
RxD
...
TP-UART-
IC
TP-UART-
IC
Application
Application
Application
STRUCTURE of TP - UART - IC
(Block Diagram:)
Host-Controller
EIB
Filter
1 Bytebuffer
(receive)
EIB-Receiver
UART-Transmitter
64 Byte
Telegram-
Sendbuffer
EIB-Transmitter
TSTIN_BDS
(Baud rate)
RxD
TxD
EIB-Transmit RxD3
EIB-ReceiveTxD3
Digital - Part
RESn
Controll-Logic
State-Byte
ACK-Flags
UART-Receiver
TSTout
Mode 0
Mode 1
4,9152 MHz
0,05 %
Analog - Part
Controll-Logic
Transmit
Receive
Power Supply
5 V Regulator
TP-UART-IC
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25.15.10.41.33a
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1 The ANALOG - PART
1.1 General Device Specification
1.1.1 Absolute Maximum Ratings
All voltages are referring to VB-. Currents are declared positive in case of flowing into pin.
Symbol
Parameter
Min
Max
Unit Note
VB+
positive line voltage
-0.5
45
V
1)
V
CC
positive voltage supply (internal or external supply)
-0.5
7
V
2)
V
IF
positive external voltage supply
-0.5
7
V
2)
V
VSP
interstate voltage (generated by on-chip regulator)
-0.5
13
V
2)
V
TxO
voltage on pin Tx0
-0.5
45
V
1)
V
RxIN
voltage on pin RxIN
-15
45
V
1) 4)
V
LV1
voltage on low voltage pins MODE0, MODE1, TSTIN,
TESTMODE
-0.5
V
CC
+0.5
V
V
LV2
voltage on low voltage pins TxD, RESn, TSTOUT, X1,
X2, RxD
-0.5
V
IF
+0.5
V
j
junction temperature
170
C
S
storage temperature
-65
170
C
V
ESD
max. ESD stress voltage
1000
V
3)
I
LATCHUP
static current for latchup initialization
50
mA
R
th
thermal resistance of the SOIC-20 package
58.5
71.5
K/W
P
V
maximum power dissipation
1
W
1) During surge impulse is allowed and guaranteed by ext. elements:
-20 V for 2 sec and
65 V for 150 sec
2) Allowed voltage relations:
(a)
V
CC
and V
VSP
normal / VB+ and V
IF
can be 0 V
(b)
V
VSP
normal / V
CC
, VB+ and V
IF
can be 0 V
(c)
V
IF
normal / V
CC
, VB+ and V
VSP
can be 0 V
The combination: V
CC
normal and V
VSP
= 0 V is not allowed!
3) Human body model: 100 pF, 1.5 k
4) Dynamic via C
REC
= 47 nF in case of switching-on the bus voltage
1.1.2 Recommended Operating Conditions
Symbol
Parameter
Min
Max
Unit Note
VB+
positive line voltage
20
33
V
1)
V
CC
positive voltage supply for external supply
(digital test modes with SHB = 0)
4.75
5.25
V
V
IF
positive external supply voltage
3.0
5.25
V
amb
ambient temperature
-25
85
C
f
clk
clock frequency (external quartz)
4.9152
MHz
1) DC voltage of bus, with signal and compensation pulse 11 V ... 45 V
1.1.3 Humidity Level
The valid susceptibility against humidity is described by JEDEC JESD22-A112, table 1, level
5.
TP-UART-IC
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25.15.10.41.33a
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4
1.2 DC and AC Characteristics
The following parameters are valid in the ambient temperature range
amb
= -25
C to 85
C
and for bus voltage VB+ = 20 to 33 V if it is not otherwise declared. When the bus voltage is
lower than 20 V and no RESET is active then the normal functionality must be fulfilled, but
the parameters may be outside the limits.
1.2.1 Bus Pins VB+ and VB- (Pins 10, 11)
Via these pins the ASIC is connected to the bus line. VB- represents the reference potential.
Symbol
Parameter
Min
Max
Unit Note
V
VB+
positive line voltage
-0.5
45
V
1)
I
normal
current consumption in analog mode (without clock)
1
mA
I
normal
current consumption in normal mode (with clock)
1.6
mA 4,9152 MHz
1) during surge impulse is allowed and guaranteed by ext. Elements: -20 V for 2 s and 65 V for 150 s
1.2.2 Buffer Voltage VSP (Pin 9)
The ASIC delivers a supply voltage of 5 volts to external loads. In order to prevent a rapid
change of bus current as a result of a rapid change of the load an external capacitor at the
pin VSP is used for energy storage. The static voltage is adjusted to app. 8,8 V (8,2 ...9,2)
by an internal regulator.
Symbol
Parameter
Min
Max
Unit
Note
V
VSP
Energy buffer voltage
5.76
13
V
1)
C
VSP
External storage capacitor
80
F
2)
1) due to the limited current changing rate an overshoot of V
VSP
after load change may occur
2) recommended 100
F; must be larger than the capacitor at VCC
1.2.3 Current Controlling Pin CSA (Pin 8)
An external capacitor at this pin prevents a quick change of ASIC current in case of quick
changing bus voltage VB+ or load current IVCC. The ASIC current changes with a rate of
max. 0,5 mA/ms (CCSA = 47 nF).
Symbol
Parameter
Min
Max
Unit
Note
CCR
max. current changing rate (ext. Start, C
CSA
= 47 nF)
0.2
0.5
mA/ms
1)
1)tolerance of capacitor C
CSA
= 47nF/50V +/- 5%
TP-UART-IC
The reproduction, transmission or use of this document or it`s contents is not permitted without express written authority. All
rights, including right created by patent grant or registration of a utility model or design, are reserved. Technical changes
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25.15.10.41.33a
25.10.01 page
5
1.2.4 Supply Pin VCC (Pin 7)
The pin VCC delivers the internal generated voltage supply to external loads. An external
short-circuit from the VCC pin to GND will not cause a destruction of the ASIC.
Symbol
Parameter
Min
Max
Unit
Note
V
VCC
Voltage supply (generated by the ASIC or external
source in case of digital test modes)
4.75
5.25
V
1)
C
VCC
External storage capacitor
6,8
10
F
+/-20 %
I
VCC
External load at VCC
10
mA
2)
1) VB+
11 V
2) If there is a current leap I
Leap
with a slope greater than 1 mA/ms the following formulas have to be
applied:
I
Stat
is the static current, i.e. slope not greater than 1 mA/ms
I
Stat
3 mA;
I
Leap
(3 mA I
Stat
) + 5 mA
3mA < I
Stat
5 mA;
I
Leap
8 mA - I
Stat
I
Stat
> 5 mA;
I
Leap
3 mA
1.2.5 Receive Pin RxIN (Pin 13)
The Receive Pin RxIN is coupled to the EIB bus by an external capacitor.
Symbol
Parameter
Min
Max
Unit
Note
C
REC
external coupling capacitor
44.5
49.5
nF
typ.47 nF
1)
1)
external capacitor 47 nF/50V
5%
1.2.6 Transmit Pin TxO (Pin 12)
The transmit pin is connected to EIB via external resistor of typ. 68
/1W (see Typical
Application Circuits).
Symbol
Parameter
Min
Max
Unit Note
V
TRANS
transmit voltage
-6
-9
V
1)
1) related to VB+
1.2.7 Supply Pin VIF (Pin 3)
The Pin VIF is used as supply voltage for the pins TxD, RxD, RESn, TSTOUT, X1, X2 and
determines their high input or output level.
Symbol Parameter
Min
Max
Unit
Note
V
IF
external supply voltage for interface
3
5.5
V
1)
C
VIF
external storage capacitor
10
nF
2)
1) Typical supply voltages: 3.3 V or 5 V
2) Recommended
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