TLE 4267
Semiconductor Group
1
1998-11-01
Functional Description
TLE 4267 is a 5-V low-drop voltage regulator in a
TO220-7 package. It supplies an output current of > 400 mA. The IC is shortcircuit-proof
and incorporates temperature protection that disables the IC at overtemperature.
Application
The IC regulates an input voltage
V
I
in the range 5.5 V <
V
I
< 40 V to
V
Qrated
= 5.0 V. A
reset signal is generated for an output voltage
V
Q
of < 4.5 V. The reset delay can be set
with an external capacitor. The device has two logic inputs. It is turned-ON by a voltage
of > 4 V on E2 by the ignition for example. It remains active as a function of the voltage
on E6, even if the voltage on E2 goes Low. This makes it possible to implement a self-
holding circuit without external components. When the device is turned-OFF, the output
voltage drops to 0 V and current consumption tends towards 0
A.
Type
Ordering Code Package
TLE 4267
Q67000-A9153
P-TO220-7-3
TLE 4267 G Q67006-A9169
P-TO220-7-180 (SMD)
TLE 4267 S Q67000-A9246
P-TO220-7-230
5-V Low-Drop Voltage Regulator
Bipolar IC
Features
q
Output voltage tolerance
2 %
q
Low-drop voltage
q
Very low standby current consumption
q
Input voltage up to 40 V
q
Overvoltage protection up to 60 V (
400 ms)
q
Reset function down to 1 V output voltage
q
ESD protection up to 2000 V
q
Adjustable reset time
q
On/off logic
q
Overtemperature protection
q
Reverse polarity protection
q
Short-circuit proof
q
Wide temperature range
q
Suitable for use in automotive electronics
P-TO220-7-3
P-TO220-7-180
P-TO220-7-230
TLE 4267
TLE 4267
Semiconductor Group
2
1998-11-01
Design Notes for External Components
The input capacitor
C
I
is necessary for compensation line influences. The resonant
circuit consisting of lead inductance and input capacitance can be damped by a resistor
of approx. 1
in series with
C
I
. The output capacitor is necessary for the stability of the
regulating circuit. Stability is guaranteed at values of
22
F and an ESR of
3
within
the operating temperature range.
Circuit Description
The control amplifier compares a reference voltage, which is kept highly accurate by
resistance adjustment, to a voltage that is proportional to the output voltage and drives
the base of the series transistor via a buffer. Saturation control as a function of the load
current prevents any over-saturating of the power element.
A comparator in the reset-generator block compares a reference that is independent of
the input voltage to the scaled-down output voltage. If this reaches a value of 4.5 V, the
reset-delay capacitor is discharged and then the reset output is set Low. As the output
voltage increases again, the reset-delay capacitor is charged with constant current from
V
Q
= 4.5 V onwards. When the capacitor voltage reaches the upper switching threshold,
reset goes High again. The reset delay can be set within wide range by selection of the
external capacitor.
With the integrated turn-ON/turn-OFF logic it is simple to implement delayed turn-OFF
without external components.
Truth Table for Turn-ON/Turn-OFF Logic
Pin 2: (Inhibit, E2) Enable function, active High
Pin 6: (Hold, E6) Hold and release function, active Low
Pin 2
Pin 6
V
Q
Remarks
L
X
OFF
Initial state, pin 6 internally pulled up
H
X
ON
Regulator switched on via pin 2, by ignition for example
H
L
ON
Pin 6 clamped active to ground by controller while pin 2 is still
high
X
L
ON
Previous state remains, even ignition is shut off: self-holding
state
L
L
ON
Ignition shut off while regulator is in self-holding state
L
H
OFF
Regulator shut down by releasing of pin 6 while pin 2 remains
Low, final state. No active clamping required by external self-
holding circuit (
C) to keep regulator shut off.
TLE 4267
Semiconductor Group
3
1998-11-01
Pin Configuration
(top view)
Pin Definitions and Functions
Pin
Symbol
Function
1
I
Input; block to ground directly at the IC by a ceramic capacitor
2
E2
Inhibit; device is turned-ON by High signal on this pin; internal
pulldown resistor of 100 k
3
R
Reset Output; open-collector output internally connected to
the output via a resistor of 30 k
4
GND
Ground; connected to rear of chip
5
D
Reset Delay; connect with capacitor to GND for setting delay
6
E6
Hold; see truth table above for function; this input is connected
to output voltage across pullup resistor of 50 k
7
Q
5-V Output; block to GND with 22-
F capacitor, ESR < 3
AEP02123
E2
R
GND
D
Q
4
3
2
1
5
6
7
E6
AEP01481
E2
R
GND
D
Q
4
3
2
1
5 6 7
E6
P-TO220-7-3
P-TO220-7-230
7
6
5
1
2 3
4
AEP01724
E6
D
GND
R
E2
P-TO220-7-180
TLE 4267
Semiconductor Group
4
1998-11-01
Block Diagram
Absolute Maximum Ratings
T
J
= 40 to 150
C
Parameter
Symbol
Limit Values
Unit Notes
min.
max.
Input
Voltage
V
I
42
42
V
Voltage
V
I
60
V
t
400 ms
Current
I
I
Limited internally
Reset Output
Voltage
V
R
0.3
7
V
Current
I
R
Limited internally
Reset Delay
Voltage
V
d
0.3
42
V
AEB01482
Saturation
Control and
Protection Circuit
Turn-ON/Turn-OFF
Logic
Reset
Generator
Buffer
Control
Amplifier
Sensor
7
5
3
4
6
2
GND
Output
Reset
Delay
Reset
Output
put
In-
1
Temperature
Reference
Bandgap
Adjustment
5 V
E6 Hold
Inhibit
TLE 4267
Semiconductor Group
5
1998-11-01
Operating Range
Current
I
d
Output
Voltage
V
Q
0.3
7
V
Current
I
Q
Limited internally
Inhibit
Voltage
V
E2
42
42
V
Current
I
E2
5
5
mA
t
400 ms
Hold
Voltage
V
E6
0.3
7
V
Current
I
E6
mA
Limited internally
GND
Current
I
GND
0.5
A
Temperatures
Junction temperature
T
J
150
C
Storage temperature
T
stg
50
150
C
Parameter
Symbol
Limit Values
Unit Notes
min.
max.
Input voltage
V
I
5.5
40
V
see diagram
Junction temperature
T
J
40
150
C
Thermal Resistance
Junction ambient
R
thja
70
K/W
Junction-case
R
thjc
6
K/W
Junction-case
R
thjc
2
K/W
t
< 1 ms
Absolute Maximum Ratings (cont'd)
T
J
= 40 to 150
C
Parameter
Symbol
Limit Values
Unit Notes
min.
max.
TLE 4267
Semiconductor Group
6
1998-11-01
Characteristics
V
I
= 13.5 V; 40
C <
T
J
< 125
C;
V
E2
> 4 V (unless specified otherwise)
Parameter
Symbol
Limit Values
Unit Test Condition
min.
typ.
max.
Output voltage
V
Q
4.9
5
5.1
V
5 mA
I
Q
400 mA
6 V
V
I
26 V
Output voltage
V
Q
4.9
5
5.1
V
5 mA
I
Q
150 mA
6 V
V
I
40 V
Output-current limiting
I
Q
500
mA
T
J
= 25
C
Current consumption
I
q
=
I
I
I
Q
I
q
50
A
Regulator-OFF
Current consumption
I
q
=
I
I
I
Q
I
q
1.0
10
A
T
J
= 25
C
IC turned off
Current consumption
I
q
=
I
I
I
Q
I
q
1.3
4
mA
I
Q
= 5 mA
IC turned on
Current consumption
I
q
=
I
I
I
Q
I
q
60
mA
I
Q
= 400 mA
Current consumption
I
q
=
I
I
I
Q
I
q
80
mA
I
Q
= 400 mA
V
I
= 5 V
Drop voltage
V
Dr
0.3
0.6
V
I
Q
= 400 mA
1)
Load regulation
V
Q
50
mV
5 mA
I
Q
400 mA
Supply-voltage
regulation
V
Q
15
25
mV
V
I
= 6 to 36 V;
I
Q
= 5
mA
Supply-voltage rejection
SVR
54
dB
f
r
= 100 Hz;
V
r
= 0.5
V
pp
Longterm stability
V
Q
0
mV
1000 h
1) Drop voltage =
V
I
V
Q
(measured when the output voltage
V
Q
has dropped 100 mV from the
nominal value obtained at
V
I
= 13.5 V)
TLE 4267
Semiconductor Group
7
1998-11-01
Characteristics (cont'd)
Parameter
Symbol
Limit Values
Unit Test Condition
min.
typ.
max.
Reset Generator
Switching threshold
V
rt
4.2
4.5
4.8
V
Reset High level
4.5
V
R
ext
=
Saturation voltage
V
R
0.1
0.4
V
R
R
= 4.7 k
1)
1) The reset output is Low between
V
Q
= 1 V and
V
RT
Pullup
R
R
30
k
Saturation voltage
V
D,sat
50
100
mV
V
Q
<
V
RT
Charge current
I
d
8
15
25
A
V
D
= 1.5 V
Delay switching threshold
V
dt
2.6
3
3.3
V
Delay
t
d
20
ms
C
d
= 100 nF
Switching threshold
V
st
0.43
V
Delay
t
t
2
s
C
d
= 100 nF
Inhibit
Turn-ON voltage
V
E2
3
4
V
IC turned-ON
Turn-OFF voltage
V
E2
2
V
IC turned-OFF
Pulldown
R
E2
50
100
200
k
Hysteresis
V
E2
0.2
0.5
0.8
V
Input current
I
E2
35
100
A
V
IP2
= 4 V
Holding voltage
V
E6
30
35
40
%
Referred to
V
Q
Turn-OFF voltage
V
E6
60
70
80
%
Referred to
V
Q
Pullup
R
E6
20
50
100
k
Overvoltage Protection
Turn-OFF voltage
V
i,ov
42
44
46
V
Turn-ON hysteresis
V
i,ov
2
6
V
TLE 4267
Semiconductor Group
8
1998-11-01
Test Circuit
Application Circuit
AES01483
22 F
Q
R
V
E6
4.7 k
6
4
5
3
7
2
1
E2
1000 F
470 nF
V
E2
D
C
V
C
GND
d
V
R
Q
V
V
TLE 4267
AES01484
22 F
6
4
5
7
3
1
470 nF
2
E6 From C
100 nF
5 V Output
E2; eg
from Terminal 15
To MC
Input
Reset
4267
TLE
TLE 4267
Semiconductor Group
9
1998-11-01
Time Response
AET01985
t
d
t
t
t
t
<
Power
Reset
Shutdown
Thermal
Voltage Drop
at Input
Undervoltage
at Output
Secondary
Spike
Bounce
Load
Shutdown
on
sat
V
R,
ST
V
dT
V
V
d, sat
RT
V
OFF
E2,
V
ON
V
E2,
E
V
R
V
V
d
Q
V
i
V
TLE 4267
Semiconductor Group
10
1998-11-01
Enable and Hold Behaviour
AET01986
E2,
V
ON
V
E2, OFF
V
E2
V
i
V
RT
V
Q
d,
V
V
dT
V
ST
d
V
R,
V
V
R
t
d
V
E6
V
E6,
V
E6,
V
Q,
10 s
<
<1
10)
5)
1)
2)
4)
6)
8)
9)
3)
1) Enable active
Hold inactive, pulled up by
2)
Q
V
3) Power-ON reset
4) Hold active, clamped to
GND by external
5) Enable inactive, clamped by int.
pull-down resistor
6) Pulse width smaller than 1 s
7) Hold inactive, released by
8) Voltage controller shutdown
9) Output-low reset
10) No switch on via
V
E6
possible after E6
was released to
V
E6
>
V
E6, rel
for more
than 4
sat
sat
s
rel
hold
s
t
t
C
C
Semiconductor Group
11
1998-11-01
TLE 4267
Output Voltage
V
Q
versus
Temperature
T
j
Charge Current
I
d
versus
Temperature
T
j
Drop Voltage
V
Dr
versus
Output Current
I
Q
Delay Switching Threshold
V
dT
versus
Temperature
T
j
AED01486
-40
4.70
Q
T
V
=
5.10
V
4.80
4.90
5.00
13.5 V
C
0
40
80
160
V
j
AED01485
-40
d
T
V
= 13.5 V
C
0
40
80
160
A
V
C
= 0 V
10
12
14
16
18
22
d
j
AED01488
0
0
Q
C
T
125 C
= 25
=
T
100
200
300
400
500
mV
700
100
200
300
400
mA
600
Dr
V
j
j
AED01487
-40
0
dT
T
V
= 13.5 V
C
0
40
80
160
0.5
1.0
1.5
2.0
2.5
3.0
V
4.0
V
dT
V
j
Semiconductor Group
12
1998-11-01
TLE 4267
Current Consumption
I
q
versus
Output Current
I
Q
Output Current
I
Q
versus
Temperature
T
j
Current Consumption
I
q
versus
Input Voltage
V
I
Output Current
I
Q
versus
Input Voltage
V
I
AED01490
0
0
Q
10
20
30
40
50
mA
70
100
200
300
400
mA
600
q
V
= 13.5 V
AED01489
-40
Q
T
C
0
40
80
160
mA
100
200
300
400
500
700
0
13.5 V
=
V
j
AED01491
0
0
q
=
10
20
30
50
R
L
V
V
25
5
10
mA
15
0
0
AED01987
Q
V
V
i
mA
100
200
300
400
500
600
700
10
20
30
40
50
125 C
=
=
C
25
j
T
j
T
Semiconductor Group
13
1998-11-01
TLE 4267
Output Voltage
V
Q
versus
Inhibit Voltage
V
E2
Inhibit Current
I
E2
versus
Inhibit Voltage
V
E2
0
0
AED01988
V
Q
2
4
V
6
1
3
5
E2
V
1
2
3
4
5
6
V
0
0
AED01989
E2
V
V
E2
1
2
3
4
5
6
10
20
30
40
50
A
TLE 4267
Semiconductor Group
14
1998-11-01
Package Outlines
P-TO220-7-3
(Plastic Transistor Single Outline)
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book "Package Information"
Dimensions in mm
TLE 4267
Semiconductor Group
15
1998-11-01
P-TO220-7-180
(Plastic Transistor Single Outline)
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book "Package Information"
Dimensions in mm
SMD = Surface Mounted Device
TLE 4267
Semiconductor Group
16
1998-11-01
P-TO220-7-230
(Plastic Transistor Single Outline)
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book "Package Information"
Dimensions in mm
PDF 
ZIP