Semiconductor Group
1
05.95
w
= New type
The TDA 4817 contains all functions for designing electronic ballasts and switched-mode power
supplies with sinusoidal line current consumption and a power factor approaching 1.
The TDA 4817 controls a boost converter as an active harmonic filter in a discontinuous (triangular
shaped current) mode with variable frequency.
A typical application is in electronic ballasts, especially when a large number of such lamps are
concentrated on one line supply point.
The output voltage of this filter is regulated with high efficiency. Therefore the device can be easily
operated on different line voltages (110/220 V
AC
) without any switchover.
The TDA 4817 is an 8-pin-economy-version of the TDA 4814 A without reference voltage output
and start/stop monitoring circuit.
Type
Ordering Code
Package
TDA 4817
Q67000-A8298
P-DIP-8-1
TDA 4817 G
Q67000-A8299
P-DSO-8-1 (SMD)
Power Factor Controller
IC for High Power Factor and
Active Harmonic Filtering
Advance Information
Bipolar IC
TDA 4817
P-DIP-8-1
P-DSO-8-1
Features
q
IC for sinusoidal line-current consumption
q
Power factor approaching 1
q
Controls boost converter as an active harmonics filter
q
Direct drive of SIPMOS transistor
q
Zero crossing detector for discontinuous operation mode
with variable frequency
q
110/220 V AC operation without switchover
q
Standby current consumption of 0.5 mA
w
w
Semiconductor Group
2
Pin Configurations
(top view)
Pin Definitions and Functions
Pin
Symbol
Function
1
GND
Ground
2
QSIP
Driver output
3
V
S
Supply voltage
4
C
Comparator input
5
I
M1
Multiplier input
6
OP
Input
7
QOP/
I
M2
Operational-amplifier output QOP and multiplier input M2
8
I
Detector
Detector input
TDA 4817
TDA 4817 G
TDA 4817
Semiconductor Group
3
Block Diagram
TDA 4817
Semiconductor Group
4
Circuit Description
This device has a conditioning circuit for the internal power supply. It allows standby operation with
very low current consumption (less than 0.5 mA), a hysteresis between enable and switch-off levels
and an internal voltage stabilization. An integrated Z-diode limits the voltage on
V
S
, when impressed
current is fed.
The output driver (Q SIP) is controlled by detector input and current comparator.
The detector input (
I
DET) which is highly resistive in the operating state reacts on hysteresis-
determined voltage levels. To keep down the amount of circuitry required, clamping diodes are
provided which allow control by a current source.
The operating state of the boost converter choke is sensed via the detector input. H-level means
that the choke discharges and the output driver is inhibited. H-level sets a flip-flop, which stores the
switch-off instruction of the current comparator to reduce susceptibility to interference. As soon as
demagnetization is finished the choke voltage reverses and the detector input is set to L-level, thus
enabling the output driver. This ensures that the choke is always currentless when the SIPMOS
transistor switches on and that no current gaps appear.
The nominal voltage of the multiplier output is compared to the voltage derived from the actual line
current (
I
COMP), thus setting the switch-off threshold of the comparator. The current comparator
blocks the output driver when the nominal peak value of the choke current given by the multiplier
output is reached.
This state is maintained in the flip-flop until H-level appears at detector input which takes over the
hold function and resets the flip-flop.
Operating states might occur without any useful detector signal. This is the case with magnetic
saturation of the choke and when the input voltage approaches or exceeds the output voltage as,
for example, during switch-on. The driver remains inhibited for the flip-flop due to the absent set
signal.
The trigger signal can be derived from the subsequent lamp generator or a SMPS control device.
The trigger signal level should be so low that with standard operation the signal from the detector
winding dominates. The multiplier delivers the preset nominal value for the current comparator by
multiplying the input voltage (
I
M1), which determines the nominal waveform and the output voltage
of the control amplifier.
The control amplifier stabilizes the output dc voltage of the active harmonic filter in the event of load
and input voltage changes. The control amplifier compares the actual output voltage to a
reference voltage which is provided in the IC and stable with temperature.
Output Driver
The output driver is intended to drive a SIPMOS transistor directly.
It is designed as a push-pull stage.
Both the capacitive input impedance and keeping the gate level at zero potential in standby
operation by an internal 10-k
-resistor are taken into account. Possible effects on the output driver
by line inductances or capacitive couplings via SIPMOS transistor Miller capacitance are limited by
diodes connected to ground and supply voltage.
TDA 4817
Semiconductor Group
5
Absolute Maximum Ratings
Parameter
Symbol
Limit Values
Unit
Remarks
min.
typ.
max.
Supply voltage
V
S
0.3
V
Z
V
V
Z
= Z-voltage
Inputs
Comparator
Operational amplifier
Multiplier
V
C
V
OP
V
M1
0.3
0.3
0.3
20
20
20
V
V
V
Output OP
V
QOP
0.3
6
V
Z-current
V
S
-GND
I
Z
0
100
mA
Observe
P
max
Driver output QSIP
V
QSIP
0.3
V
S
V
QSIP clamping diodes
I
QSIP
10
10
mA
V
QSIP
>
V
S
or
V
QSIP
< 0.3 V
Detector input
V
Det
0.9
6
V
Detector clamping diodes
I
Det
10
10
mA
V
Det
> 6 V or
V
Det
< 0.9 V
Junction temperature
T
j
150
C
Storage temperature
T
stg
55
125
C
Thermal resistance
system-air
TDA 4817
TDA 4817 G
R
th SA
R
th SA
100
170
K/W
K/W
P-DIP-8 package
P-DSO-8 package
Operating Range
Supply voltage
V
S
V
Son
V
Z
V
1)
Z-current
I
Z
0
100
mA
Observe
P
max
Driver current
I
QSIP
500
500
mA
Observe
P
max
Ambient temperature
T
A
25
85
C
TDA 4817
Semiconductor Group
6
Characteristics
V
SON
<
V
S
<
V
Z
;
T
A
= 25 to 85 C
Parameter
Symbol
Limit Values
Unit
Test Condition
min.
typ.
max.
Current Consumption
Without load on driver
(QSIP) and
V
REF
; QSIP low
Load on QSIP with
SIPMOS gate;
dynamic operation
I
S
I
S
I
S
5
0.5
10
15
mA
mA
mA
0 V <
V
S
<
V
SON
V
SON
<
V
S
<
V
Z
V
S
= 12 V;
f
switch
= 50 kHz;
load QSIP = 10 nF
Hysteresis on
V
S
Turn-ON threshold for
V
S
rising
Switching hysteresis
V
SH
V
Shy
9.6
1.0
10.4
11.2
1.7
V
V
Comparator
Input offset voltage
Input current
Common-mode input
voltage
V
IO
I
I
V
ICM
10
0
10
2
3.5
mV
A
V
Operational Amplifier
Open-loop voltage gain
Input offset voltage
Input current
Common-mode input
voltage
Output current
Output voltage
Gain-bandwidth product
Transition phase
Voltage Feedback
Threshold
Temperature response
G
VO
V
IO
I
I
V
IC
I
Q
V
Q
f
r
T
V
FB
V
FB
/
T
60
10
0
3
1.2
1.96
0.3
80
2
120
2
10
2
3.5
1.5
4
2.04
0.3
dB
mV
A
V
mA
V
MHz
deg
V
mV/K
T
j
= 25 C
Pin 6 connected to
Pin 7
Output Driver
H-output voltage
L-output voltage
Output current rising edge
falling edge
V
QSIPH
V
QSIPL
I
QSIP
I
QSIP
5
200
250
300
350
1
400
450
V
V
mA
mA
I
QSIP
= 10 mA
I
QSIP
= 10 mA
C
L
= 10 nF
C
L
= 10 nF
TDA 4817
Semiconductor Group
7
1)
V
M1
=
1 V
V
M2
=
V
REF
+ 1 V
2) Step function on comparator input
V
Comp
from 100 mV to + 100 mV.
Z-Diode (
V
S
)
Z-voltage (observe
P
max
)
V
Z
13
15.5
17
V
I
Z
= 200 mA
Multiplier
Quadrant for input
voltages
Input voltage M1
Reference level for M1
Input voltage M2
Reference level for M2
Input current M1, M2
Max. output voltage
Multiplier gain
Multiplier gain
Temperature response
of coefficient
V
M1
V
REF M1
V
M2
V
REF M2
I
I
V
QM max
C
Q25
C
Q
TC
/
C
Q
0
V
REF
0
0.62
0.55
0.3
I.
0
V
REF
1.6
0.67
0.1
2
V
REF
+ 1
2
0.72
0.77
0.1
qu
V
V
V
V
A
V
V
1
V
1
%/K
T
j
= 25 C
1)
1)
Delay Times
Input comparator-QSIP
t
I
500
700
ns
2)
Detector
Upper switching voltage
for voltage rising (H)
Lower switching voltage
for voltage falling (L)
Input current
Clamping-diode
level
positive
negative
Switching hysteresis
V
DetH
V
DetL
I
Det
V
Det
+
V
Det
V
Dethy
1.0
0.95
50
1.3
6.9
0.6
1.6
10
300
V
V
A
V
mV
0.9 V <
V
Det
< 6 V
I
Det
= 3 mA
I
Det
= 3 mA
Calculation of output voltage
V
QM
:
V
QM
=
C
x
V
M1
x
V
M2
in V.
Characteristics (cont'd)
V
SON
<
V
S
<
V
Z
;
T
A
= 25 to 85 C
Parameter
Symbol
Limit Values
Unit
Test Condition
min.
typ.
max.
TDA 4817
Semiconductor Group
8
Multiplier Characteristics
TDA 4817
Semiconductor Group
9
Discontinuous Operation Mode with Variable Frequency
The TDA 4817 works in a discontinuous operation mode with variable frequency.
The principle of a freely oscillating controller exploits the physical relationship between current and
voltage at the boost converter choke. The current in the semiconductors flows in a triangular shape.
This is only when the current in the boost converter diode has gone to zero that the transistor goes
conductive. This arrangement does away with the diode's power-squandering reverse currents.
If triangular currents flow continuously through the boost converter choke the input current
averaged over a high-frequency period is exactly half the peak of the high-frequency choke current.
If the peak values of the choke current are located along an envelope curve that is proportional to
a sinusoidal low- frequency input voltage, the input current available after smoothing in an RFI filter
is sinusoidal.
TDA 4817
Semiconductor Group
10
Application Circuit: Electronic Ballast
TDA 4817
Semiconductor Group
11
The TDA 4817 controls a boost converter as an active harmonic filter, drawing a sinusoidal line
current and providing a regulated DC voltage at the converter output.
The active harmonic filter improves the power factor in electronic ballasts for fluorescent lamps and
in switched-mode power supplies, reducing the harmonic content of the incoming, non rectified
mains current and if suitably dimensioned permitting operation at input voltages between 90 V and
270 V.
Benefits of TDA 4817 in Electronic Ballasts and SMPS
q
Sinusoidal line current consumption
q
Power factor approaching 1 increases the power available from the AC line by more than 35 %
compared to conventional rectifier circuits. Circuit breakers and connectors become more
reliable because of the lower peak currents.
q
Active harmonic filtering reduces harmonic content in line current to meet VDE/IEC/EN-
standards.
q
Wide-range power supplies are easier to implement for AC input voltages of 90 to 250 V without
switch-over.
q
Preregulated DC output voltage provides optimal operating conditions for a subsequent
converter.
q
Reduced smoothing capacitance:
For a given amplitude of the 100/120 Hz ripple voltage the smoothing capacitance can be
reduced by 50 % in comparison to a conventional rectifier circuit.
Reduced choke size:
Rectifier circuits capable of more than 200 W usually employ chokes to decrease the charging
current ot the capacitor. These chokes are larger than those used in a preregulator with power-
factor control.
q
Higher efficiency:
A preregulator does cause some additional losses, but these are more than compensated for by
the cut in losses created by the rectifier configuration and the optimum operating conditions that
are produced for a subsequent converter, even in the event of supply-voltage fluctuations.
TDA 4817
Semiconductor Group
12
Summary of Effects of DC-Voltage Preregulation with Power-Factor Control
Parameter
Conventional
Power
Rectification
Power
Rectification with
Preregulator and
Power-Factor
Control
Mean DC supply voltage
280 V
340 V
Maximum DC supply voltage with line overvoltage
350 V
350 V
Minimurn DC supply voltage with line undervoltage
230 V
330 V
Relative reverse voltage of diodes with line overvoltage 1
0.7
Relative forward resistance of SIPMOS transistors with
sustained conducting-state power loss and line under-
voltage
1
2.06
Relative forward resistance of SIPMOS transistors with
sustained conducting-state power loss and rated supply
voltage
1
1.74
Relative input capacitance with sustained ripple voltage 1
0.3 to 0.5
Power factor
0.5 to 0.7
0.99
TDA 4817
PDF 
ZIP