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Электронный компонент: STAC9460

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Integrating Mixed-Signal Solutions
Copyright 2001 SigmaTel, Inc. All rights reserved.
All contents of this document are protected by copyright law and may not be reproduced without the express written consent of SigmaTel, Inc.
I
2
C is a registered trademark of Philips Semiconductor and requires a license for use of the I
2
C bus interface.
SigmaTel, the SigmaTel logo, and combinations thereof are trademarks of SigmaTel, Inc. Other product names used in this publication are
for identification purposes only and may be trademarks or registered trademarks of their respective companies. The contents of this docu-
ment are provided in connection with SigmaTel, Inc. products. SigmaTel, Inc. has made best efforts to ensure that the information contained
herein is accurate and reliable. However, SigmaTel, Inc. makes no warranties, express or implied, as to the accuracy or completeness of
the contents of this publication and is providing this publication "AS IS". SigmaTel, Inc. reserves the right to make changes to specifications
and product descriptions at any time without notice, and to discontinue or make changes to its products at any time without notice. SigmaTel,
Inc. does not assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential, or incidential damages.
PRELIMINARY DATA SHEET
STAC9460/62
Two and Six-Channel, 24-Bit, 192 kHz
Audio Codec
PRELIMINARY INFORMATION 8/24/01
2-9460-D1-1-0-0801
2
2-9460-D1-1-0-0801
STAC9460/62
Two and Six-Channel, 24-Bit, 192 kHz Audio Codec
P R E L I M I N A R Y I N F O R M A T I O N 8 / 2 4 / 0 1
1. TABLE OF CONTENTS
1. TABLE OF CONTENTS ............................................................................................................. 2
1.1. List of Figures ....................................................................................................................................3
1.2. List of Tables ......................................................................................................................................3
2. PRODUCT BRIEF ...................................................................................................................... 4
2.1. FEATURES ........................................................................................................................................4
2.2. Ordering Information ..........................................................................................................................5
2.3. Block Diagram ....................................................................................................................................5
2.4. Related Materials ...............................................................................................................................5
2.5. Additional Support ..............................................................................................................................5
3. CHARACTERISTICS AND SPECIFICATIONS ......................................................................... 6
3.1. Absolute Maximum Ratings ...............................................................................................................6
3.2. Recommended Operating Conditions ..............................................................................................6
3.3. Power Consumption .........................................................................................................................6
3.4. Static Digital Specifications ................................................................................................................6
3.5. STAC9460 Analog Performance Characteristics ...............................................................................7
4. TYPICAL CONNECTION DIAGRAM ......................................................................................... 8
5. SERIAL INTERFACE ................................................................................................................. 9
5.1. Clocking .............................................................................................................................................9
5.2. Reset ..................................................................................................................................................9
6. DIGITAL AUDIO INTERFACE ................................................................................................ 10
6.1. I2S Serial Interface ..........................................................................................................................10
6.2. Single Line Format ..........................................................................................................................11
6.3. I2C-Bus Interface .............................................................................................................................11
7. PROGRAMMABILITY .............................................................................................................. 13
7.1. List of Registers ...............................................................................................................................14
7.1.1. Reset/Status Register (00h) ...............................................................................................14
7.1.2. Status Register (01h) .........................................................................................................14
7.1.3. Master Volume Register (02h) ...........................................................................................14
7.1.4. LF/RF, LR/RR, Center/LFE Output Channel Volume Registers(03h-08h) .........................15
7.1.5. Microphone Input Volume Registers (09h-0Ah) .................................................................15
7.1.6. De-Emphasis Register (0Ch) .............................................................................................15
7.1.7. General Purpose Register (0Dh) ........................................................................................16
7.1.8. Audio Port Control (0Eh) ....................................................................................................16
7.1.9. Master Clocking Register (0Fh) .........................................................................................17
7.1.10. Powerdown Control Registers (10h-11h) .........................................................................18
7.1.11. Revision Code Register (12h) ..........................................................................................18
7.1.12. Address Control Register/Address Register (13h-14h) ....................................................18
8. PIN DESCRIPTION .................................................................................................................. 19
8.1. STAC9460 Pin and Signal Description ............................................................................................19
8.2. STAC9462 Pin and Signal Description ............................................................................................19
8.3. Digital I/O .........................................................................................................................................20
8.4. Analog I/O ........................................................................................................................................20
8.5. Filter/References ..............................................................................................................................20
8.6. Power and Ground Signals ..............................................................................................................21
9. PACKAGE DRAWING ............................................................................................................. 22
2-9460-D1-1-0-0801
3
STAC9460/62
Two and Six-Channel, 24-Bit, 192 kHz Audio Codec
P R E L I M I N A R Y I N F O R M A T I O N 8 / 2 4 / 0 1
1.1.
List of Figures
Figure 1. STAC9460 Block Diagram ................................................................................................................5
Figure 2. Typical Connection Diagram .............................................................................................................8
Figure 3. Serial interface to microcontroller or microprocessor ........................................................................9
Figure 4. I
2
S Format .......................................................................................................................................10
Figure 5. I
2
S Left Justified Format .................................................................................................................10
Figure 6. I
2
S Right Justified Format ...............................................................................................................10
Figure 7. Single Line Data Mode Timing Diagram .........................................................................................11
Figure 8. I
2
C Timing Diagram .........................................................................................................................11
Figure 9. STAC9460 Pin Designation ...........................................................................................................19
Figure 10. STAC9462 Pin Designation ..........................................................................................................19
Figure 11. Package Outline ............................................................................................................................22
1.2.
List of Tables
Table 1. Digital Audio Interface Configuration ................................................................................................10
Table 2. Single Line Data Mode, Data Valid on Rising Edge of SCLK ...........................................................11
Table 3. I
2
C Mode Specifications ...................................................................................................................12
Table 4. Programming Registers ....................................................................................................................13
Table 5. Reset/Status Register ......................................................................................................................14
Table 6. Master Volume Register ...................................................................................................................14
Table 7. DAC Digital Volume Registers .........................................................................................................15
Table 8. Left and Right Mic Input Volume Registers ......................................................................................15
Table 9. On/Off De-emphasis Selection for Each Channel ............................................................................15
Table 10. De-emphasis Filter Selection .........................................................................................................15
Table 11. MSB Microphone/Differential Input Selection .................................................................................16
Table 12. Bit D6 ADC High Pass Filter Disable ..............................................................................................16
Table 13. Bit D5 Microphone DifferentialMux By-Pass Control ......................................................................16
Table 14. Audio Data Format Selection .........................................................................................................16
Table 15. Sample Rate Mode ........................................................................................................................17
Table 16. MCLK Mode ...................................................................................................................................17
Table 17. Powerdown Control ........................................................................................................................18
Table 18. Digital Signal List ............................................................................................................................20
Table 19. Analog Signal List ..........................................................................................................................20
Table 20. Filtering and Voltage References ...................................................................................................20
Table 21. Power Signal List ...........................................................................................................................21
4
2-9460-D1-1-0-0801
STAC9460/62
Two and Six-Channel, 24-Bit, 192 kHz Audio Codec
P R E L I M I N A R Y I N F O R M A T I O N 8 / 2 4 / 0 1
2. PRODUCT BRIEF
SigmaTel's STAC9460/62 are six and two-channel general-purpose 24-bit, full
duplex, audio codecs for use in consumer applications. The STAC9460/62 incorpo-
rate SigmaTel's proprietary Sigma-Delta technology to achieve ADC and DAC SNRs
in excess of 100 dB. The DACs, and ADCs are integrated with analog I/Os, which
include two differential analog and two MIC inputs. There are three audio I
2
S inputs
and an I
2
S digital output. The STAC9460/62 communicates via a standard two-wire
serial interface providing simplicity in the audio system design. Packaged in a 28-
pin SSOP, the STAC9460 and STAC9462 require minimal PCB space for implemen-
tation.
The STAC9460 provides variable sample rate D-A and A-D conversion, as well as
analog processing. Supported DAC audio sample rates include 32 kHz, 44.1 kHz,
48 kHz, 88.2 kHz, 96 kHz, 176.4 kHz and 192 kHz. Supported ADC audio sample
rates inclued 32 kHz, 44.1 kHz, 48 kHz, 88.2 kHz,and 96 kHz. The digital data inter-
face communicates via a standard I
2
C
compatible serial control interface and I
2
S
digital audio interface. The stereo sample rate ADC's provide record capability from
the microphone inputs or the differential inputs. All DAC's operate at 24-bit resolu-
tion with the sample rate based on the MCLK and programmable registers. The
ADCs operate at 24-bit resolution and supply full 24-bit filter data.
The STAC9460 supports three I
2
S digital audio inputs and an I
2
S digital audio out-
put. These digital I/O options provide for a number of advanced architectural imple-
mentations, with volume controls and mute capabilities built directly into the codec
for each individual channel. The output volume ranges from 0 dB to -95 dB with
.75 dB steps. For MIC input, the input volume ranges from 0 dB to 22.5 dB with
1.5 dB steps. The STAC9460 also supports a single-line format.
The STAC9460 is designed primarily to support 6-channel audio. True AC-3 play-
back can be achieved for 6-speaker applications by taking advantage of the
STAC9460 architecture and combining it with the appropriate processing. This
product is ideal for home theatre, DVD, karaoke, and set-top-box applications.
2.1.
FEATURES
High performance
technology
Two or six channels with independent volume controls
24-bit full duplex stereo DACs
24-bit full duplex stereo ADC
32, 44.1, 48, 88.2, 96, 176.4 and 192 kHz DAC sample rates
32, 44.1, 48, 88.2 and 96 kHz ADC sample rates
Standard I
2
C
compatible and I
2
S serial interfaces
Digital de-emphasis capability
DAC and ADC SNR >100 dB
Differential Stereo Analog Input
Dual mic inputs with independent volume controls
28-pin SSOP package
Energy saving dynamic power modes
5V Analog with 3.3V or 5V Digital capability
2-9460-D1-1-0-0801
5
STAC9460/62
Two and Six-Channel, 24-Bit, 192 kHz Audio Codec
P R E L I M I N A R Y I N F O R M A T I O N 8 / 2 4 / 0 1
2.2.
Ordering Information
Note: SigmaTel reserves the right to change specifications without notice.
2.3.
Block Diagram
2.4.
Related Materials
Product Brief
Evaluation Boards
Reference Designs
2.5.
Additional Support
Additional product and company information can be obtained by going to the
SigmaTel website at:
www.sigmatel.com
PART NUMBER
CHANNELS
PACKAGE
TEMPERATURE RANGE
SUPPLY RANGE
STAC9460S
6 DAC; 2 ADC
28-pin SSOP
0
o
C to +70 C
AVdd = 5V, DVdd = 3.3V or 5V
STAC9462S
2 DAC; 2 ADC
28-pin SSOP
0
o
C to +70 C
AVdd = 5V, DVdd = 3.3V or 5V
STEECBAC9460B (Evaluation Board): please send email request to apps@sigmatel.com
Figure 1. STAC9460 Block Diagram
I
2
C
Port
DSP
ADC
ADC
MUX
I
2
S
Port
DAC
DAC
DAC
DAC
DAC
DAC
SDATA_OUT
MIC_R
D_LRCLK
D_SCLK
SDI3
SDI2
SDI1
DIFF_R
DIFF_GND
DIFF_L
MIC_L
SDATA
SCLK
DAC_RF
DAC_LF
DAC_LR
DAC_RR
DAC_CTR
DAC_BASS
RESET
CS
MCLK
CAP
DVdd
DVss
VREF
AVdd AVss
VOLUME
VOLUME
VOLUME
VOLUME
VOLUME
VOLUME
VOLUME
VOLUME