ChipFind - документация

Электронный компонент: S2100

Скачать:  PDF   ZIP

Document Outline

Contents
Features........................................................... 1
Applications...................................................... 1
Pin Assignment ................................................ 1
Block Diagram.................................................. 1
Terminal Description ........................................ 2
Mode Table ...................................................... 2
Absolute Maximum Ratings ............................. 2
Recommended Operating Conditions.............. 2
DC Electrical Characteristics ........................... 3
AC Electrical Characteristics............................ 3
Read Mode Operation...................................... 4
Counter Hold Mode Operation ......................... 4
Program Mode Operation ................................ 5
Input Priority ..................................................... 6
Notes................................................................ 6
Dimensions ...................................................... 7
Characteristics ................................................. 8
Seiko Instruments Inc.
1
64-bit FUSE ROM
S-2100R
The S-2100R is a CMOS 64-bit serial FUSE ROM. It has a low standby
current (0.3
m
A max., V
DD
=1.5 V) and has a wide operating voltage
range. Data can be read serially by clock pulses from address 1 to
address 64. All the addresses are initialized at "H" so writing into "L"
can be done only once.
n
n
n
n
Block Diagram
CE/PE
8-pin SOP
Top view
8-pin DIP
Top view
Figure 1
n
n
n
n
Features
Low standby current (0.3
m
A max., V
DD
=1.5 V)
Wide operating voltage range
n
n
n
n
Applications
Pager ID ROM
Cordless telephone
Security equipment
n
n
n
n
Pin Assignment
COUNTER
OUT
8
7
6
5
4
3
2
5
6
7
8
4
1
2
3
1
V
DD
RST
CLK
PD/V
PP
DATA
V
SS
DATA
CE/PE
COUNTER
OUT
V
SS
V
DD
RS
CL
PD/V
PP
Figure 2
DE
V
PP
VPI
A1
A0
A2
A3
A4
A5
DOUT
DIN
VP
RS
CL
COUT
...
PD/V
PP
COUNTER
OUT
^
V
DD
,,
V
SS
,
READ /
WRITE
CONTROL
6-BIT
COUNTER
64-BIT
FUSE ROM
MEMORY
CELL
MATRIX
SENSE
AMP.
COLUMN
DECODER
DATA
CONTROL
V
PP
CONTROL
CLK
RST
CE/PE
DATA
ROW
DECODER
64-bit FUSE ROM
S-2100R
2
Seiko Instruments Inc.
n
n
n
n
Terminal Description
n
n
n
n
Mode Table
n
n
n
n
Absolute Maximum Ratings
n
n
n
n
Recommended Operating Conditions
Pin No.
Symbol
Pin Name
Description
1
DATA
Data input/output terminal
Tri-state data input/output terminal
2
CE/PE
Mode select terminal
Mode select terminal
(Refer to operation mode table)
3
COUNTER
OUT
Counter output terminal
6-bit counter; 64th bit detection output terminal
4
V
SS
Negative power supply terminal
Normally, connected to GND.
5
P
D
/V
PP
Program voltage input terminal
Input terminal of writing voltage to FUSE memory at 21 V.
(Refer to operation mode table.) Pull-down resistor built
in.
6
CLK
Clock input terminal
Clock input terminal of 6-bit counter. Operates at the
falling edge.
7
RST
Reset input terminal
Reset input terminal of 6-bit counter. Operates at "L".
8
V
DD
Positive power supply terminal
Normally, connected to +1.1 to +5.5 V.
Terminal
Read
CE/PE
P
D
/V
PP
CLK
RST
DATA
Read
V
SS
V
SS
Input possible
Input possible
Data output
Counter hold
V
DD
V
SS
Input impossible
Input impossible
High impedance
Program
V
DD
V
PP
Input impossible
Input impossible
Data input
Parameter
Symbol
Ratings
Unit
Power supply voltage
V
DD
-0.3 to +6.5
V
P
D
/V
PP
input voltage
V
PP
-0.3 to 26
V
Input voltage
V
IN
V
SS
-0.3 to V
DD
+0.3
V
Output voltage
V
OUT
V
SS
-0.3 to V
DD
+0.3
V
Storage temperature
under bias
V
bias
-30 to +85
C
Storage temperature
V
stg
-40 to +125
C
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
Ta=25
C, Read, t
CH
=15
m
s
1.1
1.5
5.5
V
Power supply voltage
V
DD
Ta=25
C, Write
4.5
5.0
5.5
V
Ta=25
C, Read
V
DD
-0.3
V
DD
V
High level input voltage
V
IH
Ta=25
C, Write
V
DD
-0.3
V
DD
V
Ta=25
C, Read
-0.3
0.3
V
Low level input voltage
V
IL
Ta=25
C, Write
-0.3
0.5
V
Operating temperature
V
opr
-20
70
C
Table 1
Table 2
Table 3
Table 4
64-bit FUSE ROM
S-2100R
Seiko Instruments Inc.
3
n
n
n
n
DC Electrical Characteristics
n
n
n
n
AC Electrical Characteristics
1. Read mode
2. Write mode
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
Operating current
consumption
I
DDO
V
DD
=1.5 V, f
CLK
=50 kHz
20
m
A
Standby current
consumption
I
DDS
V
DD
=1.5 V, RST=V
DD
CLK=V
DD
, CE/PE=V
SS
0.3
m
A
P
D
/V
PP
input voltage
V
PP
20
21
22
V
P
D
/V
PP
input current
I
PP
150
mA
I
OH
V
DD
=1.1 to 5.5 V, V
OH
=V
DD
-0.3 V
-300
m
A
Output current
I
OL
V
DD
=1.1 to 5.5 V, V
OH
=0.3 V
300
m
A
Pull-down resistance
R
D
V
DD
=1.5 V
0.1
0.2
0.4
M
W
Parameter
Symbol
Min.
Typ.
Max.
Unit
RST hold time
t
RH
5.0
m
s
Read cycle time
t
RC
2.0
m
s
CLK hold time
t
CH
5.0
m
s
Access time
t
ACC
5.0
m
s
CE/PE setup time
t
CES
2.0
m
s
RST setup time
t
RS
5.0
m
s
CLK setup time
t
CS
5.0
m
s
CE access time
t
CE
5.0
m
s
Output disable time
t
WZ
500
ns
CLK and RST inhibit time
t
CRI
500
ns
Parameter
Symbol
Min.
Typ.
Max.
Unit
CE-data setup time
t
CDS
0.5
m
s
Data setup time
t
DS
0.5
m
s
Data hold time
t
DH
0
m
s
CE-data hold time
t
CDH
2.0
m
s
V
PP
rise time
t
r
20
m
s
Program pulse width
t
PW
8.0
ms
V
PP
rise slope
D
V
PP
4
V/
m
s
Table 5
Table 6
(Ta=25
C, V
DD
=1.5 V)
Load : 60 pF
Table 7
(Ta=25
C, V
DD
=5.0 V, V
PP
=21 V)
64-bit FUSE ROM
S-2100R
4
Seiko Instruments Inc.
Read Mode Operation
Counter Hold Mode Operation
By setting the CE/PE terminal to
"
L
"
level, the S-2100R enters the read mode. *
1
Next, adding an RST pulse causes the
contents of the memory bit of address 1 to be output at the DATA terminal; the rising of the RST pulse latches the data and
stabilizes it. *
2
Reading of addresses from 2 to 64 can be done by adding a CLK pulse sequentially after reading address 1. *
3
As soon as address 64 has been read, the COUNTER OUT terminal outputs
"
H
"
level. When it finishes reading address 64, it
does not accept any more CLK pulses and the counter does not operate. The data of address 64 is maintained till address 1 is
read by the RST pulse.
Figure 3 Read mode timing
Address 1 output
Address 3 output
Address 2 output
t
CES
t
ACC
t
CE
t
RC
t
ACC
t
CH
t
RC
t
RH
CE/PE
RST
CLK
DATA
Address 1 output
t
RS
t
RC
*1
When both the CLK and RST terminals are at
"
H
"
level.
*2
When the RST terminal is at
"
L
"
level, the latch is transparent and the data is recognized by the rising of the RST pulse.
*3
Data read by the CLK pulse is latched at its rising.
By setting the CE/PE terminal to
"
H
"
level, the S-2100R enters the counter hold mode and the DATA terminal becomes high
impedance. *
4
In counter hold mode, the CLK and RST pulses which fall while the CE/PE terminal is at
"
H
"
level are recognized to be invalid
and there is no change in counter and data output. When the CE/PE terminal is set to
"
L
"
level again, it returns to the
condition in which it was before the counter hold mode.
Address M
output
Address M+1 output
Address M+1 output
t
CES
t
CRI
CE/PE
RST
CLK
DATA
t
WZ
t
CS
Figure 4 Counter hold mode timing
*
4
When both the CLK and RST terminals are at
"
H
"
level.
64-bit FUSE ROM
S-2100R
Seiko Instruments Inc.
5
n
n
n
n
Program Mode Operation
By setting the CE/PE terminal to "H" level, the S-2100R enters the counter hold mode and at the same time enters the program
mode. *
5
Writing is done in program mode after selecting the address in read mode. *
6
Select the address, and supply "H" level to the
CE/PE terminal and "L" level to the DATA terminal, with the writing pulse V
PP
being supplied to the P
D
/V
PP
terminal. "L" level can
be written into the selected address only once. *
7
*
8
If you coutinue writing from address 1 to 64, the output of the COUNTER OUT terminal goes to "H" level, just like in the read mode,
and no more CLK pulses or writing pulses in program mode can be accepted.
Figure 5 Program mode timing
Address 2
output
Address 1
output
Address 1
output
Data input
Data input
t
PW
t
CDH
CE/P
DATA
RS
PD/V
PP
CL
t
CDS
t
DH
t
DS
*
5
In program mode, operate at VDD=5.0 V to assure reliability of the data writing.
*
6
The selection of addresses is possible only in read mode. Address 1 is selected by RST pulses and writing proceeds
sequentially from address 1 by CLK pulse.
*
7
All the memories are initially at "H" level, so writing into "L" can be done. When data is at "H" level, writing voltage cannot
be supplied to the memory.
*
8
Address 1 is selected again by the RST pulse. The addresses which are not written to "L" level are at "H" level, so writing
"L" level in these addresses is possible.
64-bit FUSE ROM
S-2100R
6
Seiko Instruments Inc.
n
n
n
n
Input Priority
In read mode, priority is given to either the CLK or RST terminal, whichever is entered first. Whichever pulse is input earlier is
recognized to be valid from the rising till the end of the operation. If the pulse input later is at "L" level, the signal is ignored, even
though the effective pulse input earlier rises. *
9
If the CLK and RST pulses are input, the mode shifts from read mode to counter hold mode when both the CLK and the RST
terminals go to "H" level. *
10
If the CLK and RST pulses which are input in the counter hold mode are still at "L" level after setting the CE/PE terminal to "L" level,
these CLK and RST terminals are ignored. The mode shifts to read mode and data which is held before the shift is output at the
DATA terminal. *
11
In program mode, inputting the DATA terminal before the CE/PE terminal goes to "H" level is prohibited. Also, charging the
writing voltage from the P
D
/V
PP
terminal is prohibited when the CE/PE terminal is at "L" level. In program mode, input to the DATA
terminal muse be decided before charging the writing voltage. *
12
*
9
Input of the CLK and RST pulses is not recognized as valid unless both pulses are input at "H" level.
*
10
The counter hold mode is entered when reading of the CLK and RST pulses has been finished and DATA output has been
stabilized .
*
11
No more CLK or RST pulses are accepted unless both the CLK and RST terminals are at "H" level.
*
12
If data input is changed while writing voltage is supplied, the S-2100R does not accept the changed data.
n
n
n
n
Notes
Memory should not be accessed for at least 10
m
s after voltage is supplied and goes to V
DD
.
64-bit FUSE ROM
S-2100R
Seiko Instruments Inc.
7
n
n
n
n
Dimensions
1. 8-pin DIP
2. 8-pin SOP
Figure 6
1.5
1.0
0.51 min.
4
5
8
6.4
8.8 (9.2 max.)
1
0.46
0.15
2.54
0.25
0.15
4.5 max.
2.69 min.
3.4
0.25
7.62
0
~
15
Unit:mm
Figure 7
Unit: mm
1.27
5.0 (5.15 max.)
5
8
1
4
5.0
0 min.
0.35
+0.1
-0.05
1.6
0.15
2.15 max.
0.15
+0.1
-0.05
6.8
0.4
0.55
64-bit FUSE ROM
S-2100R
8
Seiko Instruments Inc.
n
n
n
n
Characteristics
1.0
0
V
DD
=
6.0V
4.0V
2.0V
1.0V
-40
10
0
10
1
10
2
10
3
10
4
-10
20
50
80
Ta (
C)
I
DDS
(nA)
1.
Standby current consumption I
DDS
-
Ambient temperature Ta
2
4
6
1.5
2.0
V
DD
(V)
t
ACC
(
m
s)
8
-40
C
-10
C
20
C
50
C
80
C
2
0
0.1
3
V
DD
(V)
0.2
0.3
0.4
0.5
0.6
0.7
4
5
6
80
C
50
C
20
C
-10
C
-40
C
2
. Access time t
ACC
-
Power supply voltage V
DD
3.
Access time t
ACC
-
Power supply voltage V
DD
t
ACC
(
m
s)