1
The S-29ZX30A series are low power 4K/8K-bit E
2
PROM with a low
operating voltage range. They are organized as 256-word
16-bit
and 512-word
16bit, respectively. Each is capable of sequential
read, at which time addresses are automatically incremented in 16-
bit blocks. The instruction code is compatible with the NM93CSXX
series.
n
Pin Assignment
n
Pin Functions
Table 1
Name
Pin Number
Function
SOP2 SSOP
CS
1
1
Chip select input
SK
2
2
Serial clock input
DI
3
3
Serial data input
DO
4
4
Serial data output
GND
5
5
Ground
TEST
6
6
Test pin (normally kept open)
(can be connected to GND or Vcc)
NC
7
7
No Connection
V
CC
8
8
Power supply
n
Features
Low power consumption
Standby
: 2.0
A Max.
(VCC=3.6 V)
Operating : 0.6 mA Max. (VCC=3.6 V)
: 0.4 mA Max. (VCC=2.7 V)
Wide operating voltage range
Write
: 0.9 to 3.6 V
Read
: 0.9 to 3.6 V
Sequential read capable
Endurance : 10
5
cycles/word
Data retention : 10 years
S-29Z330A : 4K bits NM93CS66 instruction code compatible
S-29Z430A : 8K bits NM93CSXX series compatible
Figure 1
8-pin SOP2
Top view
CS
SK
V
CC
TEST
GND
DI
DO
6
5
8
7
3
4
1
2
NC
S-29Z330ADFJA
S-29Z430ADFJA
8-pin SSOP
Top view
1
2
3
4
8
7
6
5
CS
SK
DI
DO
V
CC
NC
TEST
GND
S-29Z330AFS
* See
n
Dimensions
CMOS SERIAL E
2
PROM
S-29ZX30A
AA
Rev.1.1
CMOS SERIAL E
2
PROM
S-29ZX30A
2
n
Block Diagram
n
Instruction Set
Table 2
Instruction
Start
Bit
Opo
Code
Address
Data
S-29Z330A S-29Z430A
READ (Read data)
1
10
A
7
to A
0
xA
8
to A
0
D
15
to D
0
Output*
WRITE (Write data)
1
01
A
7
to A
0
xA
8
to A
0
D
15
to D
0
Input
ERASE (Erase data)
1
11
A
7
to A
0
xA
8
to A
0
EWEN (Program enable)
1
00
11xxxxxx
11xxxxxxxx
EWDS (Program disable)
1
00
00xxxxxx
00xxxxxxxx
x : Doesn't matter.
* : Addresses are continuously incremented.
n
Absolute Maximum Ratings
Parameter
Symbol
Ratings
Unit
Power supply voltage
V
CC
-0.3 to +7.0
V
Input voltage
V
IN
-0.3 to V
CC
+0.3
V
Output voltage
V
OUT
-0.3 to V
CC
V
Storage temperature under bias
T
bias
-50 to +95
C
Storage temperature
T
stg
-65 to +150
C
Figure 2
Memory array
Data register
Address
decoder
Mode decode logic
Clock generator
Output buffer
V
CC
GND
DO
DI
CS
SK
Table 3
CMOS SERIAL E
2
PROM
S-29ZX30A
3
n
Recommended Operating Conditions
Table
4
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
Power supply voltage
V
CC
READ/WRITE/ERASE
EWEN/EWDS
0.9
--
3.6
V
VCC= 1.8 to 3.6 V
0.8
Vcc
--
Vcc
V
V
CC
= 0.9 to 1.8 V
0.9
Vcc
--
Vcc
V
VCC= 1.8 to 3.6 V
0.0
--
0.2
Vcc
V
V
CC
= 0.9 to 1.8 V
0.0
--
0.1
Vcc
V
Operating temperature
T
op
- 40
--
+ 85
C
n
Pin Capacitance
Table 5
(Ta=25
C, f=1.0 MHz, V
CC
=5 V)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
Input Capacitance
C
IN
V
IN
=0 V
8
pF
Output Capacitance
C
OUT
V
OUT
=0 V
10
pF
n
Endurance
Table 6
Parameter
Symbol
Min.
Typ.
Max.
Unit
Endurance
N
W
10
5
cycles/word
High level input voltage
Low level input voltage
V
IH
V
IL
CMOS SERIAL E
2
PROM
S-29ZX30A
4
n
DC Electrical Characteristics
Parameter
Smbl
Conditions
V
CC
=2.7 V to 3.6
V
V
CC
=1.8 V to 2.7
V
VCC=0.9 to 1.8 V
Unit
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Current
consumption
(READ)
I
CC1
DO unloaded
0.6
0.4
0.2
mA
Current
consumption
(PROGRAM)
I
CC2
DO unloaded
5.0
5.0
5.0
mA
Parameter
Smbl
Conditions
V
CC
=2.7 V to 3.6 V
V
CC
=1.8 to 2.7 V
V
CC
=0.9 to 1.8 V
Unit
Min.
Typ. Max.
Min.
Typ. Max.
Min.
Typ. Max.
I
SB
CS=GND DO=Open
Connected to V
CC
or GND
Topr=-10
+70
C
1.0
1.0
1.0
A
CS=GND DO=Open
Connected to V
CC
or GND
Topr=-40
+85
C
2.0
2.0
2.0
A
Input leakage
current
I
LI
V
IN
=GND to V
CC
0.1
1.0
0.1
1.0
0.1
1.0
A
Output leakage
current
I
LO
V
OUT
=GND to V
CC
0.1
1.0
0.1
1.0
0.1
1.0
A
I
OL
= 100
A
0.1
0.1
V
V
OL
I
OL
= 30
A
0.1
0.1
V
I
OL
= 10
A
0.1
0.1
0.2
V
I
OH
= -100
A
V
CC
-0.7
V
V
OH
I
OH
= -10
A
V
CC
-
0.7
V
CC
-
0.3
V
I
OH
= -5
A
V
CC
-
0.7
V
CC
-
0.3
V
CC
-
0.2
V
Write enable latch
data hold voltage
V
DH
Only when write disable
mode
0.8
0.8
0.8
V
Table
7
Table
8
Standby current
consumption
Low level output
voltage
High level output
voltage
CMOS SERIAL E
2
PROM
S-29ZX30A
5
n
AC Electrical Characteristics
Table 9
Input pulse voltage
0.1
V
CC
to 0.9
V
CC
Output reference voltage
0.5
V
CC
Output load
100pF
Table 10
Parameter
Symble
Conditions
V
CC
=2.7 to 3.6V
V
CC
=1.8 to 2.7 V
V
CC
=0.9 to 1.8V
Unit
Min.
Typ. Max. Min. Typ. Max. Min.
Typ. Max.
CS setup time
t
CSS
0.4
1.0
10
s
CS hold time
t
CSH
0.4
1.0
10
s
CS deselect time
t
CDS
0.2
0.4
4
s
Data setup time
t
DS
0.4
0.8
8
s
Data hold time
t
DH
0.4
0.8
8
s
Topr=-10 to +70
C
1.0
2.0
50
s
Topr=-40 to +85
C
1.0
2.0
100
s
Topr=-10 to +70
C
0
500
0
250
10
KHz
Topr=-40 to +85
C
0
500
0
250
5
KHz
Topr=-10 to +70
C
1.0
2.0
50
s
Topr=-40 to +85
C
1.0
2.0
100
s
Output disable time
t
HZ1
,
t
HZ2
0
0.5
0
1.0
0
50
s
Output enable time
t
SV
0
0.5
0
1.0
0
50
s
Programming time
t
PR
4.0
10.0
4.0
10.0
10.0
ms
Figure 3 Read Timing
t
SKH
t
CDS
t
CSS
CS
Valid data
Valid data
DI
t
SKL
SK
t
SV
t
HZ2
t
CSH
t
HZ1
t
PD
t
PD
t
DS
t
DH
t
DS
t
DH
Hi-Z
Hi-Z
Hi-Z
DO
DO
(READ)
(VERIFY)
Hi-Z
Output delay
Clock pulse width
Clock frequency
t
PD
f
SK
t
SKH,
t
SKL
CMOS SERIAL E
2
PROM
S-29ZX30A
6
n
Operation
Instructions (in the order of start-bit, instruction, address, and data) are latched to DI in synchronization with the rising
edge of SK after CS goes high. A start-bit can only be recognized when the high of DI is latched to the rising edge of SK
when CS goes from low to high, it is impossible for it to be recognized as long as DI is low, even if there are SK pulses
after CS goes high. Any SK pulses input while DI is low are called "dummy clocks." Dummy clocks can be used to
adjust the number of clock cycles needed by the serial IC to match those sent out by the CPU. Instruction input finishes
when CS goes low, where it must be between commands during t
CDS
.
All input, including DI and SK signals, is ignored while CS is low, which is stand-by mode.
1. Read
The READ instruction reads data from a specified address. After A0 is latched at the rising edge of SK, DO output
changes from a high-impedance state (Hi-Z) to low level output. Data is continuously output in synchronization with the
rise of SK.
When all of the data (D15 to D0) in the specified address has been read, the data in the next address can be read
with the input of another SK clock. Thus, it is possible for all of the data addresses to be read through the continuous
input of SK clocks as long as CS is high.
The last address (An
zzz
A1 A0 = 1
zzz
11) rolls over to the top address (An
zzz
A1 A0 = 0
zzz
00).
Figure 5
Read Timing (S-29Z430A)
Figure 4
Read Timing (S-29Z330A)
A
0
A
6
12
45
29
14
D
15
D
15
D
14
D
14
D
13
D
14
Hi
-
Z
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
+1
D
13
D
0
D
1
D
2
D
15
0
Hi-Z
A
1
A
2
A
3
A
4
A
5
A
7
0
1
1
28
27
26
25
24
11
10
9
8
7
6
5
4
3
2
1
44
43
42
41
40
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
+2
D
13
D
0
D
1
D
2
13
CS
SK
DI
DO
32
A
2
A
8
49
D
15
D
15
D
14
D
14
D
13
D
14
Hi
-
Z
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
+1
D
13
D
0
D
1
D
2
D
15
0
Hi-Z
A
3
A
4
A
5
A
6
A
7
X
0
1
1
10
9
8
7
6
5
4
3
2
1
48
46
45
44
43
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
+2
D
13
D
0
D
1
D
2
CS
SK
DI
DO
A
0
A
1
12
11
14
16
13
15
17
31
30
29
28
27
CMOS SERIAL E
2
PROM
S-29ZX30A
7
2.1 WRITE
This instruction writes 16-bit data to a specified address.
After changing CS to high, input a start-bit, op-code (WRITE), address, and 16-bit data. If there is a data overflow of more
than 16 bits, only the last 16-bits of the data is considered valid. Changing CS to low will start the WRITE operation. It is
not necessary to make the data "1" before initiating the WRITE operation.
Figure 6
WRITE Timing (S-29Z330A)
t
CDS
t
PR
busy
Hi-Z
t
SV
VERIFY
Standby
Hi-Z
1
CS
SK
DI
DO
t
HZ1
2
3
4
5
6
7
8
9
10
11
12
27
0
1
D0
ready
A7
A6
A5
A4
A3
A2
A1
A0
D15
Figure 7
WRITE Timing (S-29Z430A)
t
CDS
t
PR
busy
Hi-Z
t
SV
VERIFY
Hi-Z
1
CS
SK
DI
DO
t
HZ1
2
3
4
5
6
7
8
9
10
14
29
0
1
D0
ready
A3
A2
A1
A0
D15
2. Write (WRITE, ERASE)
There are two write instructions, WRITE and ERASE. Each automatically begins writing to the non-volatile memory
when CS goes low at the completion of the specified clock input.
The write operation is completed in 10 ms (t
PR
Max.), and the typical write period is less than 4 ms. In the S-
29ZX30A series, it is easy to VERIFY the completion of the write operation in order to minimize the write cycle by setting
CS to high and checking the DO pin, which is low during the write operation and high after its completion. This VERIFY
procedure can be executed over and over again. There are two methods to detect a change in the DO output. One is to
detect a change from low to high setting CS to high, and the other is to detect a change from low to high as a result of
repetitious operations of returning the CS to low after setting CS to high and checking the DO output.
Because all SK and DI inputs are ignored during the write operation, any input of instruction will also be disregarded.
When DO outputs high after completion of the write operation or if it is in the high-impedence state (Hi-Z), the input of
instructions is available. Even if the DO pin remains high, it will enter the high-impedence state upon the recognition of
a high of DI (start-bit) attached to the rising edge of an SK pulse. (see Figure 3).
DI input should be low during the VERIFY procedure.
11
12
13
A8
A7
A6
A5
A4
X
Standby
CMOS SERIAL E
2
PROM
S-29ZX30A
8
2.2 ERASE
This command erases 16-bit data in a specified address.
After changing CS to high, input a start-bit, op-code (ERASE), and address. It is not necessary to input data. Changing
CS to low will start the ERASE operation, which changes every bit of the 16 bit data to "1."
3.
Write enable (EWEN) and Write disable (EWDS)
The EWEN instruction puts the S-29ZX30A series into write enable mode, which accepts WRITE and ERASE
instructions. The EWDS instruction puts the S-29ZX30A series into write disable mode, which refuses WRITE and ERASE
instructions.
The S-29ZX30A series powers on in write disable mode, which protects data against unexpected, erroneous write
operations caused by noise and/or CPU malfunctions. It should be kept in write disable mode except when performing
write operations.
Figure 8
ERASE Timing (S-29Z330A)
t
CDS
t
PR
busy
Hi-Z
t
SV
VERIFY
Standby
Hi-Z
1
CS
SK
DI
DO
t
HZ1
2
3
4
5
6
7
8
9
10
11
1
A0
ready
1
A7
A6
A5
A4
A3
A2
A1
Figure 9
ERASE Timing (S-29Z430A)
t
CDS
t
PR
busy
Hi-Z
t
SV
Hi-Z
1
CS
SK
DI
DO
t
HZ1
2
3
4
5
6
7
8
1
A0
ready
1
X
A8
A7
A6
A5
A4
9
10
11
A3
A2
12
13
A1
VERIFY
Standby
CMOS SERIAL E
2
PROM
S-29ZX30A
9
n
Receiving a Start-Bit
A start bit can be recognized by latching the high level of DI at the rising edge of SK after changing CS to high (Start-bit
Recognition). The write operation begins by inputting the write instruction and setting CS to low. The DO pin then outputs
low during the write operation and high at its completion by setting CS to high (Verify Operation). Therefore, only after a
write operation, in order to accept the next command by having CS go high, will the DO pin switch from a state of high-
impedence to a state of data output; but if it recognizes a start-bit, the DO pin returns to a state of high-impedence (see
Figure 3).
n
Three-wire Interface (DI-DO direct connection)
Although the normal configuration of a serial interface is a 4-wire interface to CS, SK, DI, and DO, a 3-wire interface is
also a possibility by connecting DI and DO. However, since there is a possibility that the DO output from the serial memory
IC will interfere with the data output from the CPU with a 3-wire interface, install a resistor between DI and DO in order to
give preference to data output from the CPU to DI(See Figure 12).
8
7
6
5
4
3
2
1
11
9
10
Figure 11
EWEN/EWDS Timing (S-29Z430A)
8Xs
11=EWEN
00=EWDS
SK
DI
CS
Figure 10
EWEN/EWDS Timing (S-29Z330A)
6Xs
11=EWEN
00=EWDS
0
SK
DI
CS
13
12
Standby
DI
SIO
Figure 12
DO
CPU
S-29ZX30A
R : 10 to 100 k
8
7
6
5
4
3
2
1
0
11
9
Standby
10
0
0
CMOS SERIAL E
2
PROM
S-29ZX30A
10
n
Ordering Information
S-29ZX30A XXX
Package
DFJA
:
SOP2
FS
:
SSOP (S-29Z330A)
Product S-29Z330A
:
4Kbit
S-29Z430A
:
8Kbit
CMOS SERIAL E
2
PROM
S-29ZX30A
11
n
Characteristics
1. DC Characteristics
1.3
Current consumption (READ) I
CC1
--
Power supply voltage V
CC
1.1
Current consumption (READ) I
CC1
--
Ambient temperature Ta
Ta (C)
0.4
0.2
V
CC
=3.6 V
fsk=500 KHz
DATA=0101
0
-40
0
85
ICC1
(mA)
1.2
Current consumption (READ) I
CC1
--
Ambient temperature Ta
Ta (C)
-40
0
85
0.4
0.2
0
ICC1
(mA)
1.4
Current consumption (READ) I
CC1
--
Power supply voltage V
CC
1.5
Current consumption (READ) I
CC1
--
Power supply voltage V
CC
0.4
0.2
0
ICC1
(mA)
1.6
Current consumption (WRITE) I
CC2
--
Ambient temperature Ta
1.7
Current consumption (WRITE) I
CC2
--
Power supply voltage V
CC
1.8
Standby current consumption I
SB
--
Ambient temperature Ta
4
5
3
1
2
6
V
CC
(V)
0.4
0.2
0
ICC1
(mA)
4 5
3
1
2
6
V
CC
(V)
0.4
0.2
0
ICC1
(mA)
Ta=25 C
fscl=100 KHz
DATA=0101
4 5
3
1
2
6
V
CC
(V)
10
-6
10
-7
10
-8
10
-9
10
-10
10
-11
ISB
(A)
Ta=25 C
fscl=10 KHz
DATA=0101
Ta (C)
-40
0
85
Ta=25 C
fscl=500 KHz
DATA=0101
4 5
3
1
2
6
V
CC
(V)
Vcc=3.6 V
Ta=25 C
V
CC
=1.8 V
fsk=10 KHz
DATA=0101
Ta (C)
-40
0
85
2.0
1.0
0
ICC2
(mA)
Vcc=3.6 V
2.0
1.0
0
ICC2
(mA)
CMOS SERIAL E
2
PROM
S-29ZX30A
12
1.9
Input leakage current I
LI
--
Ambient temperature Ta
1.10 Input leakage current I
LI
--
Ambient temperature Ta
1.11 Output leakage current I
LO
--
Ambient temperature Ta
1.12 Output leakage current I
LO
--
Ambient temperature Ta
1.13 High level output voltage V
OH
--
Ambient temperature Ta
1.14 High level output voltage V
OH
--
Ambient temperature Ta
Ta (C)
-40
0
85
1.15 Low level output voltage V
OL
--
Ambient temperature Ta
Ta (C)
-40
0
85
1.0
0.5
0
ILI
(
A)
1.16 Low level output voltage V
OL
--
Ambient temperature Ta
Vcc=3.6 V
CS,SK,DI=3.6 V
Ta (C)
-40
0
85
1.0
0.5
0
ILO
(
A)
Ta (C)
-40
0
85
1.0
0.5
0
ILI
(
A)
Vcc=3.6 V
DO=0 V
Vcc=3.6 V
DO=3.6 V
Ta (C)
-40
0
85
Vcc=3.6 V
CS,SK,DI=0 V
Ta (C)
-40
0
85
1.0
0.5
0
ILI
(
A)
2.8
2.7
2.6
VOH
(V)
Vcc=2.7 V
IOH=100 uA
1.0
0.9
0.8
VOH
(V)
Vcc=0.9 V
IOH=5 uA
Vcc=1.8 V
IOL=100 uA
0.03
0.02
0.01
VOL
(V)
Ta (C)
-40
0
85
Vcc=0.9 V
IOL=10 uA
0.03
0.02
0.01
VOL
(V)
Ta (C)
-40
0
85
CMOS SERIAL E
2
PROM
S-29ZX30A
13
2. AC Characteristics
2.2
Program time t
PR
--
Power supply voltage V
CC
2.1
Maximum operating frequency f
max
--
Power supply voltage V
CC
2.4
Program time t
PR
--
Ambient temperature Ta
2.3
Program time t
PR
--
Ambient temperature Ta
10K
Ta=25 C
fmax
(Hz)
2
3
4
5
V
CC
(V)
1
100K
1M
Ta (C)
6
4
V
CC
=3.6 V
-40
0
85
2
tWR
(ms)
Ta (C)
V
CC
=0.9 V
-40
0
85
6
4
2
tWR
(ms)
2.6
Data output delay time t
PD
--
Ambient temperature Ta
2.5
Data output delay time t
PD
--
Ambient temperature Ta
Ta (C)
-40
0
85
0.6
0.4
0.2
tPD
(
s)
Ta (C)
0.6
0.4
V
CC
=1.8 V
-40
0
85
0.2
tPD
(
s)
2.7
Data output delay time t
PD
--
Ambient temperature Ta
Ta (C)
30
20
V
CC
=0.9 V
-40
0
85
10
tPD
(
s)
2
3
4
5
V
CC
(V)
1
6
4
2
tWR
(ms)
Ta=25 C
V
CC
=2.7 V
(4.0)
6.9 0.1
1.4 0.1
0.3 0.05
1.55 0.05
1.55 0.05
4.0 0.1
2.0 0.05
8-pin SSOP
FS008-A 990531
0.220.1
0.65
3.10.3
1
8
5
4
R135
13.5 0.5
Winding core
Unit:mm
Dimensions
Taping Specifications
Reel Specifications
1 reel holds 2000 ICs.
0.40.05
1.27
0.200.05
4.90(4.95max)
1
4
8
5
8-pin SOP
FJ008-A 990531
2.00.05
1.550.05
4.00.1(10 pitches 40.0 0.2)
0.30.05
2.10.1
8.00.1
6.70.1
2.00.05
5 max.
5
8
1
4
Feed direction
20.5
13.50.5
20.5
130.2
210.8
60
Winding core
Unit:mm
Dimensions
Taping Specifications
Reel Specifications
8-pin SOP
Markings
990603
29Z
8-pin SSOP
1
4
2
3
8
7
9
6
5
(10)
(1 and 5 are blank)
(6 is blank)
The information herein is subject to change without notice.
Seiko Instruments Inc. is not responsible for any problems caused by circuits or other diagrams
described herein whose industrial properties, patents or other rights belong to third parties. The
application circuit examples explain typical applications of the products, and do not guarantee any
mass-production design.
When the products described herein include Strategic Products (or Service) subject to regulations,
they should not be exported without authorization from the appropriate governmental authorities.
The products described herein cannot be used as part of any device or equipment which influences
the human body, such as physical exercise equipment, medical equipment, security system, gas
equipment, vehicle or airplane, without prior written permission of Seiko Instruments Inc.
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