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Электронный компонент: S-3511AEFJ

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Rev. 1.4
_00
REAL-TIME CLOCK
S-3511A
Seiko Instruments Inc.
1
The S-3511A is a CMOS real-time clock that supplies
and sets time and calendar data when requested by the
CPU. Soft-ware processing is reduced by connecting the
CPU via 3 wires and due to an interrupt/alarm function.
The constant voltage drive of the oscillation circuit also
enables low current consumption.

Features
Low current consumption
: 0.7
A typ.(V
DD
= 3.0 V, Ta = 25C)
Wide operating voltage range : 1.7 V to 5.5 V
BCD I/O of second, minute, hour, day, date, month and year
Interface to CPU with 3 lines
Built-in automatic calendar, automatic leap-year calculation up to 2099
Built-in voltage detector
Built-in constant voltage circuit
Built-in flag generation circuit during power-on and power down
Built-in alarm interrupter
Steady-state interrupt frequency/duty setting function
Built-in 32 kHz oscillation circuit (Internal C
d
, External C
g
and Crystal)
Applications
Cellular phone
PHS
A variety of pagers
TV set and VCR
Camera
Package
8-Pin SSOP (pin pitch: 0.65 mm)
(Package drawing code : FS008-A)
8-Pin SOP (pin pitch: 1.27 mm)
(Package drawing code : FJ008-D)
Die
REAL-TIME CLOCK
S-3511A
Rev. 1.4
_00
2
Seiko Instruments Inc.
Block Diagram
Figure 1
INT Register
Status register
Oscillating
circuit
SCK
CS
Power
voltage
detecting
circuit
Constant
voltage
circuit
VDD
VSS
Comparator
Second
Minute
Hour
Day of
week
Day
Month
Year
Shift register
Serial
Interface
INT
XIN
XOUT
Clock
generating
circuit
SIO
Timing
generation
REAL-TIME CLOCK
Rev. 1.4
_00
S-3511A
Seiko Instruments Inc.
3
Product Code Structure
S-3511AE xx
- TB
IC direction in tape specifications
Package name (abbreviation)
FS : 8-Pin SSOP
FJ : 8-Pin SOP
CA : Die
Description (fixed)



I Pin Assignment
(1) Package
S-3511AEFS
8-Pin SSOP
Top view
XOUT
VSS
6
5
8
7
3
4
1
2
SIO
VDD
SCK
CS
INT
XIN
S-3511AEFJ
8-Pin
SOP
Top view
XOUT
VSS
6
5
8
7
3
4
1
2
SIO
VDD
SCK
CS
INT
XIN
Figure 2

REAL-TIME CLOCK
S-3511A
Rev. 1.4
_00
4
Seiko Instruments Inc.
(2) Die :
S-3511AECA
CS
SCK
SIO
VDD
VSS
XOUT
XIN
INT
X
S-3511A
Y
0
Remark
Die size :
2.10
1.60 mm
Sizes shown are for design purposes only.
The corners of the die shrink by approximately 30
m after dicing.

Pad size:
100
100 m
Pad Coordinates
Symbol X-Coordinate Y-Coordinate Symbol X-Coordinate Y-Coordinate
INT
-890 641
VDD
890 641
XIN
-890 351
SIO
890 356
XOUT
-890
-114 SCK 890 -240
VSS
-890
-641 CS 890 -641
Figure 3
REAL-TIME CLOCK
Rev. 1.4
_00
S-3511A
Seiko Instruments Inc.
5
Description of Pins
Table 1
Pin No.
Symbol
Description
Configuration
1 INT
Alarm interrupt output pin.
Depending on the mode set by the INT
register and status register, it outputs low or
Clock when time is reached. It is disabled by
rewriting the status register.

Nch open-drain output (No
protective diode on the side
of VDD)
2 XIN
3 XOUT
Crystal oscillator connect pin (32,768 Hz)
(Internal C
d
, External C
g
)
-
4
VSS
Negative power supply pin (GND)
-
5 CS
Chip select input pin.
During "H" : The SIO pin allows data
input/output.
The SCK pin allows data input.
During "L" : The SIO pin is in the Hi-Z state.
The SCK pin is in the input-
disabled state.

CMOS input (Included pull-
down resistance. No
protective diode on the side
of VDD)
6
SCK
Serial clock input pin.
The input/output of data from the SIO pin is
performed in synchronization with this clock.
However, the clock is not accepted while the
CS pin is "L".

CMOS input (No protective
diode on the side of VDD)
7 SIO
Serial data input/output pin.
It is normally in the Hi-Z state while the CS pin
is "L". When the CS pin changes from "L" to
"H", the SIO pin is set to an input pin. It will
be set to an input or output pin, depending on
an subsequently input command.

Nch open-drain output (No
protective diode on the side
of VDD)
CMOS input
8
VDD
Positive power supply pin.
-
REAL-TIME CLOCK
S-3511A
Rev. 1.4
_00
6
Seiko Instruments Inc.
Absolute Maximum Ratings
Table 2
Item
Symbol
Applicable pin, conditions
Rating
Unit
Power voltage
V
DD
-
V
SS
-0.3 to V
SS
+6.5 V
Input voltage
V
IN
SCK,SDA,CS
V
SS
-0.3 to V
SS
+6.5 V
Output voltage
V
OUT
SIO,INT
V
SS
-0.3 to V
SS
+6.5 V
Operating temperature
T
opr
V
DD
=3.0 V
-40 to +85
C
Storage temperature
T
stg
-
-55 to +125
C
Caution The absolute maximum ratings are rated values exceeding which the product
couldsuffer physical damage. These values must therefore not be exceeded under
any conditions.
Recommended Operating Conditions
Table 3
Item
Symbol
Condition Min.
Typ.
Max.
Unit
Power voltage
V
DD
- 1.7
3.0
5.5
V
Operating temperature
T
opr
-
-20
+25
+70
C


Oscillation Characteristics
Table 4
(Unless otherwise specified : Ta
=25C, V
DD
=3 V, DS-VT-200 (crystal oscillator, C
L
=6 pF, 32,768 Hz) manufactured by SII Quartz Techno Ltd.)
Item Symbol
Condition
Min.
Typ.
Max.
Unit
Oscillation start voltage
V
STA
Within 10 seconds
1.7
- 5.5 V
Oscillation start time
T
STA
-
-
- 1 s
IC-to-IC frequency diversity
IC
-
-10
-
+10 ppm
Frequency voltage diversity
V V
DD
=1.7 to 5.5 V
-3
-
+3 ppm/V
Input capacity
C
g
Applied to the XIN pin
3
- 35 pF
Output capacity
C
d
Applied to the XOUT pin
- 12 - pF
REAL-TIME CLOCK
Rev. 1.4
_00
S-3511A
Seiko Instruments Inc.
7
DC Electrical Characteristics
Table 5 DC characteristics (3 V)
(Unless otherwise specified : Ta
=25C, V
DD
=3 V, DS-VT-200 (crystal oscillator, C
L
=6 pF, 32,768 Hz) manufactured by SII Quartz Techno Ltd.)
Item
Symbol Applicable
pin
Condition Min.
Typ.
Max.
Unit
Operating voltage range
V
DD
-
Ta
= -20 to +70C
1.7 3.0 5.5 V
Current consumption 1
I
DD1
-
During no communications
-
0.7 1.5
A
Current consumption 2
I
DD2
-
During communications
(SCK
=100 kHz)
-
5.5 10
A
Input leak current 1
I
IZH
SCK,
SIO
V
IN
= V
DD
-0.5
-
0.5
A
Input leak current 2
I
IZL
SCK,
SIO
V
IN
= V
SS
-0.5
-
0.5
A
Input current 1
I
IL1
CS
V
IN
= 5.5 V
2 6 20
A
Input current 2
I
IL2
CS
V
IN
= 0.4 V
40 110 300
A
Output leak current1
I
OZH
INT,
SIO
V
OUT
=V
DD
-0.5
-
0.5
A
Output leak current2
I
OZL
INT,
SIO
V
OUT
=V
SS
-0.5
-
0.5
A
Input voltage 1
V
IH
SIO, SCK, CS
- 0.8V
DD
-
-
V
Input voltage 2
V
IL
SIO, SCK, CS
-
-
- 0.2V
DD
V
Output current 1
I
OL1
INT
V
OUT
=0.4 V
1.5 2.5
-
mA
Output current 2
I
OL2
SIO
V
OUT
=0.4 V
5 10
-
mA
Power voltage detection
voltage 1
V
DET1
-
Ta
=+25C
1.8 2.0 2.2 V
Power voltage detection
voltage 2
V
DET2
-
Ta
= -20 to +70C
1.72
-
2.3 V


Table 6 DC characteristics (5 V)
(Unless otherwise specified : Ta
=25C, V
DD
=5 V, DS-VT-200 (crystal oscillator, C
L
=6 pF, 32,768 Hz) manufactured by SII Quartz Techno Ltd.)
Item Symbol
Applicable
pin Condition Min.
Typ.
Max.
Unit
Operating voltage range
V
DD
-
Ta
= -20 to +70C
1.7 3.0 5.5 V
Current consumption 1
I
DD1
-
During no communications
-
1.6 3.0
A
Current consumption 2
I
DD2
-
During communications
(SCK
=100 kHz)
-
12 20
A
Input leak current 1
I
IZH
SCK,
SIO
V
IN
= V
DD
-0.5
-
0.5
A
Input leak current 2
I
IZL
SCK,
SIO
V
IN
= V
SS
-0.5
-
0.5
A
Input current 1
I
IL1
CS
V
IN
= 5.5 V
10 25 50
A
Input current 2
I
IL2
CS
V
IN
= 0.4 V
100 175 400
A
Output leak current1
I
OZH
INT,
SIO
V
OUT
=V
DD
-0.5
-
0.5
A
Output leak current2
I
OZL
INT,
SIO
V
OUT
=V
SS
-0.5
-
0.5
A
Input voltage 1
V
IH
SIO, SCK, CS
- 0.8V
DD
-
-
V
Input voltage 2
V
IL
SIO, SCK, CS
-
-
- 0.2V
DD
V
Output current 1
I
OL1
INT
V
OUT
=0.4 V
2.0 3.5
-
mA
Output current 2
I
OL2
SIO
V
OUT
=0.4 V
6 12
-
mA
Power voltage detection
voltage 1
V
DET1
-
Ta
=+25C
1.8 2.0 2.2 V
Power voltage detection
voltage 2
V
DET2
-
Ta
= -20 to +70C
1.72
-
2.3 V
REAL-TIME CLOCK
S-3511A
Rev. 1.4
_00
8
Seiko Instruments Inc.
AC Electrical Characteristics
(S-3511A, R
L
=10 k, C
L
=80 pF)
Table 7 AC characteristics 1
Conditions : V
DD
=1.7 V to 5.5 V, Ta= -20 to 70C
Input;
V
IH
=0.8 V
DD
, V
IL
=0.2 V
DD
, Output; V
OH
=0.8 V
CC
, V
OL
=0.2 V
CC
(V
CC
=5.0 V)
Item Symbol
Min.
Typ.
Max.
Unit
Clock pulse width
t
SCK
5
- 250000 s
Setup time before CS rising
t
DS
1
-
-
s
Hold time after CS rising
t
CSH
1
-
-
s
Input data setup time
t
ISU
1
-
-
s
Input data hold time
t
IHO
1
-
-
s
Output data definition time
t
ACC
-
- 3.5 s
Setup time before CS falling
t
CSS
1
-
-
s
Hold time after CS falling
t
DH
1
-
-
s
Input rising/falling time
t
R
, t
F
-
- 0.1 s
Caution Since the output form of the SIO pin is Nch open-drain output, the rising time
of t
ACC
is determined by the values of load resistance (R
L
) and load capacity
(C
L
) outside the IC. Use this as a reference value.
Table 8 AC characteristics 2
Conditions : V
DD
=3.0 0.3 V, Ta= -20 to 70C
Input;
V
IH
=0.8 V
DD
, V
IL
=0.2 V
DD
, Output; V
OH
=0.8 V
CC
, V
OL
=0.2 V
CC
(V
CC
=5.0 V)
Item Symbol
Min.
Typ.
Max.
Unit
Clock pulse width
t
SCK
1
- 250000 s
Setup time before CS rising
t
DS
0.2
-
-
s
Hold time after CS rising
t
CSH
0.2
-
-
s
Input data setup time
t
ISU
0.2
-
-
s
Input data hold time
t
IHO
0.2
-
-
s
Output data definition time
t
ACC
-
- 1.0 s
Setup time before CS falling
t
CSS
0.2
-
-
s
Hold time after CS falling
t
DH
0.2
-
-
s
Input rising/falling time
t
R
, t
F
-
- 0.05 s
Caution Since the output form of the SIO pin is Nch open-drain output, the rising time
of t
ACC
is determined by the values of load resistance (R
L
) and load capacity
(C
L
) outside the IC. Use this as a reference value.
Table 9 AC characteristics 3
Conditions : V
DD
=5.0 0.5 V, Ta= -20 to 70C
Input;
V
IH
=0.8 V
DD
, V
IL
=0.2 V
DD
, Output; V
OH
=0.8 V
CC
, V
OL
=0.2 V
CC
(V
CC
=5.0 V)
Item Symbol
Min.
Typ.
Max.
Unit
Clock pulse width
t
SCK
0.5
- 250000 s
Setup time before CS rising
t
DS
0.1
-
-
s
Hold time after CS rising
t
CSH
0.1
-
-
s
Input data setup time
t
ISU
0.1
-
-
s
Input data hold time
t
IHO
0.1
-
-
s
Output data definition time
t
ACC
-
- 0.3 s
Setup time before CS falling
t
CSS
0.1
-
-
s
Hold time after CS falling
t
DH
0.1
-
-
s
Input rising/falling time
t
R
, t
F
-
- 0.05 s
Caution Since the output form of the SIO pin is Nch open-drain output, the rising time
of t
ACC
is determined by the values of load resistance (R
L
) and load capacity
(C
L
) outside the IC. Use this as a reference value.
REAL-TIME CLOCK
Rev. 1.4
_00
S-3511A
Seiko Instruments Inc.
9
Timing
Charts
t
CSH
t
DS
t
DH
t
DH
t
CSS
t
DS
CS
SCK
SIO
Figure 4
Figure 6
80
%
80
%
20
%
20
%
50
%
20
%
80
%
20
%
20
%
80
%
t
ACC
t
SCK
t
SCK
t
R
,t
F
t
F
t
R
t
ISU
SCK
Input data
t
IHO
50
%
SCK
Output data
Figure 5
REAL-TIME CLOCK
S-3511A
Rev. 1.4
_00
10
Seiko Instruments Inc.
Description of Operation
1. Serial
interface
S-3511A receives various commands via a 3-wire serial interface to read/write data. This section
covers the transfer methods of this product.
1.1 Communication data configuration
After turning the CS pin to "H", send a 4-bit fixed code "0110" and succeedingly transfer the
command of a 3-bit length and read/write command of a 1-bit length.
Figure 7 Communication data

1.2 Command configuration
There are seven types of commands which read from and write to various registers. The table
below lists them. Any command that is not listed in the table provides no operation.
Table 10 Command list
C2 C1 C0
Description
0
0
0
Reset (00 (year), 01 (month), 01 (day), 0 (day of week),
00 (minute), 00 (second))
*1
0 0 1
Status
register
access
0
1
0
Real-time data access 1 (year data to)
0
1
1
Real-time data access 2 (hour data to)
1
0
0
Alarm time/frequency duty setting
1 1 0
Test
mode
start
*2
1 1 1
Test
mode
end
*2
*1. Don't care the R/W bit of this command.
*2. This command is access-disabled due to specific use for the IC test.

1.3 Data
reading
When you input data from the SIO pin in synchronization with the falling of the SCK pin after
turning the CS pin to "H", the data is included into the inside of S-3511A at the eighth rising of the
SCK clock and the state of data reading is reached when the R/W bit has "1". The state leads to
output of data corresponding each command in synchronization with the falling of subsequent SCK
clock input.
Remark When the number of SCK clocks is less than eight, the state of clock waiting is reached
and no processing is done. When SCK clocks are more than required, they are processed
in order from the first and the clocks other than those required are ignored.
Command
0
1
1
0
C2
C1
C0
R/W
Fixed code
MSB
LSB
Read/Write bit
REAL-TIME CLOCK
Rev. 1.4
_00
S-3511A
Seiko Instruments Inc.
11
SCK
SCK
SCK
TEST
64
9
1
1
0
1
0
0
1
1
0
X
Output mode switching
(1) Real-time data reading 1
9
1
(3) Status register reading
Year data
Second data
1
1
0
0
0
1
1
0
X
Output mode switching
Status data
Input mode switching
LSB
MSB
TEST
32
9
1
1
1
1
0
0
1
1
0
X
Output mode switching
(
2) Real-time data reading 2
Hour data
Second data
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
Input mode switching
Input mode switching
Command
Command
Command
LSB
MSB
LSB
MSB
LSB
MSB
POWER
SIO
CS
SIO
CS
SIO
CS

Figure 8 Read communication
REAL-TIME CLOCK
S-3511A
Rev. 1.4
_00
12
Seiko Instruments Inc.
1.4 Data
writing
When you input data from the SIO pin in synchronization with the falling of the SCK pin after
turning the CS pin to "H", the data is included into the inside of S-3511A at the eighth rising of the
SCK clock and the state of data writing is reached when the R/W bit has "0". In the state, the data is
written to registers according each command in synchronization with the falling of subsequent SCK
clock input.
SCK
SCK
SCK
TEST
64
9
1
0
0
1
0
0
1
1
0
X
(1) Real-time data writing 1
9
1
(3) Status register writig
Year data
Second data
0
1
0
0
0
1
1
0
X
Status data
LSB
MSB
TEST
32
9
1
0
1
1
0
0
1
1
0
X
(2) Real-time data writing 2
Hour data
Second data
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
Command
Command
Command
LSB
MSB
LSB
MSB
LSB
MSB
POWER
SIO
CS
SIO
CS
SIO
CS
Figure 9 Write communication
REAL-TIME CLOCK
Rev. 1.4
_00
S-3511A
Seiko Instruments Inc.
13
2. Register
configuration

2.1 Real-time data register
The real-time data register is a 56-bit register which stores the BCD code of the data of year,
month, day, day of week, hour, minute and second. Any read/write operation performed by the real-
time data access command sends or receives the data from LSB on the first digit of the year data.
AM/
PM
Y80 Y40 Y20 Y10
Y8
Y4
Y2
Y1
MSB
LSB
Year data (00 to 99)
0
0
0
M10
M8
M4
M2
M1
MSB
LSB
Month data (01 to 12)
0
0
D20 D10
D8
D4
D2
D1
MSB
LSB
Day data (01 to 31)
0
0
0
0
0
W4
W2
W1
MSB
LSB
Day of week data (00 to 06)
A septenary counter. Set it so that it
corresponds to the day of the week.
0
H20 H10
H8
H4
H2
H1
MSB
LSB
Hour data (00 to 23 or 00 to 11)
0
MSB
LSB
Minute data (00 to 59)
TEST S40 S20 S10
S8
S4
S2
S1
MSB
LSB
Second data (00 to 59) and test flag
m10
m8
m4
m2
m1
AM/PM : For 12-hour expression, 0:AM and 1:PM.
For 24-hour expression, this flag has no
meaning but either "0" or "1" must be
written.
Sets the lower two digits of the Christian era (00
to 99) and links together with the auto calender
feature till 2,099.
The count value is automatically changed by the
auto calender feature:
1 to 31: 1, 3, 5, 7, 8, 10, 12
1 to 30: 4, 6, 9, 11
1 to 29: 2 (leap year)
1 to 28: 2 (common year)
TEST : Turns to "1" during the test mode.
m20
m40
Figure 10

REAL-TIME CLOCK
S-3511A
Rev. 1.4
_00
14
Seiko Instruments Inc.
2.2 Status
register
The status register is an 8-bit register which allows you to display and set various modes. The
POWER flag is read-only and others are read/write-enabled.
B7
LSB
POWER
12/24
R
R/W
R/W
R/W
R/W
INTAE
INTME
MSB
B6
B5
B4
B3
B2
B1
B0
INTFE
-
-
-
Figure 11

B7:POWER
This flag turns to "1" if the power voltage detecting circuit operates during
power-on or changes in power voltage (below V
DET
). Once turning to "1", this
flag does not turns back to "0" even when the power voltage reaches or
exceeds the detection voltage. When the flag is "1", you must send the reset
command (or the status register read command), and turn it to "0". It is a
read-only flag.

B6:12/24
This flag is used to set 12-hour or 24-hour expression.

0 : 12-hour expression
1 : 24-hour expression
B5:INTAE
This flag is used to choose the state of INT pin output with alarm interrupt
output set. Enable this flag after setting alarm time that forms a meeting
condition in the INT register:

0 : Alarm interrupt output is disabled.
1 : Alarm interrupt output is enabled.
B3:INTME
This flag is used to make the output of the INT pin per-minute edge interrupt
or per-minute steady interrupt. To make the output per-minute steady
interrupt, set "1" at INTME and INTFE .

0 : Alarm interrupt or selected frequency steady interrupt output
1 : Per-minute edge interrupt or per-minute steady interrupt output
B1:INTFE
This flag is used to make the output of the INT pin per-minute steady interrupt
output (a period of one minute, 50
% of duty) or selected frequency steady
interrupt. Note that the INT register is considered as the data of
frequency/duty if selected frequency steady interrupt is chosen.
0 : Alarm interrupt or per-minute edge interrupt output
1 : Per-minute steady interrupt or selected frequency steady
interrupt output
B4,B2 and B0: If having written contents, they are ignored. When they are read, "0" can be
read from them.
REAL-TIME CLOCK
Rev. 1.4
_00
S-3511A
Seiko Instruments Inc.
15
2.3 Alarm time/Frequency duty setting register
The alarm time/frequency duty setting registers is a 16-bit registers which sets alarm time or
frequency duty. They are switched by INTAE or INTFE register. AM/PM flag to be set must be in
accordance with 12-hour or 24-hour expression. If AM/PM flag is not rightly then set hour data is not
met to alarm data. The alarm time/frequency duty setting register is a write-only register.
(1) When INTAE
=
=
=
= 1
AM/
PM
0
H8
H4
H2
H1
MSB
LSB
0
m8
m4
m2
m1
MSB
LSB
H20 H10
m10
m20
m40
INT register
Figure 12 INT register (alarm)
INT register is considered as alarm time data. Having the same configuration as the time and
minutes registers of real-time data register configuration, they represent hours and minutes with
BCD codes. When setting them, do not set any none-existent day. Data to be set must be in
accordance with 12-hour or 24-hour expression that is set at the status register.
(2) When INTFE
=
=
=
= 1
INT register is considered as frequency duty data. By turning each bit of the registers to "1", a
frequency corresponding to each bit is chosen in an ANDed form.
f0
MSB
LSB
INT register
MSB
LSB
f1
f2
f3
f4
f5
f6
f7
f8
f9
f10
f11
f12
f13
f14
f15
f0
32768 Hz
f4
2048 Hz
f8
128 Hz
f12
8 Hz
f1
16384 Hz
f5
1024 Hz
f9
64 Hz
f13
4 Hz
f2
8192 Hz
f6
512 Hz
f10
32 Hz
f14
2 Hz
f3
4096 Hz
f7
256 Hz
f11
16 Hz
f15
1 Hz
Figure 13 INT register (frequency duty)

REAL-TIME CLOCK
S-3511A
Rev. 1.4
_00
16
Seiko Instruments Inc.
32 kHz
Example
If f15 to f0
= 000A H
16 kHz
8 kHz
4 kHz
2 kHz
INT pin output
Set to selected frequency steady
interrupt output
Figure 14 Clock output

2.4 Test
flag
The test flag is a 1-bit register which is assigned to MSB of the second data of the real-time data
register. If transferred data is considered as the test mode starting command due to the receiving of
the test mode starting command or noises, "1" is set. When "1" is set, you must send the test mode
ending command or reset command.
3. Initialization
Note that S-3511A has different initializing operations, depending on states.

3.1 When power is turned on
When power is turned on, the status register is set to "82h" and the INT register to "8000h" by the
power-on detecting circuit. In other words, "1" is sets at the bit 7 (POWER flag) of the status
register and the clock of 1 Hz is output from the INT pin. This is provided to adjust oscillating
frequencies. In normal use, the reset command must be sent when power is turned on.
Real-time data register : 00 (year), 01 (month), 01 (day), 0 (day of week), 00 (hour), 00
(minute), 00 (second)
Status register
: "82h"
INT register
: "8000h"
3.2 When the power voltage detecting circuits operates
The power voltage detecting circuit included in S-3511A operates and sets "1" at the bit 7
(POWER flag) of the internal status register when power is turned on or power voltage is reduced.
Once "1" is set, it is held even after the power voltage gets equal to or higher than the detection
voltage, i.e., power voltage detector threshold. When the flag has "1", you must send the reset
command from CPU and initialize the flag. At this point, other registers does not change.
However, if the POWER flag has "0" during the power-on reset of CPU (S-3511A does not reach
any indefinite area during backup), you do not have to send the reset command.

REAL-TIME CLOCK
Rev. 1.4
_00
S-3511A
Seiko Instruments Inc.
17
3.3 When the reset command is received
When the reset command is received, each register turns as follows:

Real-time data register : 00 (year), 01 (month), 01 (day), 0 (day of week), 00 (hour), 00
(minute), 00 (second)
Status register
: "00h"
INT register
: "0000h"

0
1 1 0
R
/
W
M
S
B
SIO LINE
0 0 1
L
S
B
1
Command
status read command
V
DD
POWER flag
0 1 1 0
R
/
W
M
S
B
SIO LINE
0 0 1
L
S
B
1
command
V
DD
POWER
0 1 1 0
R
/
W
M
S
B
0 0
L
S
B
1
1 0 0 0 0 0
POWER
0
Don't care
backup state (S-3511A does not reach any indefinite area)
0 1 1 0
R
/
W
M
S
B
0 1
L
S
B
0 0 0 0 0 0 0
POWER
0
CPU
reset command
status data
1
1
0
data
0
data
status read command
status data
command
command
real-time data read command
M
S
B
M
S
B
L
S
B
L
S
B
Figure 15 Initializing


REAL-TIME CLOCK
S-3511A
Rev. 1.4
_00
18
Seiko Instruments Inc.
4. Processing of none-existent data and end-of-month
When writing real-time data, validate it and treat any invalid data and end-of-month correction.
[None-existent data processing]
Table 11
Register
Normal data
Error data
Result
Year data
00 to 99
XA to XF, AX to FX
00
Month data
01 to 12
00, 13 to 19, XA to XF
01
Day data
01 to 31
00, 32 to 39, XA to XF
01
Day of week data
0 to 6
7
0
Hour data
*1
(24-hour)
(12-hour)
0 to 23
0 to 11
24 to 29, 3X, XA to XF
12 to 19, XA to XF
00
00
Minute data
00 to 59
60 to 79, XA to XF
00
Second data
*2
00 to 59
60 to 79, XA to XF
00
*1.
For 12-hour expression, write the AM/PM flag.
The AM/PM flag is ignored in 24-hour expression, but "0" for 0 to 11 o'clock and "1" for
12 to 23 o'clock are read in a read operation.
*2.
None-existent data processing for second data is performed by a carry pulse one
second after the end of writing. At this point, the carry pulse is sent to the minute
counter.
[End-of-month correction]
Any none-existent day is corrected to the first day of the next month. For example, February 30 is
changed to March 1. Leap-year correction is also performed here.
5. Interrupt
There are five types of output format from the INT pin, which are selected by the INTAE, INTME and
INTFE bits of the status register.
(1) Alarm interrupt output
Alarm interrupt is enabled by setting hour and minute data to the INT register and turning the
status register's INTAE to "1" and INTME and INTFE to "0". When set hour data is met, low is
output from the INT pin. Since the output is held, rewrite INTAE of the status register to "0"
through serial communication to turn the output to high (OFF state). The coincidence signal
retains for one minute. Pay attention that the "L" signal is output from the INT pin once again
when disable or enable communication is executed during this one-minute period.
(2) Selected frequency steady interrupt output
When you set frequency/duty data to the INT register and turn the status register's INTME to
"0" and INTFE to "1", clock set at the INT register is output from the INT pin.
(3) Per-minute edge interrupt output
When a first minute carry is performed after the status register's INTME is set with "1" and
INTFE with "0", low is output from the INT pin. Since the output is held, rewrite INTAE, INTME
and INTFE of the status register through serial communication. When you perform disable or
enable communication while the minute carry processing signal is being retained (for 10 ms), "L"
signal is output from the INT pin again.
REAL-TIME CLOCK
Rev. 1.4
_00
S-3511A
Seiko Instruments Inc.
19
(4) Per-minute steady interrupt output
When a first minute carry is performed after the status register's INTME and INTFE are set
with "1", clock is output from the INT pin with a period of one minute (50
% duty). When you
perform disable or enable communication while the INT pin is at "L", "L" signal is output from the
INT pin again.
Caution 1. If changing an output mode, give care to the state of the INT register and output.
2. If per-minute edge interrupt output or per-minute steady interrupt output is chosen,
the INT register have no meaning.

Table 12 Interrupt description
NO. INTAE INTME INTFE
Description
0
0 0 0
Output
disabled
1
*1
0
1
Selected frequency steady interrupt output
2
*1
1
0
Per-minute edge interrupt output
3
*1
1
1
Per-minute steady interrupt output
4
1 0 0
Alarm
interrupt
output
*1. Don't care
REAL-TIME CLOCK
S-3511A
Rev. 1.4
_00
20
Seiko Instruments Inc.
(1) Alarm interrupt output
INTAE
INT pin
INTME
=INTFE=0
OFF
"L" signal is output again in case of 1
minute or less
Alarm time corresponds
Change by program
Alarm time corresponds
(2) Selected frequency steady interrupt output
INTFE
INT pin
INTAE
=INTME=0
Free run output starts
Change by program
OFF
(3) Per-minute edge interrupt output
INTME
INT pin
INTAE
=INTFE=0
OFF
Minute-carry processing
Change by program
"L" signal is output again in case of
10 ms or less
Minute-carry processing
(4) Per-minute steady interrupt output
INTFE,INTME
INT pin
INTAE
=0
Minute-carry
processing
Minute-carry
processing
Change by program (OFF)
30 s
30 s
30 s
30 s
30 s
30 s
30 s
Minute-carry
processing
Minute-carry
processing
30 s
Minute-carry
processing
"L" signal is output again in case of 10 ms or less.
"H" signal is output in case of 10 ms or more.
"L" signal is output by the next minute-carry processing.
30 s
(5) During power-on detecting circuit operation
INTFE
INT pin
INTAE
=INTME=0
Change by the reset command
OFF
0.5 s
0.5 s
Figure 16 Output mode
REAL-TIME CLOCK
Rev. 1.4
_00
S-3511A
Seiko Instruments Inc.
21
6. Power voltage detecting circuit
S-3511A has an internal power voltage detecting circuit. This circuit gives sampling movement for only
15.6 ms once a second. If the power voltage decreases below the detection voltage (V
DET
), the BLD latch
circuit latches the "H" level, and sampling movement stops. Only when subsequent communication is of
the status read command, the output of the latch circuit is transferred to the sift register and the sampling
movement is resumed. Decrease in power voltage can be monitored by reading the POWER flag. That is
to say, once decrease in power voltage is detected, any detecting operation is not performed and "H" is
held unless you perform initialization or send the status read command.
Caution When power voltage is increased and the first read operation is performed after decrease
in power voltage occurs and the latch circuit latches "H", "1" can be read on the POWER
flag. However, if the next read operation is performed after the sampling of the detecting
circuit, the POWER flag is reset since sampling is subsequently allowed. See the timing
diagram below.
Latch circuit output
Sampling pulse
(0)
1 s
1 s
Stop
Stop
Stop
(1)
(1)
(1) (1)
(1) (1)
(0)
V
DD
POWER flag
V
DET
Communication
Latch circuit
output
Sampling pulse
Carry pulse
1 s
1 s
(1)
(0)
Communication
POWER flag
[Timing of sampling pulse]
0.5 s
0.5 s
7.8 ms
Carry-up timing
15.6 ms
Latch timing
1 Hz
V
DET
Sampling pulse
(1)
(0)
V
DD
Stop
Stop
Stop
Stop
Figure 17 Timing of the power voltage detecting circuit
REAL-TIME CLOCK
S-3511A
Rev. 1.4
_00
22
Seiko Instruments Inc.
7. Example of software treatment
(1) Initialization flow at power-on
NO
YES
START
END
POWER
=1
*1. If S-3511A is back-up and power is turned on
only on the CPU side, the reset command
does not need transferring.

*2. If conditions are no good (e.g., noise) and
probable changes in commands occurs via
serial communications, it is recommended to
make sure the TEST flag.

*3. The test ending command may be used
alternately
Power on
Reset command
transfer
NO
YES
TEST
=1
Reset command
transfer
Status register setting
command transfer
Real-time data setting
command transfer
INT register setting
command transfer
*1
*2
*3
Figure 18 Initialization flow

REAL-TIME CLOCK
Rev. 1.4
_00
S-3511A
Seiko Instruments Inc.
23
Samples of Application Circuits
V
CC
XOUT
XIN
S-3511AEFS
SIO
VSS
VDD
SCK
VSS
VCC
External CPU
INT
CS
System
power
C
g
Due to the I/O pin with no protective diode on the VDD side, the relation of VCC
VDD has no
problem. But give great care to the standard.
Make communications after the system power is turned on and a stable state is obtained.
Figure 19 Application circuit 1
VSS
VCC
External CPU
Power
switching
circuit
XOUT
XIN
S-3511AEFS
SIO
VSS
VDD
SCK
INT
CS
System
power
C
g
Make communications after the system power is turned on and a stable state is obtained.
Figure 20 Application circuit 2
Caution The application circuits above do not guarantee proper operation.
Evaluate in the actual application to determine the correct constants.
REAL-TIME CLOCK
S-3511A
Rev. 1.4
_00
24
Seiko Instruments Inc.
Adjustment of Oscillating Frequency
1. Configuration of the oscillating circuit
Since crystal oscillation is sensitive to external noises (clock accuracy is affected), the following
measures are essential for optimizing your oscillating circuit configuration:

(1) Place S-3511A, crystal oscillator and external capacitor (C
g
) as close to each other as possible.
(2) Make high the insulation resistance between pins and the substrate wiring patterns of XIN and
XOUT.
(3) Do not place any signal or power lines close to the oscillating circuit.


XIN
XOUT
C
g
S-3511A
C
d
R
d
R
f
Crystal oscillator:32,768 Hz
C
L
=6 pF
C
g
=3 to 35 pF
Oscillating circuit internal constant standard
values:
R
f
=20 M
R
d
=220 k
C
d
=12 pF
Figure 21 Connection diagram
REAL-TIME CLOCK
Rev. 1.4
_00
S-3511A
Seiko Instruments Inc.
25
2. Measurement of oscillating frequencies
When power is turned on, S-3511A has the internal power-on detecting circuit operating and outputs a
signal of 1 Hz from the INT pin to select the crystal oscillator and optimize the C
g
value. Turn power on
and measure the signal with a frequency counter following the circuit configuration shown in Figure 22.
Remark If the error range is
1 ppm in relation to 1 Hz, time is shifted by approximately 2.6 seconds a
month (as calculated using the following expression).
10
-6
(1 ppm)
60 seconds 60 minutes 24 hours 30 days = 2.592 seconds


Open or
pull-up
Frequency
counter
VDD
XIN
XOUT
SDA
INT
VSS
CS
SCK
C
g
S-3511A
Figure 22 Connection diagram

Caution 1. Use a high-accuracy frequency counter (1 ppm order).
2. Since the 1 Hz signal continues to be output, you must send the
reset command in normal operation.
3. Determine C
g
with its frequency slow/fast range property referred.
REAL-TIME CLOCK
S-3511A
Rev. 1.4
_00
26
Seiko Instruments Inc.
3. Adjustment of oscillating frequencies
Matching of a crystal oscillator with the nominal frequency must be performed with parasitic
capacitance on the board included. Select a crystal oscillator and optimize the C
g
value in accordance
with the flow chart below.
NO
YES
START
Variable
capacity
Select a crystal oscillator.
NO
Is C
g
in the
specification ?
*1
*2
Set C
g
NO
Is it an
optimal
value ?
YES
Change C
g
.
END
YES
Set to the center of
variable capacitor.
Does
the frequency
match ?
NO
YES
Make fine adjustment
of the frequency in
variable capacity.
*3
<Trimer capacitor>
<Fixed capacitor>
Figure 23 Crystal oscillator setting flow

*1.
For making matching adjustment of the IC with a crystal, contact an appropriate crystal maker to
determine the C
L
value (load capacity) and R
I
value (equivalent serial resistance). The C
L
value
= 6
pF and R
I
value
= 30 k Typ. are recommended values.
*2. C
g
value selection must be performed on the actual PCB since parasitic capacitance affects it. Select
the C
g
value in a range from 3 pF to 35 pF. If the frequency does not match, change the C
L
value of
the crystal.
*3. Adjust the rotation angle of the variable capacity so that the capacity value is somewhat smaller than
the center, and confirm the oscillating frequency and the center value of the variable capacity. This
is done in order to make the capacity of the center value smaller than one half of the actual capacity
value because a smaller capacity value makes a greater quantity of changes in a frequency. If the
frequency does not match, change the C
L
value of the crystal.
Caution 1. Oscillating frequencies are changed by ambient temperature and power voltage.
Refer to property samples.
2. The 32 kHz crystal oscillator operates slower at higher or lower ambient temperature
than 20 to 25



C. Therefore, it is recommended to adjust or set the oscillator to
operate somewhat faster at normal temperature.
REAL-TIME CLOCK
Rev. 1.4
_00
S-3511A
Seiko Instruments Inc.
27
Precautions
Do not apply an electrostatic discharge to this IC that exceeds the performance ratings ofthe built-in
electrostatic protection circuit.
SII claims no responsibility for any disputes arising out of or in connection with any infringement by
products including this IC of patents owned by a third party.
REAL-TIME CLOCK
S-3511A
Rev. 1.4
_00
28
Seiko Instruments Inc.
Characteristics (Reference Data)
(1) Standby current vs. C
g
(2) Standby current vs. V
DD
(3) Operating drain current vs. Input clock
(4) Standby current vs. temperature
(5) Oscillating frequency vs. C
g
(6) Oscillating frequency vs. V
DD
SCK frequency [kHz]
Ta
=25C
I
DD1
[
A]
0
1
2
3
4
5
6
0
0.5
1
1.5
2
2.5
3
V
DD
[V]
Ta [
C]
-30 -10
50
30
10
80
0
0.5
1
1.5
2
I
DD1
[
A]
Ta
=25C
0
400
1,000
0
50
100
150
I
DD2
[
A]
Ta
=25C
V
DD
[V]
0
2
4
6
-4
-2
0
2
4
f/f
[ppm]
Ta
=25C
C
g
[pF]
f/f
[ppm]
0
5
10
15
-20
0
20
40
60
80
V
DD
=5 V
V
DD
=3 V
0
5
10
15
0
0.5
1
1.5
2
Ta
=25C
C
g
[pF]
I
DD1
[
A]
V
DD
=5 V
V
DD
=3 V
V
DD
=3 V
V
DD
=5 V
V
DD
=3 V
V
DD
=5 V
REAL-TIME CLOCK
Rev. 1.4
_00
S-3511A
Seiko Instruments Inc.
29
(8) Oscillation start time vs. C
g
Ta
=25C
(9) Output current 1 (V
OUT
vs. I
OL1
)
(7) Oscillating frequency vs. temperature
(10) Output current 2 (V
OUT
vs. I
OL2
)
C
g
[pF]
T
STA
[mS]
0
5
10
15
0
200
400
600
800
V
DD
=5 V
V
DD
=3 V
INT pins, Ta
=25C
SIO pins, Ta
=25C
V
OUT
[V]
0
1
2
3
4
5
0
5
10
15
0
1
2
3
4
5
0
10
20
30
40
50
I
OL1
[mA]
V
DD
=5 V
V
DD
=3 V
V
DD
=5 V
V
DD
=3 V
V
OUT
[V]
I
OL2
[mA]
f/f
[ppm]
-50
0
50
100
-160
-120
-80
-40
20
Ta
=25C, V
DD
=3 V
Ta [
C]
No.
TITLE
SCALE
UNIT
mm
Seiko Instruments Inc.
0.220.1
0.65
3.10.3
1
8
5
4
0.15
+0.1
-0.05
SSOP8-A-PKG Dimensions
No. FS008-A-P-SD-1.1
FS008-A-P-SD-1.1
No.
TITLE
SCALE
UNIT
mm
Seiko Instruments Inc.
6.90.1
(4.0)
1.40.1
0.30.05
8.00.1
1.550.05
1.550.05
4.00.1
2.00.05
Feed direction
SSOP8-A-Carrier Tape
No. FS008-A-C-SD-1.1
FS008-A-C-SD-1.1
No.
TITLE
SCALE
UNIT
mm
Seiko Instruments Inc.
20.5
130.2
210.8
20.5
13.50.5
QTY.
2,000
Enlarged drawing in the central part
SSOP8-A-Reel
No. FS008-A-R-SD-1.1
FS008-A-R-SD-1.1
No. FJ008-A-P-SD-2.1
0.40.05
1.27
0.200.05
5.020.2
1
4
8
5
No.
TITLE
SCALE
UNIT
mm
SOP8J-A-PKG Dimensions
Seiko Instruments Inc.
FJ008-A-P-SD-2.1
No.
TITLE
SCALE
UNIT
mm
5
8
1
4
2.00.05
1.550.05
0.30.05
2.10.1
8.00.1
5max.
6.70.1
2.00.05
Seiko Instruments Inc.
Feed direction
4.00.1(10 pitches:40.00.2)
SOP8J-D-Carrier Tape
No. FJ008-D-C-SD-1.1
FJ008-D-C-SD-1.1
No.
TITLE
SCALE
UNIT
mm
QTY.
2,000
20.5
13.50.5
60
20.5
130.2
210.8
Seiko Instruments Inc.
Enlarged drawing in the central part
SOP8J-D-Reel
No. FJ008-D-R-SD-1.1
FJ008-D-R-SD-1.1
The information described herein is subject to change without notice.
Seiko Instruments Inc. is not responsible for any problems caused by circuits or diagrams described herein
whose related industrial properties, patents, or other rights belong to third parties. The application circuit
examples explain typical applications of the products, and do not guarantee the success of any specific
mass-production design.
When the products described herein are regulated products subject to the Wassenaar Arrangement or other
agreements, they may not be exported without authorization from the appropriate governmental authority.
Use of the information described herein for other purposes and/or reproduction or copying without the
express permission of Seiko Instruments Inc. is strictly prohibited.
The products described herein cannot be used as part of any device or equipment affecting the human
body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus
installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc.
Although Seiko Instruments Inc. exerts the greatest possible effort to ensure high quality and reliability, the
failure or malfunction of semiconductor products may occur. The user of these products should therefore
give thorough consideration to safety design, including redundancy, fire-prevention measures, and
malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.