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Электронный компонент: C8051F332

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Small Form Factor
Copyright 2005 by Silicon Laboratories
4.19.2005
Port 0
Latch
UART
4 kB
FLASH
256 Byte
SRAM
POR
SFR Bus
8
0
5
1
C
o
r
e
Timer 0,
1, 2, 3
3-Chnl
PCA/
WDT
10-bit
200 ksps
ADC
A
M
U
X
AIN0-AIN15
P
0
D
r
v
VDD
X
B
A
R
Reset
XTAL1
XTAL2
External
Oscillator
Circuit
System Clock
24.5 MHz (2%)
Internal
Oscillator
Analog/Digital
Power
Debug HW
VREF
SMBus
C2D
C2D
CP0
+
-
Temp
P0.0/VREF
P0.1/IDAC
P0.2/XTAL1
P0.3/XTAL2
P0.4/TX
P0.5/RX
P0.6/CNVST
P0.7
VDD
GND
RST/C2CK
Brown-
Out
P
1
D
r
v
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
SPI
Port 1
Latch
512 Byte
XRAM
P2.0/C2D
Port 2
Latch
VREF
80kHz
Internal
Oscillator
C8051F332
25 MIPS, 4 kB Flash, 10-Bit ADC, 20-Pin Mixed-Signal MCU
Analog Peripherals
10-Bit ADC
-
Programmable throughput up to 200 ksps
-
Up to 16 external inputs; programmable as single-ended or differential
-
Reference from internal V
REF
, V
DD
, or external pin
-
Internal or external start of conversion sources
-
Built-in temperature sensor (3 C)
Comparator
-
Programmable hysteresis and response time
-
Configurable to generate interrupts or reset
-
Low current (0.4 A)
On-Chip Debug
-
On-chip debug circuitry facilitates full speed, non-intrusive in-system
debug (no emulator required)
-
Provides breakpoints, single stepping, watchpoints
-
Inspect/modify memory, registers, and stack
-
Superior performance to emulation systems using ICE-chips, target
pods, and sockets
Supply Voltage: 2.7 to 3.6 V
-
Typical operating current: 6.4 mA at 25 MHz
9 A at 32 kHz
-
Typical stop mode current: <0.1 A
Temperature Range: 40 to +85 C
High-Speed 8051 C Core
-
Pipelined instruction architecture; executes 70% of instructions in 1 or 2
system clocks
-
Up to 25 MIPS throughput with 25 MHz clock
-
Expanded interrupt handler
Memory
-
768 bytes data RAM
-
4 kB Flash; in-system programmable in 512 byte sectors (512 bytes are
reserved)
Digital Peripherals
-
17 port I/O; all are 5 V tolerant
-
Hardware SMBusTM (I2CTM compatible), SPITM, and UART serial ports
available concurrently
-
Programmable 16-bit counter/timer array with three capture/compare
modules, WDT
-
4 general-purpose 16-bit counter/timers
-
Real-time clock mode using PCA or timer and external clock source
Clock Sources
-
Two internal oscillators:
-
24.5 MHz, 2% accuracy supports UART operation
-
80 kHz low frequency, low-power
-
External oscillator: Crystal, RC, C, or Clock (1 or 2 pin modes)
-
Can switch between clock sources on-the-fly
Package
-
20-Pin QFN (lead-free package)
Ordering Part Numbers
-
C8051F332-GM
Small Form Factor
Copyright 2005 by Silicon Laboratories
4.19.2005
Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.
Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders
C8051F332
25 MIPS, 4 kB Flash, 10-Bit ADC, 20-Pin Mixed-Signal MCU
Selected Electrical Specifications
(T
A
= 40 to +85 C, V
DD
= 2.7 V unless otherwise specified)
Parameter
Conditions
Min
Typ
Max
Units
Global Characteristics
Supply Voltage
2.7
3.6
V
Supply Current with
CPU active
Clock = 25 MHz
Clock = 1 MHz
Clock = 80 kHz; V
DD
Monitor Disabled Clock = 32 kHz;
V
DD
Monitor Disabled
--
--
--
--
6.4
0.36
20
9
--
--
--
--
mA
mA
A
A
Supply Current (shutdown)
Oscillator off; V
DD
Monitor Disabled
--
<0.1
--
A
Clock Frequency Range
DC
--
25
MHz
Internal Oscillators
Frequency (OSC0)
24.0
24.5
25.0
MHz
Frequency (OSC1)
See Note
--
80
--
kHz
A/D Converter
Resolution
10
bits
Integral Nonlinearity
--
1/2
1
LSB
Differential Nonlinearity
Guaranteed Monotonic
--
1/2
1
LSB
Signal-to-Noise Plus Distortion
53
55.5
--
dB
Throughput Rate
--
--
200
ksps
Input Voltage Range
0
--
V
REF
V
Comparator
Response Time Mode0
(CP+) (CP-) = 100 mV
--
0.1
--
s
Current Consumption Mode0
--
7.6
--
A
Response Time Mode1
(CP+) (CP-) = 100 mV
--
0.18
--
s
Current Consumption Mode1
--
3.2
--
A
Response Time Mode2
(CP+) (CP-) = 100 mV
--
0.32
--
s
Current Consumption Mode2
--
1.3
--
A
Response Time Mode3
(CP+) (CP-) = 100 mV
--
1
--
s
Current Consumption Mode3
--
0.4
--
A
Note: OSC1 can be calibrated in 2.5% steps using an internal calibration register.
Package Information
18
1
E
D
A2
A
A1
e
A3
E2
R
e
L
Bottom View
Side View
2
3
5
6
7
10
15
14
12
11
20
19
16
E2 2
D2
8
13
D2
2
4 x
e
4 x e
DETAIL 1
DETAIL 1
AA
BB
CC
DD
b
4
9
17
MM
0.80
0.90
1.00
A
MIN
TYP
MAX
0
0.02
0.05
A1
0
0.65
1.00
A2
0.25
A3
0.18
0.23
0.30
b
4.00
D
2.00
2.15
2.35
D2
0.435
AA
0.435
BB
4.00
E
E2
0.5
e
0.18
CC
0.45
0.55
0.65
L
20
N
0.09
R
5
ND
5
NE
0.18
DD
2.00
2.15
2.35
C8051F330DK Development Kit