Small Form Factor
Copyright 2006 by Silicon Laboratories
2.24.2006
UART
32 kB
FLASH
256 B
SRAM
POR
SFR Bus
8
0
5
1
C
o
r
e
x16
Reset
/RST/C2CK
External
Oscillator
Circuit
Debug HW
Brown-
Out
P
0
D
r
v
2 kB
XRAM
XTAL1
XTAL2
P0.0/IDAC0
P0.1/IDAC1
P0.2
P0.3
P0.4/TX
P0.5/RX
P0.6/CNVST
P0.7
SPI
VDD
C
R
O
S
S
B
A
R
P
1
D
r
v
P1.0/XTAL1
P1.1/XTAL2
P1.2/VREF
P1.3
P1.4
P1.5
P1.6
P1.7
Port 0
Latch
SMBus
Timer
0,1,2,3
Port 1
Latch
24.5 MHz
2% Oscillator
P
2
D
r
v
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7/C2D
12-bit
200 ksps
ADC
A
M
U
X
AIN0-AIN23
VDD
CP1
+
-
Temp
CP0
+
-
C2D
Port 2
Latch
PCA x6 /
WDT
32 KHz
Oscillator
GND
VREF
smaRTClock
State
Machine
VRTC-BACKUP
12-bit
IDAC0
IDAC0
smaRTClock Alarm
smaRTClock Block
(to smarRTClock Block)
(to rest of chip)
Battery Switch-Over Circuit
(VDD >= VRTC-BACKUP)
Clock
Mult.
XTAL3
XTAL4
VREG
VREGIN
VIO
12-bit
IDAC1
IDAC1
64B RAM
CRC
Engine
C8051F41x
2.0 V, 32/16 kB, smaRTClock, 12-Bit ADC MCU
Analog Peripherals
12-bit ADC
-
1 LSB INL; no missing codes
-
Programmable Throughput up to 200 ksps
-
Up to 24 External Inputs; programmable as single-ended or differential
-
Data Dependent Windowed Interrupt Generator
-
Built-in Temperature Sensor (3 C)
-
Internal Voltage Reference--1.5 V, 2.2 V (programmable)
Two 12-Bit Current Mode DACs
Two Comparators
-
Programmable hysteresis values and response time
-
Configurable to generate interrupts or reset
POR/Brown-out Detector
On-Chip Debug
-
On-chip debug circuitry facilitates full speed, non-intrusive in-system
debug (no emulator required)
-
Provides breakpoints, single stepping, watchpoints
-
Inspect/modify memory, registers, and stack
-
Superior performance to emulation systems using ICE-chips, target
pods, and sockets
Supply Voltage: 2.05.25 V
-
Built-in LDO regulator: 2.1 V or 2.5 V
smaRTClockTM
-
Battery switchover circuit
-
Back-up power supply
-
Oscillator failure detect
-
Operates down to 1 V
High-Speed 8051 CPU
-
Pipelined instruction architecture; executes 70% of instructions in 1 or 2
system clocks
-
Up to 50 MIPS throughput with 50 MHz system clock
-
Expanded interrupt handler
Memory
-
2304 bytes data RAM
-
16 kB, 32 kB Flash; in-system programmable in 512-Byte Sectors; Full
Read/Write/Erase Functionality at 2.25 V
DD
-
64 bytes battery-backed RAM
Digital Peripherals
-
24 port I/O; up to 5.25 V tolerance
-
Hardware SMBusTM (I2CTM compatible), SPITM, and UART serial ports
available concurrently
-
16-bit programmable counter array with six capture/compare modules,
WDT
-
4 general-purpose 16-bit counter/timers
Clock Sources
-
Internal Oscillators: 24.5 MHz, 2% Accuracy Supports UART Operation;
Clock Multiplier up to 50 MHz
-
External Oscillator: Crystal, RC, C, or Clock (1 or 2 pin modes)
-
External smaRTClock Oscillator: 32 kHz Crystal or self
resonant oscillator
-
Fast wake up from suspend mode in <1 s
-
Can switch between clock sources on-the-fly
Available in 28-Pin QFN and 32-Pin LQFP
Temperature Range: 40 to +85 C
Small Form Factor
Copyright 2006 by Silicon Laboratories
2.24.2006
Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.
Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders
C8051F41x
2.0 V, 32/16 kB, smaRTClock, 12-Bit ADC MCU
Parameter
Conditions
Min
Typ
Max
Units
Global Characteristics
Supply Input Voltage (V
REGIN
)
Output Current = 1 mA
2.15
--
5.25
V
Core Supply Voltage (V
DD
)
2.0
--
2.75
V
I/O Supply Voltage (V
IO
)
V
IO
< VREGIN
2.0
--
5.25
V
Supply Voltage (V
RTC_BACKUP
)
1.0
--
5.25
V
Supply Current with CPU active
V
DD
= 2.0 V
Clock = 32 kHz
Clock = 1 MHz
Clock = 50 MHz
--
--
--
13
0.3
9.5
--
--
--
A
mA
mA
Supply Current (shutdown)
Chip off; smaRTClock off
Chip off; smaRTClock running V
BAT
= 1.0 V
Chip off; smaRTClock running V
DD
= 1.8 V
--
--
--
<0.1
0.6
0.8
--
--
--
A
A
A
Clock Frequency Range
DC
--
50
MHz
Internal Oscillator
Frequency
24
24.5
25
MHz
D/A Converter
Resolution
12
bits
Differential Nonlinearity
Guaranteed Monotonic
--
--
1
LSB
Settling Time
--
5
--
s
A/D Converters
Resolution
12
bits
Integral Nonlinearity
--
--
1
LSB
Differential Nonlinearity
Guaranteed Monotonic
--
--
1
LSB
Signal-to-Noise Plus Distortion
64
--
--
dB
Throughput Rate
--
--
200
ksps
Selected Electrical Specifications
(T
A
= 40 to +85 C, V
DD
= 2.0 V unless otherwise specified)
Package Information
1
E
D
A2
A
A1
e
A3
E2
R
e
L
B o t t o m V i e w
S i d e V i e w
2
3
4
5
6
7
8
9
10
12
13
14
2 1
2 0
1 9
1 7
1 6
1 5
28
27
26
24
23
22
E2
25
2
D 2
11
1 8
D 2
2
6 x
e
6 x e
D E T A I L 1
D E T A I L 1
A A
BB
C C
DD
b
C8051F41xDK Development Kit
PDF 
ZIP