Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

PLL FOR DTS

DESCRIPTION

The SC9257 is phase-locked loop (PLL) LSIs for digital tuning

systems (DTS) with built in 2 modulus prescalers.

All functions ate controlled through 3 serial bus lines. These LSIs

are used to configure high-performance digital tuning system.

FEATURES

* Optimal for configuring digital tuning systems in high-fi tuners

and car stereos.

* built-in prescalers. Operate at input frequency ranging from

30~150 MHz during FM

input (with 2 modulus prescaler) and

at 0.5~40MHz during AM

input (with 2 modulus prescaler or

direct dividing).

* 16 bit programmable counter, dual parallel output phase

comparator, crystal oscillator and reference counter.

* 3.6MHz, 4.5MHz, 7.2MHz or 10.8MHz crystal oscillators can be

used.

* 15 possible reference frequencies. ( When using 4.5MHz crystal)

* Built-in 20 bit general-purpose counter for such uses as

measuring intermediate frequencies (IF

IN1

and IF

IN2

) and low-

frequency pilot signal cycles (SC

* High-precision (

±0.55~±7.15µs) PLL phase error detection.

* Numerous general-purpose I/O pins for such uses as peripheral

circuit control.

SOP-20-300-1.27

DIP-20-300-2.54

* 4 N-channel open-drain output ports

(OFF withstanding voltage:12V) for such

uses as control signal output.

* Standby mode function (turns off FM, AM

and

amps)

save

current

consumption.

* All functions controlled through 3 serial

bus lines.

* CMOS structure with operating power

supply range of VDD=5.0

±0.5V.

PIN CONFIGURATION

PERIOD

CLOCK

DATA

OT-1

OT-2

OT-3

OT-4

DO2

DO1

I/O-7/SC

I/O - 8/IF

IN1

GND

SC92

I/O - 5/CLK

I/O-6

I/O - 9/IF

IN2

Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

BLOCK DIAGRAM

1/2

2 MODULUS

PERSCALER

4bit SWALLOW

COUNTER

12bit PROGRAMMABLE COUNTER

OSC

CIRCUIT

REFERENCE COUNTER

MAX

24bit SHIFT REGISTER

24bit REGISTER

ADDRESS

DECODER

24bit REGISTER

OUTPUT PORT

20bit BINARY COUNTER

UNIVERSAL COUNTER

CONTROL

POWER ON

RESET

COMPARAT

TRI-STATE

BUFFER

TRI-STATE

BUFFER

UNLOCK

OT4

I/
O

POR

GATE

OT-4

1ms

AMP

PSC

GND

MODE

1ms

OSC

TEST

DO1

DO2

I/O-5/CLK

I/O-6

I/O-9/IF

IN2

I/O-8/IF

IN1

I/O-7/SC

OT-1

OT-2

OT-3

OT-4

DATA

CLOCK

PERIOD

ABSOLUTE MAXIMUM RATINGS

(Ta=25

°C)

Characteristic

Symbol

Value

Unit

Supply Voltage

-0.3~6.0

Input Voltage

-0.3~V

+0.3

N-ch Open-Drain Off withstanding

Voltage

OFF

Power Dissipation

300(200)

Operating Temperature

OPR

-40~85

°C

Storage Temperature

STG

-65~150

°C

Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

ELECTRICAL CHARACTERISTICS

(unless otherwise specified, Ta= -40~85

°C, V

=4.5~5.58V.)

Characteristic

Symbol

Test Condition/Pin

Min

Typ.

Max

Unit

Operating Power Supply Voltage

DD1

PLL operation

(normal operating)

4.5

5.0

5.5

Operating Power Supply Current

DD1

=5.0V,

XT=10.8MHz,

FMIN=150MHz

Stand-by mode

Crystal Oscillation Frequency

Supply Voltage

DD2

PLL OFF

(Operating crystal

oscillation)

4.0

5.0

5.5

Operating Power Supply Current

DD2

=5.0V, XT =10.8MHz

PLL OFF

0.8

1.5

Operating Power Supply Current

DD3

=5.0V, XT stop,

PLL OFF

120

240

µA

Operating frequency range

Crystal Oscillation Frequency

Connect crystal resonator

to XT-

XT terminal

3.6

10.8

MHz

(FM

, FM

)

mode,

=0.2Vp-p

130

MHz

(FM

)

FML

mode, V

=0.3Vp-p

150

MHz

(HF)

HF mode, V

=0.2Vp-p

MHz

(LF)

LF mode, V

=0.2Vp-p

0.5

MHz

IN1

, IF

IN2

=0.2Vp-p

0.1

MHz

=0.7V

, V

=0.3V

square wave input.

100

kHz

Operating input amplitude range

(FM

, FM

)

mode,

=30~130MHz

0.2

-0.5 Vp-p

(FM

)

FML

mode, f

=30~150MHz

0.3

-0.5 Vp-p

(HF)

HF mode, f

=1~40MHz

0.2

-0.5 Vp-p

(LF)

LF mode, f

=0.5~20MHz

0.2

-0.5 Vp-p

IN1

, IF

IN2

=0.1~15MHz

0.2

-0.5 Vp-p

OT1~OT4 N-ch open drain

Output Current

"L" level

OL1

=1.0V

5.0

10.0

OFF-leak Current

OEF

OFF

=12V

---

2.0

µA

(To be continued)

Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

(Continued)

Characteristic

Symbol

Test Condition/Pin

Min

Typ.

Max

Unit

I/O-5~I/O-9, SCIN

"H" level

IH1

0.7V

Input Voltage

"L" level

IL1

0.3V

"H" level

=5V

2.0

Input Current

"L" level

=0V

-2.0

µA

"H" level

OH4

=4.0V (expect SC

)

-2.0

-4.0

Output Current

"L" level

OL4

=1.0V (expect SC

)

2.0

4.0

PERIOD, CLOCK, DATA

"H" level

IH2

0.8V

Input Voltage

"L" level

IL2

0.2V

"H" level

=5V

2.0

Input Current

"L" level

=0V

-2.0

µA

"H" level

OH5

=4.0V (DATA)

-1.0

-3.0

Output Current

"L" level

OL5

=1.0V (DATA)

1.0

3.0

DO1, DO2

"H" level

OH3

=4.0V

-2.0

-4.0

Input Current

"L" level

OL3

=1.0V

2.0

4.0

Tri-State Lead Current

TLH

=5V, V

TLL

=0V

±1.0

µA

"H" level

OH2

=4.0V

-0.1

-0.3

Output Current

"L" level

OL2

=1.0V

0.1

0.3

Input feedback resistance

"H" level

Rf1

FMIN, AMIN, IFIN

(Ta=25

°C)

350

700

1400

Input Feedback

Resistance

"L" level

Rf2

XT-

XT (Ta=25°C)

500

1000

4000

Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

PIN DESCRIPTION

Pin No.

Symbol

Pin name

Description

Circuit diagram

Crystal oscillator

pins

Connects 3.6MHz, 4.5MHz, 7.2MHz or

10.8MHz crystal oscillator to supply

reference frequency and internal clock

PERIOD

Period signal input

CLOCK

Clock signal input

DATA

Serial data

input/output

Serial I/O ports. These pins transfer

data to and from the controller to set

divisions and dividing modes, and to

control the general-purpose counter

and general-purpose I/O ports.

Schmitt

input

DATA

Schmitt input

CLOCK,PERIOD

OT-1

OT-2

OT-3

OT-4

General-purpose

output ports

N channel open drain port pins, for

such uses as control signal output.

These pins are set to the OFF state

when power is turned on.

N-channel open drain

I/O-5/CLK

I/O-6

General-purpose

I/O ports

CMOS structure allows free use of

these ports for input or output. Ports

are set for input when the power is

turned on , I/O-5 can be switched for

use as a system clock output pin.

AMIN

FMIN

Programmable

counter input

These pin input FM and AM band local

oscillator

signals

capacitor

coupling. FMIN and AMIN operate at

low amplitude.

I/O-

9/IFIN2

I/O-

8/IFIN1

General-purpose

I/O ports/General-

purpose

counter

frequency

measurement

input

General-purpose I/O port input/output

pins. Can be switched for use as input

pins to measure general-purpose

counter frequencies. The frequency

measurement function has such uses

as measuring intermediate

frequencies (IF).

These pins feature built-in amps. Data

are input by capacitor coupling. FMIN

and AMIN operate at low amplitude.

(note) Pins are set for input when

power is turned on.

(To be continued)

Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

(Continued)

Pin No.

Symbol

Pin name

Description

Circuit diagram

I/O-

7/SCIN

General-purpose

I/O

ports/

General-purpose

counter

cycle

measurement

input

General-purpose I/O port input/output

pin. Can be switched for use as signal

input pin to measure low-frequency

signal cycles.

(note) This pin is set for input when

power is turned on.

DO1

DO2/OT-4

Phase comparator

output

(General-

purpose

output

ports)

These pins are for phase comparator

tri-state output. DO1 and DO2 are

output in parallel.

GND

Power supply pins Applies 5.0V

±10%

Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

FUNCTION DESCRIPTION

Serial I/O ports

As the block diagram shows, the functions are controlled by setting data in the 48 bits contained in each of the 2

sets of 24 bit registers. Each bit of data in these register is transferred through the serial ports between the

controller and the DATA, CLOCK and PERIOD pins. Each serial transfer consists of a total of 32 bits, with 8

address bits and 24 data bits.

Since all functions are controlled in units of registers, the explanation in this manual focuses on the 8 bit address

and functions of each register.

These registers consist of 24 bits and are selected by an 8 bit address.

A list of the address assignment for each register is given below under register assignments.

Address

Contents of 24 bits

No. of bit

Input

D0H

PLL divisor setting

Reference frequency setting

PLL input and mode setting

Crystal oscillator selection

total 24

Input

D2H

General=purpose counter control (including lock detection bit

control)

I/O port and general-purpose counter switching bits

I/O-5/CLK pin switching bit

DO pin control

Test bit

I/O port control (also used as general-purpose counter input

selection bits)

Output data

total 24

Output

D1H

General-purpose counter numeric data

Not used

total 24

Output

D3H

Lock detection data

I/O port control data

Output data

Input data (undefined during output port selection)

Not used

total 24

When the PERIOD signal falls, the input data are latched in register 1 or register 2 and the function is performed.

When the CLOCK signal falls for 9 time, the output data are latched in parallel in the output registers. The data

are subsequently output serially from the data pin.

Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

P10

P11

P12

P13

P14

P15

MODE

OSC1 OSC2

Programmable counter data

Reference

frequency
code data

Programmable

counter

mode

Crystal
oscillator
selection bits

IF1

IF2

CLK DOHZ

RESET START

TEST

Address=D0H

LSB

Address=D2H

(*2)

Gate

time

select

I/O port

and general-purpose

counter switching bits

CLK

bit

DOHZ

bit

RESET

bit

START

bit

TEST

bit

Also used as

general-
purpose

counter input
selection bits

I/O port control

Output port output data

t
r
e
g
i
s
te

r
s

f10

f11

f12

f13

f14

f15

f16

f17

f18

f19

BUSY

OVER

"0"

General-purpose counter data

ENA-

BLE

LOCK

PE1

PE2

PE3

"0"

Address=D1H

LSB

Address=D3H

I
npu

t
r
e
g
i
s
te

r
s

Not

used

Lock detection data

Not used

I/O port control data

Output data

Input data

When power is turned on, the input registers are set as shown below.

(*1)

Address=D0H

LSB

Address=D2H

p
u
t

re

giste

(*1)

MSB

Note: 1. Data are undefined.

2. Set data to "0" for test bit.

Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

Serial transfer format

The serial transfer format consists of 8 address bits and 24 data bits (Fig. 1). Addresses D0H~D3H are used.

Start

End

t1 t2

9 clock signal fall

(*) (*)

LSB

MSB

8 address bits

24 data bits
(24bit register)

PERIOD

CLOCK

DATA

MSB

LSB

Fig.1

· Serial data transfer

serial data are transferred in sync with the clock signal. In the idlestate, the PERIOD, CLOCK and DATA pin

lines are all set to "H" level. When the period signal is at "L" level, the falling of the clock signal initiates serial

data transfer. Data transfer ceases when the period signal is set to "L" level when the clock signal is at "H" level.

Once serial data transfer has begun, however, no more than 8 falls of the clock signal can occur during the time

the period signal is at "L" level.

Since the receiving side receives the serial data as valid data when the clock signal rises, it is effective for the

sending side to produce output in sync with the clock signal fall.

To receive serial data from the output registers (D1H, D3H), set the serial data output to high impedance after

the 8 bit address is output but before the next clock signal falls.

Data reception subsequently continues until the period signal becomes "L" level; data transfer ends just before

the period signal rises. Therefore, the data pin must have an open-drain or tristate interface.

Note: 1. when power is turned on, some internal circuit have undefined states. To set internal circuit states,

execute a dummy data transfer before performing regular data transfer.

2. times t1~t8 have the following value:

1.0µs

0.3µs

1.0µs

0.3µs

3. Asterisks represent numbers taken from addresses, as in D*H.

Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

Crystal oscillator pins (XT,

)

As fig.2 shows, the clock necessary for internal operation is produced by connecting a crystal oscillator between

capacitors. Use the crystal oscillator selection bit to select an oscillating frequency of 3.6MHz, 4.5MHz, 7.2MHz or

10.8MHz which matches that of the crystal oscillator used.

LSB

MSB

Address D0H

OSC1 OSC2

OSC1

OSC2

OSCILLATOR
FREQUENCY

3.6MHz

4.5MHz

7.2MHz

10.8MHz

Divider

X'tal

C=30pF Typ.

Fig.2

Note: set to 3.6MHz (OSC1="0" and OSC2="0") when power is turned on. The crystal is not oscillating at this time

because the system is in standby mode.

Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

Reference counter

(Reference frequency divider)

The reference counter section consists of a crystal oscillator and a counter.

A crystal oscillator frequency of 3.6MHZ, 7.2MHZ or 10.8MHZ can be selected .A maximum of 15 reference

frequencies can be generated.

1. Setting reference frequency

The reference frequency is set using bits R0~R3.

LSB

MSB

Address D0H

R0 R1 R2 R3

1
0

REFERENCE

FREQUENCY

R0 R1 R2 R3

0.5 KHz

1 KHz

2.5 KHz

3 KHz

3.125 KHz

*3.90654 KHz

5 KHz

6.25 KHz

*7.8125 KHz

REFERENCE

FREQUENCY

9 KHz

10 KHz

12.5 KHz

25 KHz
50 KHz

100 KHz

Standby mode (*1)

(Note 1) Reference frequencies marked with an asterisk "*"can only be generated with a 4.5MHZ crystal oscillator.
(Note 2) (*1)Standby mode

Standby mode occurs when bits R0,R1,R2,and R3 are all set to "1".In standby mode, the programmable

counter stops, and FM, AM and IFIN(when selected IFIN) are set to "amp off" state (pins at "L" level). This

saves current consumption when the radio is turned off. The DO pins become high impedance during

standby mode.

During standby mode, the I/O ports (I/O-5~I/O-9) and output ports (OT1~OT4) can be controlled and the

crystal oscillator can be turned on and off.

(Note 3) The system is set to standby mode when power is turned on. At this time, the crystal oscillator is not

oscillating and the I/O ports are set to input mode.

Programmable counter

The programmable counter section consists of a 1/2 prescaler, a 2 modulus prescaler and a 4bit +12bit

programmable binary counter.

1. Setting programmable counter

16 bits of divisor data and 2 bits, which indicate the dividing mode, are set in the programmable counter.

Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

(1) Setting dividing mode

The FM and MODE bits are used to select the input pin and the dividing mode (pulses wallow mode or

direct dividing mode). There are 4 possible choices, shown in the table below .Select one based on the

frequency band used.

LSB

MSB

Address D0H

FM MODE

MODE FM MODE

DIVIDING MODE

Direct dividing mode

Pulse swallow mode

1/2 + pulse swallow
mode

TYPICAL

RECEIVING BAND

LW,MW,SWL

SWH

INPUT FREQUENCY

RANGE

0.5 ~ 20MHz

1 ~ 40MHz

30 ~ 130MHz
30 ~ 150MHz

30 ~ 130MHz

INPUT

FREQUENCY

(2) Setting divisor

The divisor for the programmable counter is set as binary data in bits P0~P15.

· Pulse swallow mode (16 bits)

LSB

MSB

Address D0H

P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15

Divisor setting range (pulse swallow mode):n=210H~FFFH (528~65535)

(Note) With the 1/2+pulse swallow mode, the actual divisor is twice the programmed value.

· Direct dividing mode (12 bits)

LSB

MSB

Address D0H

P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15

P0 P1 P2 P3

Don't care

Divisor setting range (direct dividing mode):n=10H~FFFH(16~4095)

With the direct dividing mode, data p0~p3 are don't-care and bit p4 is the LSB.

Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

Prescaler and programmable counter circuit configuration

(1) Pulse swallow mode circuit configuration

1/2

2 modulus

prescaler

4bit swallow counter

12bit programmable counter

FM,MODE

Preset

To phase
comparator

PSC

P4-P15

P0-P3

Prescaler section

Fig.3

This circuit consists of a 2 modulus prescaler, a 4 bit swallow counter and a 12bit programmable counter.

During FM

(FM

mode),a 1/2 prescaler is added to the preceding step.

(2) Direct dividing method circuit configuration

12bit program counter

Amp

P4-P15

To phase comparator

Preset

Fig.4

With the direct dividing mode, the prescaler section is bypassed and the 12bit programmable counter is used.

(3) Both FM

and AM

have built-in amps. Data are input by capacitor coupling. FMIN and AMIN operate at

low amplitude.

General-purpose counter

The general-purpose counter is a 20bit counter. It has such uses as counting AM/FM band intermediate

frequencies (IF) and detecting auto-stop signals during auto-search tuning. It also features a cycle measurement

function for such uses as measuring low-frequency pilot signal cycles.

1. General-purpose counter control bits

(1) Bits G0 and G1 ... Used for selecting the general-purpose counter gate time.

Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

G0 G1

LSB

MSB

Address D2H

G0 G1 GATE TIME

CYCLE MEASUREMENT

PULSE

0
0

1
0

1
1

1ms
4ms

16ms
64ms

50 KHz

150 KHz
900 KHz

Crystal oscillator frequency

(2) Bits SC,IF1 and IF2 ...I/O port and general-purpose counter switching bits.

(*) The functions of the following pins are switched by data.

LSB

MSB

Address D2H

sc IF1 IF2

1
0

I/O-7/SC

I/O-7

IF1

1
0

I/O-8/IF

IN1

I/O-8

IF2

1
0

I/O-9/IF

IN2

I/O-9

(3) Bits M7, M8 and M9 ... M7 sets the state for pin I/O-7/SCIN, M8 sets the state for pin I/O-8/IFIN1; M9, for

pin I/O-9/IFIN2.

These operations are valid when bits SC, IF1 and IF2 are all set to 1.

LSB

MSB

Address D2H

PIN STATES (When bits sc, IF1 and IF2 are all set to "1")

IN1

IN2

(*)

INPUT disabled

INPUT enabled

INPUT pulled down

INPUT enabled

INPUT pulled down

INPUT enabled

INPUT pulled down

Note: Bits marked with an asterisk "(*)" are don't care

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Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

(4) Bits f0~f9...The general-purpose counter results can be read in binary from bits f0~f9 of the output register

(D1H).

LSB

MSB

Address D1H

f12

f14

f13

f10 f11

f15 f16 f17 f18 f19

OVER BUSY

"0" "0"

General-purpose counter data

(5) OVER and BUSY bits...Detect the operating state of the general-purpose counter.

Address D1H

MSB

BUSY

OVER

"0" "0"

General-purpose counter
option monitor bit

General-purpose counter
overflow detection bit

General-purpose counter
busy

Counted value in general-
purpose counter

-1

General-purpose counter
ended counting

Counted value in general-
purpose counter

(Overflow state)

BIT DATA = "1"

BIT DATA = "0"

Note: When using the general-purpose counter, before referring to the contents of the general-purpose counter

result bit (f0~f9), confirm that the busy bit is "0" (counting is ended) and the OVER bit is "0" (general-purpose

counter data are normal).

(6) START bit...When the data are set to "1", the general-purpose counter is reset then counting begins.

LSB

MSB

Address D2H

start

Counting continues uninterrupted.

Counting begins after general - purpose counter is reset.

Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

General-purpose counter circuit configuration

The general-purpose counter section consists of input amps, a gate time control circuit and a 20 bit binary counter.

OVER

Amp

IN1

IN2

20bit binary counter

Overflow detection

Gate time control circuit

Cycle measurement
pulse

Gate

(CMOS input)

S C IF1

IF2

START

G1 BUSY

f0-f19

Fig.5

3. General-purpose counter measurement timing

START bit set to "1"

End

PERIOD

IN1

IN2

BUSY bit

Gate

Binary
counter
input

Clock pulse to be measured

START bit set to "1"

End

PERIOD

Reference clock pulse

BUSY
bit

Gate

Binary
counter
input

Frequency measurement timing chart Cycle measurement timing chart

0<T1

0.25(µs), 0<T2 1 (ms)

Note: 1. IFIN1 and IFIN2 input have built-in amps. Data are input by capacitor coupling. FMIN and AMIN operate

at low amplitude.

2. SCIN is configured for CMOS input, so input signals should be logic level.

Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

General-purpose I/O ports

These LSIs feature general-purpose output and I/O ports which are controlled through the serial ports.

Input/output form

port

Input/output configuration

Output port

Dedicated: 4 ports

N channel open-drain output

I/O ports

Dedicated: 1 port,

Maximum: 5 ports

CMOS input/output

1. General-purpose output ports (OT-1~OT-4)

Pins OT-1~OT-4 are general-purpose dedicated output ports. They have such uses as control signal output.

They are configured for N channel open-drain output and have an off withstanding voltage of 12V.

The data set in bits O1~O4 of the input register (D2H) are output in parallel from their correspond dedicated

output port pins OT-1~OT-4.

The data set in bits O1~O4 of the input register (D2H) can also be read from the DATA pins as output register

(D3H) serial data O1~O4.

(1) SC9257

LSB

MSB

Address D2H

O1~O4

PIN OUTPUT STATE

OT-1~OT-4

High impedance

(N channel open drain output =off)

"L" level

(N channel open drain output =on)

(2)output register

... The data set in bits O1~O4 of the input register can read as serial data O1~O4 from the output

LSB

MSB

Address D2H

O3 O4

LSB

MSB

Address D3H

O3 O4

Input
register

Output
register

Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

2. General-purpose I/O ports (I/O-5~I/O-9)

Pins I/O-5~ I/O-9 are general-purpose I/O ports used for control signal input and output. They are configured

for CMOS input and output.

These I/O ports are set for input or output using bits C5, C6 and M7~M9 of the input register (D2H).

Setting bits C5, C6 and M7~M9 to "0" sets these ports for input. Data which are input in parallel from I/O-

5~I/O-9 are latched in the internal register on the ninth fall of the serial clock signal. These data can then be

read as serial data I5~I9 from the DATA pins.

Setting bit C5, C6 and M7~M9 to "1" sets these ports for output.

Data which are set in bits O5~O9 of the input register (D2H) are output in parallel from their corresponding

general-purpose I/O port pin I/O-5~I/O9.

These operations are valid when bits SC, IF1, IF2 and CLK are all set to "0".

(1) SC9257

LSB

MSB

Address D2H

"0"

IF1

"0"

IF2

"0"

CLK

"0"

C5,C6

M7~M9

PIN INPUT /OUTPUT STATE (When SC,IF1 and IF2 are "0")

I/O -5~I/O -9

Input port

Output port

· Setting data for output ports

LSB

MSB

Address D2H

"0"

IF1

"0"

IF2

"0"

CLK

"0"

"1"

O5~O9

PIN OUTPUT STATE (When SC,IF1 and IF2 are "0")

I/O -5~I/O -9

"L"level

"H"level

Note: On the SC9257, pins I/O-7~I/O-9 also serve as general-purpose counter input pins. Therefore, bits SC, IF1

and IF2 of the input register (D2H) must be set to "0" when pins I/O-7~ I/O-9 are used for I/O ports. Since

pin I/O-5 also serves as the CLK pin, the CLK bit of the input register (D2H) must be set to "0" when pin I/O-

5 is used as an I/O port.

Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

(2) Output register... Data which ate set in bits C5, C6 and M7~M9 of the input register (D2H) can be read as serial

data C5, C6 and M7~M9 from the output register (D3H).

LSB

MSB

Address D2H

LSB

MSB

Address D3H

Input register

Output register

C5 C6 M7 M8 M9

Data which are input in parallel from pins I/O 5~I/O-9 can be read as serial data I5~I9 from the output register

(D3H)

LSB

MSB

Address D3H

Input register

I/O-7

I/O-5

I/O-6

I/O-8

I/O-9

Input data

INPUT PORTS
(I/O-5 ~ I/O-9)

BIT DATA
(15-19)

"L" level

"H" level

Note: 1. When pins I/O-5~I/O-9 are used for output, the data in I5~I9 of the output register(D3H) are undefined..

2.When power is turned on, input register (D2H) I/O port control bits C5, C6 and M7~M9 and output data

bits O5~O9 are set to "0". General-purpose I/O ports are set as input ports. Pins which are used both as

general-purpose I/O ports and for general-purpose counter input are set for I/O port input. The output

state of general-purpose output ports is set to high impedance (N channel open drain output =off).

A typical example of data setting for general-purpose counter and I/O port use is shown below.

LSB

MSB

Address D2H

"0"

IF1

"1"

IF2

"1"

"0"

PIN NAME

Pin function

Pin input/
output state

I/O-7/SC

I/O-7

Output port

Input

enable

IN1

I/O-8/IF

IN1

I/O-9/IF

IN2

Input pulled

down

As shown above, the pins can be switched as necessary to enable use as an I/O port or general-purpose counter.

Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

Phase comparator

The phase comparator outputs the phase error after comparing the phase difference of the reference frequency

signal supplied by the reference counter and the divided output from the programmable counter. The frequencies

and phase differences of these two signals are then equalized by passing them through low-pass filters. These

signals then control the VCO.

The filter constants can be customized for FM and AM bands since the signals are output in parallel from the

phase comparator then pass through the two tristate buffer pins, DO1 and DO2.

phase

comparator

VCO

Programmable
counter output

Reference frequency signal

R
S

DO1

DO2

L.P.F

Fig.7

Low level

floating

High level

DO Output Timing Chart

Fig.8

Tr1

Tr2

To VCO varactor diode

Typical low-pass filter constants
(FM band reference values)
C=0.33

R1=10K¡
R2=8.2K¡
R3=330¡
R

=10K¡

Standard
Tr1:2SC1815
Tr2:2SK246

Typical Active Low-Pass Filter Circuit

Fig.9

The figures above show the DO output timing chart and a typical active low-pass filter circuit featuring a

Darlington connection between the FET and transistor.

The filter circuit shown above is just one example. Actual circuits should be designed based on the band

composition and the properties desired from the system.

Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

Lock detection bits

The lock detection bits detect locked states in the PLL system. These systems have an unlock detection bit (unlock

bit) which is used to detect, using the reference frequency cycle, the phase difference between the reference

frequency and divided output of programmable counter. These systems also have phase error detection bits ( bits

PE1~PE3), which are capable of more precise detection (

±0.55µs~±7.15µs).

Unlock detection bit (UNLOCK)

This bit detects, using the reference frequency cycle, the phase difference between the reference

frequency and the divided output of the programmable counter. When there is no lock, that is, when the

reference frequency and the divided output of the programmable counter are not the same, unlock F/F is set.

Unlock F/F is reset every time the input register (D2H) unlock reset bit (RESET) is set to "1". After unlock

F/F has been reset in this way, locked state can detected by checking the unlock detection bit (UNLOCK) of

the output register (D3H). After unlock F/F has been reset, the unlock detection bit must be checked after a

time interval exceeding that of the reference frequency cycle has elapsed. This is because the reference

frequency cycle inputs the lock detection strobe to unlock F/F. If the time interval is short, the correct locked

state cannot be detected. Therefore, the output register (D3H) has a lock enable bit (ENABLE). This bit is

reset every time the input register (D2H) reset bit is set to "1", and set to "1" through the lock detection timing.

That is, the locked state is correctly detected when the lock enable bit (ENABLE) is "1".

"H" level

High impedance

"L" level

Reference frequency

Programmable

counter output

DO output

Phase comparator

Lock detection strobe

Unlock is reset (RESET)

Unlock F/F (UNLOCK)

Lock enable (ENABLE)

Phase error detection

Counts phase difference.

Fig.10

Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

LSB

MSB

Address D2H

LSB

MSB

Address D3H

Input register

Output register

ENA-

BLE

LOCK

RESET

Setting data to "1" resets unlock detection bit and lock enable bit.

PLL lock detection enabled
PLL lock detection in waiting
state

PLL in unlocked state(*)

PLL in locked state

Note: The asterisk (*) indicates an error state of over 180° phase difference relative to the reference frequency

2. Phase error detection bits (PE1~PE3)

The unlock bit detects, using the reference frequency cycle, the phase difference between the reference

frequency and the divided output of the programmable counter. The phase error detection bits (bits PE1~PE3)

are capable of precise phase error detection of

±0.55µs~±7.15µs using the reference frequency cycle.( If the

UNLOCK bit is set to "1" and the phase difference relative to the reference frequency is over 180

°, bits

PE1~PE3 cannot correctly detect the phase error. Therefore, bits PE1~PE3 are normally used when the

UNLOCK bit is set to "0".) Bits PE1~PE3 detect phase error normally when the phase difference is -180

°~180°

relative to the reference frequency cycle.

LSB

MSB

Address D3H

PE1

PE2 PE3

PE1 PE2 PE3

PHASE ERROR (PE)

PE<f0.55s

f0.55s PE<f1.65s

f1.65s PE<f2.75s

f2.75s PE<f3.85s
f3.85s PE<f4.95s
f4.95s PE<f6.05s
f6.05s PE<f7.15s
f7.15s PE

The phase error data can be read from the output register (D3H) as serial data PE1~PE3.

Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

Following is a typical lock detection operation. It shows the operation flow from locked state to frequency change

with a phase error greater than

±6.05µs.

Frequency change

WAIT

Phase error detection start

Reset bit 1

WAIT

Time interval exceeding that of

reference frequcncy cycle

ENABLE=1?

UNLOCK bit =0?

Check phase error

detection bits PE1,PE2

and PE3

PE1=1,PE2=0,PE3=1?

Phase error=greater than

f4.95s

and less than

f6.05s

YES

(Lock)

YES

NO (UNLOCK)

Fig.11

Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

Other control bits

1. CLK and C5 bits...Control bits which switch the function for the I/O-5/CLK pin.

(1) The CLK bit controls switching of the I/O-5/CLK pin and CLK pin.

When bits R0~R3 of the input register (D0H) are all set to "1" (standby mode)

LSB

MSB

Address D2H

CLK

I/O-5/ CLK PIN STATE

Input port

Output port

System clock off

(CLK at "L" level)

I/O port

CLK output

CRYSTAL OSCILLATOR

CIRCUIT STATE

Oscillator circuit off

Oscillator circuit on

System clock output(*)

When one of bit R0~R3 of the input register (D0H) is set to "0" (not standby mode)

LSB

MSB

Address D2H

CLK

I/O-5/ CLK PIN STATE

Input port

Output port

I/O port

CLK output

CRYSTAL OSCILLATOR

CIRCUIT STATE

Oscillator circuit on

System clock output(*)

Note: The system clock output marked with an asterisk "(*)" refers to output of the crystal oscillator

frequencies listed below.

Crystal oscillator (MHz)

System clock (kHz)

Duty (%)

10.8

7.2

3.6

600

4.2

750

Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

ELECTRICAL CHARACTERISTICS CURVE

1414

1000

500

200
106

2
1

0.1

0.2

0.5

50 100

AMIN(LF) Frequency Characteristics

INP

T

LEVE

L

(m

Vrms

)

INPUT FREQUENCY (MHz)

1414

1000

500

200
106

2
1

0.1

0.2

0.5 1

50 100

AMIN(HF) Frequency Characteristics

I
NPUT LEV

EL (mVrm

s
)

INPUT FREQUENCY (MHz)

1414

1000

500

200
106

2
1

FMIN(LF) Frequency Characteristics

INP

T

LEVE

L

(m

Vrms

)

INPUT FREQUENCY (MHz)

40 60

80 100 120 140 160 180 200

1414

1000

500

200
106

2
1

IFIN(LF) Frequency Characteristics

I
NPUT LEV

EL (mVrm

s
)

INPUT FREQUENCY (MHz)

0.05 0.1 0.2 0.5 1

5 10

15 20

(Note)

Operating Guarantee Range

=4.5~5.5v,Ta = -40 ~ 85

Standard Characteristics(V

= 5V,Ta =25

(Note)

Operating Guarantee Range
(V

=4.5~5.5v,Ta = -40 ~ 85

:FM

Standard Characteristics(V

= 5V,Ta =25

Silan
Semiconductors

SC9257

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0 2001.10.18

APPLICATION CIRCUIT

SC9

Micro-
Controller

PERIOD

CLOCK

DATA

'tal

AM
VCO

5Vtyp.

Varator Diode

signal

0.001

0.01

4.7

0.1

I/O Port

12V max.

Output Port

0.01

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ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: SC9257