1
Rev. 04/24/03
SP6128A Low Voltage, Synchronous Buck Controller Copyright 2003 Sipex Corporation
SP6128A
Optimized for Single Supply, 3V - 5.5V Applications
High Efficiency: Greater Than 95% Possible
Discontinuous Startup for Precharged Output
Accurate Fixed 300kHz Frequency Operation
Fast Transient Response
Internal Soft Start Circuit
Accurate 0.8V Reference Allows Low Output
Voltages
Resistor Programmable Output Voltage
Resistor Programmable Overcurrent Threshold
Loss-less Current Limit with High Side R
DS(ON)
Sensing
Hiccup Mode Current Limit Protection
Dual N-Channel MOSFET Synchronous Driver
Quiescent Current: 500
A, 30
A in Shutdown
14 pin TSSOP
Low Voltage Synchronous Buck Controller
Ideal for 2A to 10A, Small Footprint, DC-DC Power Converters
APPLICATIONS
DSP
Microprocessor Core
I/O & Logic
Industrial Control
Distributed Power
Low Voltage Power
DESCRIPTION
The SP6128A is a fixed frequency, voltage mode, synchronous PWM controller designed to
work from a single 5V or 3.3V input supply, providing excellent AC and DC regulation for high
efficiency power conversion. Requiring only few external components, the SP6128A pack-
aged in an 14-pin TSSOP, is especially suited for low voltage applications where cost, small
size and high efficiency are critical. The operating frequency is internally set to 300kHz,
allowing small inductor values and minimizing PC board space. The SP6128A drives two
N-channel power MOSFETs for improved efficiency and includes an accurate 0.8V reference
for low output voltage applications.
1
2
3
4
5
6
7
GL
PV
CC
V
CC
PGND
GND
COMP
NC
14
13
12
11
10
9
8
BST
GH
SWN
I
SET
V
FB
NC
NC
SP6128A
14 pin TSSOP
BST
SWN
V
CC
V
FB
COMP
GH
GL
GND
C1
2.2
F
SP6128A
Q1
FDS6690A
C4
1
F
D2
STPS2L25U
PV
CC
PGND
NC
I
SET
NC
NC
R1
5
1
2
3
4
5
6
7
14
13
12
11
10
9
8
C3
68pF
R2
7.87k
C2 4.7n
R3
8k
D1
MBR0530
L1
1.0
H
Q2
FDS6690A
C12
4.7nF
R4
1.7k
R5
800
C8
10
F
C9
10
F
C10
10
F
C11
470
F
2.5V/10A
C5
10
F
C6
10
F
C7
10
F
3V to 5.5V
2
Rev. 04/24/03
SP6128A Low Voltage, Synchronous Buck Controller Copyright 2003 Sipex Corporation
PARAMETER
MIN
TYP MAX
UNITS
CONDITIONS
QUIESCENT CURRENT
V
CC
Supply Current
0.5
1.0
mA
No Switching
PV
CC
Supply Current
1
20
A
No Switching, GH = Low
V
CC
Supply Current(Disabled)
30
60
A
COMP=0V
PV
CC
Supply Current (Disabled)
1
20
A
COMP=0V
ERROR AMPLIFIER
Error Amplifier Transconductance
0.6
ms
COMP Sink Current
10
35
65
A
V
FB
= 0.9V, COMP = 0.9V, No Faults
COMP Source Current
10
35
65
A
V
FB
= 0.7V, COMP = 2V
COMP Output Impedance
3
M
V
FB
Input Bias Current
130
nA
Error Amplifier Reference
0.788 0.8
0.812
V
Trimmed with Error Amp in Unity Gain
OSCILLATOR & DELAY PATH
Internal Oscillator Frequency
270
300
330
kHz
Maximum Controlled Duty Cycle
90
%
Loop in control - 100% DC Possible
Minimum Duty Cycle
0
%
Comp=0.7V
Minimum GH Pulse Width
150
250
ns
PV
CC
> 4.5V, Ramp up COMP voltage
until GH starts switching
CURRENT LIMIT
I
SET
Pin Sink Current
10
12.5
15
A
Temp = 25
C
I
SET
Current Temperature Coefficient
3400
ppm/
C
Current Limit Time Constant
15
s
Overcurrent Comparator
100
125
150
mV
VI
SET
- V
SWN
, Temp = 25
C
Threshold Voltage
Threshold Voltage Temperature
3400
ppm/
C
Coefficient
ELECTRICAL SPECIFICATIONS
Unless otherwise specified: -40
C < T
A
< 85
C, 3.0V < PV
CC
= V
CC
< 5.5V, C
COMP
= 22nF, CGH = CGL = 3.3nF, V
FB
= 0.8V,
SWN = GND = 0V, typical value for design guideline only.
V
CC,
PV
CC .........................................................................................
7V
BST .................................................................. 13.2V
BST-SWN .............................................................. 7V
SWN ............................................................ -1V to 7V
GH ............................................... -0.3V to BST +0.3V
GH-SWN ............................................................... 7V
All other pins ................................ -0.3V to V
CC
+ 0.3V
Peak Output Current < 10
s
GH,GL .................................................................. 2A
Storage Temperature ........................ -65
C to 150
C
Power Dissipation .............................................. 1.3W
Junction Temperature, T
J
................................ 125
C
Lead Temperature (Soldering, 10 sec) ............ 300
C
ESD Rating. ................................................ 2kV HBM
Thermal Resistance
JC
............................. 31.7
C/W
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability.
ABSOLUTE MAXIMUM RATINGS
3
Rev. 04/24/03
SP6128A Low Voltage, Synchronous Buck Controller Copyright 2003 Sipex Corporation
PIN DESCRIPTION
PIN N0.
PIN NAME
DESCRIPTION
1
GL
High current driver output for the low side MOSFET switch. It is always low if GH is high.
GL swings from PGND to PV
CC
.
2
PV
CC
Positive input supply for the low side gate driver. It's recommended to tie the PV
CC
to the
V
CC
pin.
3
V
CC
Positive input supply for the logic circuitry. Properly bypass this pin to GND with a low ESL/
ESR ceramic capacitor or RC filter.
4
PGND
Power ground pin.
5
GND
Signal ground pin.
6
COMP
Output of the Error Amplifier. It is internally connected to the inverting input of the PWM
comparator. A lead-lag network is typically connected to the COMP pin to compensate the
feedback loop in order to optimize the dynamic performance of the voltage mode control
loop. Sleep mode can be invoked by pulling the COMP pin below 0.3V with an external
open-drain or open-collector transistor. An internal 5
A pull-up ensures start-up.
7, 8, 9
NC
No connect.
10
V
FB
Feedback Voltage Pin. It is the inverting input of the Error Amplifier and serves as the
output voltage feedback point for the Buck converter. The output voltage is sensed and
can be adjusted through an external resistor divider.
11
I
SET
Overcurrent program pin. A resistor programs the overcurrent threshold. The overcurrent
comparator sets the fault latch and terminates gate pulses when VI
SET
> V
SWN
and the high
side MOSFET is turned on. This prevents excessive power dissipation in the external
power MOSFETs during an overload condition. An internal delay circuit prevents false
shutdowns that might otherwise occur during very short, mild overload conditions,due to
load transients.
12
SWN
Lower supply rail for the GH high-side gate driver. It also connects to the Current Limit
comparator. Connect this pin to the switching node at the junction between the two
external power MOSFET transistors. This pin monitors the voltage drop across the R
DS(ON)
of the high side N-channel MOSFET while it is conducting.
13
GH
High current driver output for the high side MOSFET switch. It is always low if GL is high or
during a fault. GH swings from SWN to BST.
14
BST
High side driver supply pin. Connect BST to the external boost diode and capacitor as
shown in the application schematic on page 1.
ELECTRICAL SPECIFICATIONS: continued
Unless otherwise specified: -40
C < T
A
< 85
C, 3.0V < PV
CC
= V
CC
< 5.5V, C
COMP
= 22nF, CGH = CGL = 3.3nF, V
FB
= 0.8V,
SWN = GND = 0V, typical value for design guideline only.
PARAMETER
MIN
TYP
MAX
UNITS CONDITIONS
SOFT START, SHUTDOWN, UVLO
Internal Soft Start Slew Rate
0.1
0.3
0.6
V/ms
COMP pin, on transition from
shutdown
COMP Discharge Current
183
A
COMP = 0.5V, Fault Initiated
COMP Clamp Voltage
0.55
0.65
0.75
V
V
FB
= 0.9V
COMP Clamp Current
10
30
65
A
COMP = 0.5V, V
FB
= 0.9V
Shutdown Threshold Voltage
0.29
0.34
0.39
V
Measured at COMP Pin
Shutdown Input Pull-up Current
2
5
10
A
COMP = 0.2V, Measured at COMP pin
V
CC
Start Threshold
2.63
2.8
2.95
V
V
CC
Stop Threshold
2.47
2.7
2.9
V
GATE DRIVERS
GH Rise Time
60
110
ns
PV
CC
> 4.5V
GH Fall Time
60
110
ns
PV
CC
> 4.5V
GL Rise Time
60
110
ns
PV
CC
> 4.5V
GL Fall Time
60
110
ns
PV
CC
> 4.5V
GH to GL Non-Overlap Time
0
100
140
ns
PV
CC
> 4.5V, measured at 2volt threshold
GL to GH Non-Overlap Time
0
100
140
ns
PV
CC
> 4.5V, measured at 2volt threshold
4
Rev. 04/24/03
SP6128A Low Voltage, Synchronous Buck Controller Copyright 2003 Sipex Corporation
General Overview
The SP6128A is a constant frequency, voltage
mode, synchronous PWM controller designed
for low voltage, DC/DC step down converters.
It is intended to provide complete control for a
high power, high efficiency, precisely regulated
output voltage from a highly integrated 14-pin
solution.
The internal free-running oscillator accurately
sets the PWM frequency at 300kHz without
requiring any external elements and allows the
use of physically small, low value external com-
ponents without compromising performance. A
transconductance amplifier is used for the error
amplifier, which compares an attenuated sample
of the output voltage with a precision, 0.8V
reference voltage. The output of the error ampli-
fier (COMP), is compared to a 0.75V peak-to-
peak ramp waveform to provide PWM control.
The COMP pin provides access to the output of
the error amplifier and allows the use of external
components to stabilize the voltage loop.
High efficiency is obtained through the use of
synchronous rectification. Synchronous regula-
tors replace the catch diode in the standard buck
converter with a low R
DS(ON)
N-channel
MOSFET switch allowing for significant ef-
ficiency improvements. The SP6128A in-
cludes two fast MOSFET drivers with inter-
nal non-overlap circuitry and drives a pair of
N-channel power transistors. The SP6128A
includes an internal 0.27V/ms soft-start cir-
cuit that provides controlled ramp up of the
output voltage, preventing overshoot and in-
rush current at power up.
Current limiting is implemented by monitoring
the voltage drop across the R
DS(ON)
of the high
side N-channel MOSFET while it is conducting,
thereby eliminating the need for an external
sense resistor. The overcurrent threshold can be
programmed by a single resistor.
FUNCTIONAL DIAGRAM
+
-
-
+
-
+
Synchronous
Driver
PWM
Logic
S
Q
R
Reset
Dominant
R
Q
S
V
CC
SWN
Reference
6
10
0.8V
UVLO
FAULT
SWN
12
1 GL
13
DRIVER ENABLE
RESET
Dominant
PWM COMP
FAULT
GH
GH
5
A
350mV
SHUTDOWN
GM
ERROR
AMP
Over Current
2.8V ON
2.7V OFF
COMP
SHUTDOWN
F = 300kHz
750mV RAMP
0.27V/ms
SOFTSTART
V
FB
COMP
3
-
+
-
+
1V
+
-
GND
5
14 BST
I
SET
15
A
2
PV
CC
11
PGND
4
OPERATION
5
Rev. 04/24/03
SP6128A Low Voltage, Synchronous Buck Controller Copyright 2003 Sipex Corporation
When the overcurrent threshold is exceeded, the
overcurrent comparator sets the fault latch and
terminates the output pulses. The controller
stops switching and goes through a hiccup se-
quence. This prevents excessive power dissipa-
tion in the external power MOSFETs during an
overload condition. An internal delay circuit
prevents that very short and mild overload con-
ditions, that could occur during a load transient,
activate the current limit circuit.
A low power sleep mode can be invoked in the
SP6128A by externally forcing the COMP pin
below 0.3V. Quiescent supply current in sleep
mode is typically less than 30
A. An internal
5
A pull-up current at the COMP pin brings the
SP6128A out of shutdown mode.
An internal 0.8V 1.5% reference allows out-
put voltage adjustment for low voltage appli-
cations.
The SP6128A also includes an accurate under-
voltage lockout that shuts down the controller
when the input voltage falls below 2.7V. Output
overvoltage protection is achieved by turning
off the high side switch and turning on the low
side N-channel MOSFET 100% of the time.
Enable
Low quiescent mode or "Sleep Mode" is initi-
ated by pulling the COMP pin below 0.3V with
an external open-drain or open-collector tran-
sistor. Supply current is reduced to 30
A (typi-
cal) in shutdown. On power-up, assuming that
V
CC
has exceeded the UVLO start threshold
(2.8V), an internal 5
A pull-up current at the
COMP pin brings the SP6128A out of shutdown
mode and ensures start-up. During normal oper-
ating conditions and in absence of a fault, an
internal clamp prevents the COMP pin from
swinging below 0.6V. This guarantees that dur-
ing mild transient conditions, due either to line
or load variations, the SP6128A does not enter
shutdown unless it is externally activated.
During Sleep Mode, the high side and low side
MOSFETS are turned off and the internal soft
start voltage is held low.
UVLO
Assuming that there is not shutdown condition
present, then the voltage on the V
CC
pin deter-
mines operation of the SP6128A. As V
CC
rises,
the UVLO block monitors V
CC
and keeps the
high side and low side MOSFETS off and the
internal SS voltage low until V
CC
reaches 2.8V.
If no faults are present, the SP6128A will ini-
tiate a soft start when V
CC
exceeds 2.8 V.
Hysteresis (about 100mV) in the UVLO com-
parator provides noise immunity at start-up.
Soft Start
Soft start is required on step-down controllers to
prevent excess inrush current through the power
train during start-up. Typically this is managed
by sourcing a controlled current into a timing
capacitor and then using the voltage across this
capacitor to slowly ramp up either the error amp
reference or the error amp output (COMP). The
control loop creates narrow width driver pulses
while the output voltage is low and allows these
pulses to increase to their steady-state duty
cycle as the output voltage increases to its regu-
lated value. As a result of controlling the induc-
tor volt*second product during startup, inrush
current is also controlled.
In the SP6128A the duration of the soft-start is
controlled by an internal timing circuit that
provides a 0.3V/mS slew-rate, which is used
during startup and overcurrent to set the hiccup
time. The SP6128A implements soft-start by
ramping up the error amplifier reference voltage
providing a controlled slew-rate of the output
voltage, thereby preventing overshoot and in-
rush current at power up.
The presence of the output capacitor creates extra
current draw during startup. Simply stated, dV
OUT
/
dt requires an average sustained current in the
output capacitor and this current must be consid-
ered while calculating peak inrush current and
over current thresholds. An approximate expres-
sion to determine the excess inrush current due to
the dV
OUT
/dt of the output capacitor C
OUT
is:
Iinrush = C
OUT
x
(0.27 V/ms)
x
V
OUT
0.8V
OPERATION: continued
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