SP8056
Rev 1 (9-17-03): SP8056 High Speed 10 Channel PDIC
SIPEX RESERVES THE RIGHT TO MAKE CHANGES TO THIS DATASHEET. CALL FOR UPDATES: 1-978-667-8700.
SIPEX CONFIDENTIAL, PRELIMINARY & PROPRIETARY. DO NOT DISTRIBUTE
OR COPY
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1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Vs
Gain 2
Gain 1
Gain 3
EF
SAD
GH
SBC
Vcc
RF+
RF-
C
B
D
A
GND
SP8056
16-Pin
OPLGA
FEATURES
Dual wavelength 650 and 780nm
Data channel bandwidth 130 MHz
Eleven selectable gain settings covering 42dB range
Group delay error less than 1ns up to 72MHz
Slew rate up to 400V/us
Small 16-pin OPLGA package
APPLICATION
DVD-RAM with CD-RW capability
DVD-RW with CD-RW capability
Writable data storage optical devices
GENERAL DESCRIPTION
The SP8056 is a ten channel photo detector IC (PDIC) specially designed for high speed DVD-
RAM and DVD-RW applications and can operate at wavelength of 650 and 780 nm. The ten
channels consist of four high speed channels (A, B, C, and D), two average speed channels (EF
and GH), two slow channels (SAD and SBC), and two channels with paraphase output (RF+
and RF-). The EF and GH channels output is sum of signals from E + F and G + H sensors
respectively. The RF channels output is sum of A + B + C + D + EF + GH channels with
identical weights. Low noise operation enables data recovery at very low signal levels.
The SP8056 has three logic inputs for gain control, one of them operating as TTL compatible
(Gain 1), and two other operating as three state logic inputs (Gain 2 and Gain 3). The allowable
14 logic states are used to select 11 gain factors, an adjustment mode, and a sleep mode (see
table 4). Adjustment mode is used to adjust the position of the PDIC with respect to the laser
beam. In this mode each of the sensors E, F, G, and H is connected to the input of EF, GH,
SAD, and SBC channels respectively instead of the standard configuration.
In sleep mode all channels are in tri-state condition.
The SP8056 is manufactured with an advanced 10GHz BICMOS technology.
High Speed 10-channel Photo Detector IC
SP8056
Rev 1 (9-17-03): SP8056 High Speed 10 Channel PDIC
SIPEX RESERVES THE RIGHT TO MAKE CHANGES TO THIS DATASHEET. CALL FOR UPDATES: 1-978-667-8700.
SIPEX CONFIDENTIAL, PRELIMINARY & PROPRIETARY. DO NOT DISTRIBUTE
OR COPY
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GAIN MODE SELECTION
Gain Mode
Gain Factor
Logic level
Gain1 Gain2 Gain3
Low Low DC
RW-read
128
Low Z Low
Low Z High
R-read
32
Low High DC
RW-write(speed 1)
16
High
Low
High
RW-write(speed 2)
12
High
Low
Z
RW-write(speed 3)
8
High
Low
Low
RW-write(speed 4)
6
High
Z
Low
R-write(speed 1)
4
High
Z
High
R-write(speed 2)
3
High
High
Z
R-write(speed 3)
2
High
High
High
R-write(speed 4)
1
High
High
Low
Adjustment mode
32
High
Z
Z
Sleep mode (output=High-Z)
Low
Z
Z
Note: DC - Don't Care, Z - High impedance
PIN ASSIGNMENTS
Pin #
Pin Name
Pin Function
1
Vs
Reference voltage. Bypass to GND with ceramic capacitor 0.1uF
2
Gain 2
Logic input of Gain Controller. Allows three states low, high, and floating - Z
3
Gain 1
Logic input of Gain Controller. Allows two states low and high
4
Gain 3
Logic input of Gain Controller. Allows three states low, high and floating - Z
5
EF
Output of EF channel (sum of E + F sensor signals). In Adjustment mode it is output
of E channel
6
SAD
Output of SAD channel. In Adjustment mode it is output of F channel
7
GH
Output of GH channel (sum of G + H sensor signals). In Adjustment mode it is output
of G channel
8
SBC
Output of SBC channel. In Adjustment mode it is output of H channel
9 GND Ground
pin
10
A
Output of A channel
11
D
Output of D channel
12
B
Output of B channel
13
C
Output of C channel
14
RF-
Output of RF- channel. RF- = - (A + B +C + D + EF + GH). In Adjustment mode RF-
= - (A + B + C + D + E + F + G + H)
15
RF+
Output of RF+ channel. RF+ = A + B + C + D + EF + GH. In Adjustment mode RF+ =
A + B + C + D + E + F + G + H
16
Vcc
Supply voltage. Bypass to GND with ceramic capacitor 0.1uF
BOARD LAYOUT AND GROUNDING
To obtain the best performance from the SP8056, a printed circuit board with ground plane is
required. High quality, low series resistance ceramic 0.1uF bypass capacitors should be used at
the Vcc and Vs pins (pins 1 and 16). These capacitors must be located as close to the pins as
possible. The traces connecting the pins and the bypassing capacitors must be kept short and
should be made as wide as possible.
SP8056
Rev 1 (9-17-03): SP8056 High Speed 10 Channel PDIC
SIPEX RESERVES THE RIGHT TO MAKE CHANGES TO THIS DATASHEET. CALL FOR UPDATES: 1-978-667-8700.
SIPEX CONFIDENTIAL, PRELIMINARY & PROPRIETARY. DO NOT DISTRIBUTE
OR COPY
page
3
of
4
OPLGA 16L PACKAGE DIMENSIONS
SP8056
Rev 1 (9-17-03): SP8056 High Speed 10 Channel PDIC
SIPEX RESERVES THE RIGHT TO MAKE CHANGES TO THIS DATASHEET. CALL FOR UPDATES: 1-978-667-8700.
SIPEX CONFIDENTIAL, PRELIMINARY & PROPRIETARY. DO NOT DISTRIBUTE
OR COPY
page
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of
4
ORDERING INFORMATION
Part number
Temperature range
Package Type
SP8056EG -30
+
80
0
C
16-pin Optical Land Grid Array
(OPLGA)
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