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Электронный компонент: XD010-14S

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Sirenza Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user's own risk. Prices and specifications are subject to change without
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for use in life-support devices and/or systems.
Copyright 2003 Sirenza Microdevices, Inc. All worldwide rights reserved.
522 Almanor Ave., Sunnyvale, CA 94085
Phone: (800) SMI-MMIC
http://www.sirenza.com
1
EDS-102936 Rev B
Prelimi nary
The XD010-14S-D4F 10W power module is a
2-stage Class A/AB amplifier module for use in
the driver stages of GSM and EDGE RF power
amplifiers. The matching structures are
designed to minimize the EVM at typical oper-
ating levels. This unit operates from a single
voltage and has internal temperature compen-
sation of the bias voltage to ensure stable per-
formance over the full temperature range.
Key Specifications
Parameter
Description: Test Conditions
Z
in
= Z
out
= 50
, V
DD
= 28.0V, I
DD1
= 230mA,
I
DD2
= 158mA, T
Flange
= 25C
Unit
Min.
Typ.
Max.
Frequency
Frequency of Operation
MHz
925
960
P
1dB
Output Power at 1dB Compression (single tone)
W
15
Gain
Gain at 6W Output Power (CW)
dB
32
Gain Flatness
Peak to Peak Gain Variation
dB
0.4
IRL
Input Return Loss 6W CW
dB
18
Efficiency
Drain Efficiency at 12W CW
%
31
Linearity
RMS EVM at 8W EDGE output
%
2.5
Peak EVM at 8W EDGE output
%
6.7
3
rd
Order IMD at 12W PEP (Two Tone)
dBc
-35
Delay
Signal Delay from Pin 1 to Pin 4
nS
2.5
Phase Linearity
Deviation from Linear Phase (Peak to Peak)
Deg
0.5
R
TH, j-l
Thermal Resistance Stage 1 (Junction to Case)
C/W
11
R
TH, j-2
Thermal Resistance Stage 2 (Junction to Case)
C/W
4
Functional Block Diagram
XD010-14S-D4F
925-960 MHz Class A/AB
10W Power Amplifier Module
Product Features
Applications
50 W RF impedance
15W Output P
1dB
Single Voltage Operation
High Gain: 32 dB Typical
High Peak Power for Lower BER
Advanced, XeMOS II LDMOS FETS
Ultra-low EVM
Base Station PA driver
Repeater
GSM / EDGE
Product Description
Temperature
Compensation
28 V
DC
2
Case Flange = Ground
RF in
28 V
1
DC
RF out
3
4
522 Almanor Ave., Sunnyvale, CA 94085
Phone: (800) SMI-MMIC
http://www.sirenza.com
2
EDS-102936 Rev B
Preliminary
XD010-14S-D4F 925-960 MHz 10W Amp
Pin Out Description
Pin #
Function
Description
1
RF Input
Module RF input. This pin is internally connected to DC ground. Do not apply DC voltages to the RF leads.
Care must be taken to protect against video transients that may damage the active devices.
2
V
DD1
This is the bias feed for the 1
st
stage of the amplifier module.
3
V
DD2
This is the bias feed for the 2
nd
stage of the amplifier module. The gate bias is temperature compensated to
maintain constant current over the operating temperature range. See Note 1.
4
RF Output
Module RF output. This pin is internally connected to DC ground. Do not apply DC voltages to the RF leads.
Care must be taken to protect against video transients that may damage the active devices.
Flange
Gnd
Exposed area on the bottom side of the package needs to be mechanically attached to the ground plane of the
board for optimum thermal and RF performance. See mounting instructions for recommendation.
Simplified Device Schematic
Absolute Maximum Ratings
Parameters
Value
Unit
1
st
Stage Bias Voltage (V
DD1
)
35
V
2
nd
Stage Bias Voltage (V
DD2
)
35
V
RF Input Power
+20
dBm
Load Impedance for Continuous Operation
Without Damage
5:1
VSWR
Output Device Channel Temperature
+200
C
Lead Temperature During Solder Reflow
+210
C
Operating Temperature Range
-20 to +90
C
Storage Temperature Range
-40 to +100
C
Operation of this device beyond any one of these limits may
cause permanent damage. For reliable continuous operation see
typical setup values specified in the table on page one.
Caution: ESD Sensitive
Appropriate precaution in handling, packaging
and testing devices must be observed.
Note 1:
The internal generated gate voltage is ther-
mally compensated to maintain constant qui-
escent current over the temperature range
listed in the data sheet. No compensation is
provided for gain changes with temperature.
This can only be provided with AGC external
to the module.
Note 2:
Internal RF decoupling is included on all bias
leads. No additional bypass elements are
required, however some applications may
require energy storage on the drain leads to
accommodate time-varying waveforms.
Bias Network
RF
in
1
Q1
Case Flange = Ground
Q2
Temperature
Compensation
4
RF
out
Vdd1
2
3
Vdd2
522 Almanor Ave., Sunnyvale, CA 94085
Phone: (800) SMI-MMIC
http://www.sirenza.com
3
EDS-102936 Rev B
Preliminary
XD010-14S-D4F 925-960 MHz 10W Amp
Gain, Efficiency, EVM vs. Frequency
Output Power= 8 W EDGE, Vdd=28 V
T
Flange
=25C
0
5
10
15
20
25
30
35
920
925
930
935
940
945
950
955
960
965
Output Power (W)
Ga
i
n
(d
B), Effi
ci
e
n
cy (%
), EVM
(%)
-35
-30
-25
-20
-15
-10
-5
0
I
nput
Ret
u
rn Loss (dB)
Gain
Efficiency
EVM
Input Return Loss
EVM and Id vs. Output Power and Temperature
Freq=950 MHz EDGE, Vdd=28 V, T
Flange
=-20C, 25C, 90C
0
1
2
3
4
5
6
0
2
4
6
8
10
12
Output Power (W)
EVM (%)
0.2
0.4
0.6
0.8
1
1.2
1.4
Id
(Amp
s)
EVM @-20C
EVM @ 25C
EVM @ 90C
Id @ -20C
Id @ 25C
Id @ 90C
Gain and Efficiency vs. Output Power and Temperature
Freq=950 MHz EDGE, Vdd=28 V, T
Flange
=-20C, 25C, 90C
0
5
10
15
20
25
30
35
40
0
2
4
6
8
10
12
Output Power (W)
Gain (dB), E
fficiency (%)
Gain @ -20C
Gain @25C
Gain @ 90C
Efficiency @ -20C
Efficiency @ 25C
Efficiency @ 90C
Gain and EVM vs. Output Power and Voltage
Freq=942 MHz EDGE, Vdd=24V, 28V, 32V T
Flange
= 25C
0
5
10
15
20
25
30
35
0
2
4
6
8
10
12
Output Power (W)
Gai
n
(dB), EVM (%)
Gain @ 24 VDC
Gain @ 28 VDC
Gain @ 32 VDC
EVM @ 24 VDC
EVM @ 28 VDC
EVM @ 32 VDC
Gain, Efficiency, EVM vs. Output Power
Freq=950 MHz, Vdd=28 V, T
Flange
=25C EDGE
0
5
10
15
20
25
30
35
0
2
4
6
8
10
12
Output Power (W)
Ga
i
n
(d
B), Effi
ci
e
n
cy (%
)
0
1
2
3
4
5
6
7
RMS EVM (%)
Gain
Efficiency
EVM
522 Almanor Ave., Sunnyvale, CA 94085
Phone: (800) SMI-MMIC
http://www.sirenza.com
4
EDS-102936 Rev B
Preliminary
XD010-14S-D4F 925-960 MHz 10W Amp
Test Board Schematic with module attachments shown
Test Board Layout and Bill of Materials
Component
Description
Manufacturer
PCB
Rogers 4350, e
r
=3.5
Thickness=30mils
Rogers
J1, J2
SMA, RF, Panel Mount
Tab W / Flange
AMP
J3, J4
MTA Post Header, 5 Pin,
Rectangle, Polarized,
Surface Mount
AMP
C1, C2
Cap, 220mF 50V, -40 to
85
o
C, Electrolytic, G
Panasonic
C4, C6
Cap, 0.01mF, 100V, 10%,
1206
Johanson
C3, C5
Cap, 1000pF, 100V, 10%,
1206
Johanson
JP1 Header
SMT Header, Low Profile,
2mm
Specialty
Electronics
JP1 Shunt
Shunt, Mate to Header,
2mm
Specialty
Electronics
Mounting
Screws
4-40 X 0.250"
Various
To download Gerber files, DXF drawings, a detailed BOM, and
assembly recommendations for the test board with fixture
click here
522 Almanor Ave., Sunnyvale, CA 94085
Phone: (800) SMI-MMIC
http://www.sirenza.com
5
EDS-102936 Rev B
Preliminary
XD010-14S-D4F 925-960 MHz 10W Amp
Package Outline Drawing
Recommended PCB Cutout and Landing Pads for the D4F Package
Note 3: Dimensions are in inches