Data Sheet
Conexant Preliminary
Doc. No. 101111A
Proprietary Information
August 7, 2000
RF25B
Tx ASIC for CDMA and AMPS Applications
The RF25B device includes the following functional blocks:
In-Phase and Quadrature (I/Q) modulator
A Very High Frequency (VHF) Voltage Controlled Oscillator (VCO)
Intermediate Frequency (IF) Variable Gain Amplifier (VGA)
Cellular upconverters with RF gain control
Cellular Power Amplifier (PA) drivers
The RF25B Tx Application-Specific Integrated Circuit (ASIC) is a dual-mode
transmitter (Tx) intended to be used in cellular band phones. As a dual-mode IC, it
can be used in Code Division Multiple Access (CDMA) or Advanced Mobile Phone
System (AMPS) mode. The ASIC provides excellent RF performance and is
packaged in a low cost, high performance, 40-pin Land Grid Array (LGA), 6x6 mm
package.
The device incorporates all the components to implement the complete transmitter
chain; from the In-Phase and Quadrature (I/Q) modulator to the PA driver amplifier,
except for external IF and RF SAW filters. The I/Q modulator receives differential
inputs from the baseband and upconverts to IF band. The IF VGA amplifies the IF
signal with a minimum dynamic range of 90 dB. It also provides a compensation for
gain variation of off-chip components. After external IF filtering, the signal is
upconverted to RF band frequency through a mixer. The mixer has an adjusted
variable gain option. With this option and the VGA, the transmitted path's gain can
be redistributed for optimum Adjacent Channel Power Rejection (ACPR) and
Signal-to-Noise (S/N) performance. The RF signal is filtered through an external
filter and inputs to the drive amplifier.
There is a single on-chip Very High Frequency (VHF) Voltage Controlled Oscillator
(VCO), which operates with an external tank circuit and a varactor diode to
generate the Local Oscillator (LO) signal for I/Q modulator.
The Gain, ACPR and Noise Figure (NF) of each stage in the transmitter chip are
optimized to meet the system requirements per TIA/EIA-98B.Employing silicon
bipolar technology, the chip is designed for high performance with a high level
integration and a cost-effective RF solution for dual-mode phone application.
The RF25B pin-out is shown in Figure 1, a functional block diagram in Figure 2,
and a schematic diagram in Figure 3.
Features
Dual-mode operation with high linearity that meets
the requirements of the IS-95A and IS-98
standards
90 dB dynamic range from the VGA
Power saving operation in gated output power
mode
RF mixer variable gain
Lower power consumption in all modes
Enable line for the entire chip
Cellular band driver
40-pin Land Grid Array (LGA) package
Applications
Cellular band phones.
CDMA and AMPS modes in the cellular band:
- CDMA (US)
- CDMA (Japan)
RF25B
Tx ASIC
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Conexant Preliminary
101111A
Proprietary Information
August 7, 2000
C823
NC
VCC_IF
RF_GC
VGA_OUT+
VGA_OUT-
POT
DRV_ON
VCC_BIAS
RF_OUT
NC
NC
31
30
29
28
27
26
25
24
23
22
21
NC
VCC_DR
V
NC
VCC_IQ_MOD
Q+
Q-
DR
V_IN
I+
I-
40
39
38
34
33
32
37
36
35
MIX_IN+
MIX_IN-
NC
VCO+
VCO-
AMPS/CDMA
LO_IN
VCC_MIX
VGA_GC
12
13
14
18
19
20
15
16
17
NC
PLL-
PLL+
NC
VCC_DIV
MIX_OUT
CHIP_ENA
NC
VCC_DIFF_DRV
NC
NC
1
2
3
4
5
6
7
8
9
10
11
Figure 1. RF25B Tx ASIC Pinout 40-Pin LGA 6 x 6 mm Package
C268
VGA_GC
130.38 MHz
RF_OUT
Cell SAW
Power
Management
CHIP_ENA
260 MHz Tank
Q Data
Tx VGA
I Data
I
Q
2
To PLL
Lo Buf
DRV_ON
35
4
5
37
32
26
15
7
9
25
30
29
33
34
20
19
17
16
40
39
LO_IN
AMPS/CDMA
Figure 2. RF25B Tx ASIC Block Diagram
Tx ASIC
RF25B
101111A
Conexant Preliminary
3
August 7, 2000
Proprietary Information
Technical Description
I/Q Modulator. The I/Q modulator converts the incoming
analog baseband signals to balanced IF signals using the on-
chip VHF local oscillator. The I/Q modulator is internally
connected to the VGA, and its outputs are fully differential to
reduce common mode noise. The modulator is also designed
to have very low amplitude and phase imbalances.
VHF VCOs. The on-chip Local Oscillator (LO) is a voltage
controlled oscillator (VCO). It has a frequency range of 100 to
640 MHz. With external tank circuits and a varactor diode, it
provides the LO signal to drive the I/Q modulator and the
prescalar of an external Phase Locked Loop (PLL) circuitry.
The oscillator typically operates at twice the IF frequency.
VGA. The VGA is a differential amplifier that receives its signal
from the I/Q modulator, amplifies it, and sends it to the IF
output pins. A filter should be attached to the IF output pins for
noise reduction. The VGA has a minimum dynamic range of
90 dB and a control voltage of 0.5 to 2.5 V. It provides
compensation for any part-to-part and temperature gain
variation in the transmitted path.
Upconverters. The cellular variable gain upconverter receives
the IF signal from the VGA after passing through an external
filter. The upconverter uses an external LO controlled by an
external PLL. With the variable mixer gain and the VGA, the
transmitted path's gain can be redistributed for optimum ACPR
and S/N performance. The output RF signal is sent to an output
pin to be filtered before driver amplification.
PA Driver. The driver takes its input from the upconverter after
passing through an image rejection filter. The driver amplifies
the signal and sends it to an external PA.
The DRIVER_ON command is used during gated output power
mode to deactivate the drivers in periods of no transmission--a
feature intended for current saving. The pot (pin 6)
accompanied with an external resistor would alter the driver
bias point. The result is to change the driver gain and ACPR. A
Surface Acoustic Wave (SAW) filter for noise and spurious
rejection should be placed between the driver and the external
PA.
ESD Sensitivity
The RF25B is a Class 1 device. The following extreme
Electrostatic Discharge (ESD) precautions are required
according to the Human Body Model (HBM):
Protective outer garments.
Handle device in ESD safeguarded work area.
Transport device in ESD shielded containers.
Monitor and test all ESD protection equipment.
The HBM ESD withstand threshold value, with respect to
ground, is
1.5 kV. The HBM ESD withstand threshold value,
with respect to VDD (the positive power supply terminal) is also
1.5 kV.
Electrical and Mechanical Specifications
Included in this document are Tables 1 through 5 and Figures 1
through 5, which define the electrical and mechanical
specifications of the RF25B.
Table 1:
RF25B Pin Assignments and Signal
Descriptions
Table 2:
Absolute Maximum Ratings
Table 3:
Recommended Operating Conditions
Table 4:
Mode Control Select Signal Switching
Table 5:
RF25B Tx ASIC Electrical Specifications
Figure 1:
RF25B Tx ASIC Pinout 40_Pin LGA
6 x 6 mm Package
Figure 2:
RF25B Tx ASIC Block Diagram
Figure 3 15:
Typical Functional Block Performance
Figure 16:
RF25B Schematic Diagram
Figure 17:
RF25B Tx ASIC Pin Package Dimensions
40-Pin LGA 6x6 mm Package
Figure 18:
40-Pin LGA Tape and Reel Dimensions
RF25B
Tx ASIC
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Conexant Preliminary
101111A
Proprietary Information
August 7, 2000
Table 1. Pin Assignments and Signal Descriptions (1 of 3)
Pin #
Name
Description
Equivalent Circuit
1
NC
No connect.
2
VCC_IF
Supply voltage for the VGA, IF mux, and bias circuitry. A bypass capacitor with a short trace is
required.
3
RF_GC
The gain control pin for the RF upconverters. A DC voltage of 1 to 2.5 V is needed to cover the
mixer RF range.
4
VGA_OUT+
The output pin for the 130.38 MHz VGA. This is a balanced output. It should be connected to an
external bandpass filter for noise reduction. Requires an inductor choke to VCC IF on both
differential lines. Both outputs are open collectors.
5
VGA_OUT-
Same as pin 4, except complementary output.
+
6
POT
This pin is connected to an external resistor. The value of the resistor varies the bias current of the
driver, which affects gain and Adjacent Channel Power Rejection (ACPR). For CDMA mode, the
resistor range is 330 to 3.9 K ohms.
7
DRV_ON
This is the driver control signal. When the pin is low, the driver is deactivated during no
transmission. During transmission the pin should be high to enable the driver. DRIVER_ON = On
to DRIVER_ON = Off can be used to provide a 33 dB step in cellular CDMA mode.
8
VCC_BIAS
Supply voltage for the cellular driver bias. A bypass capacitor with a short trace is required.
9
RF_OUT
This is the output pin for the cellular RF signal. The pin is connected to the output of the cellular
driver amplifier. Impedance matching is required.
Vcc
10
NC
No connect.
11
NC
No connect.
12
NC
No connect.
13
VCC_DRV
Supply voltage for the driver. A bypass capacitor with short trace is required.
14
NC
No connect.
15
DRV_IN
This is the input for the cellular band driver. The input signal should pass through a SAW filter
before being connected to the driver. Impedance matching is required.
Vcc
+
16
I+
The I/Q modulator baseband balanced input for the I channel. A
1.85 V typical DC bias is
required at both differential input pins.
17
I-
Same as pin 16, except complementary input.
+
18
VCC_IQ_MOD
Supply voltage for the I/Q modulator. A bypass capacitor with a short trace is required.
Tx ASIC
RF25B
101111A
Conexant Preliminary
5
August 7, 2000
Proprietary Information
Table 1. Pin Assignments and Signal Descriptions (2 of 3)
Pin #
Name
Description
Equivalent Circuit
19
Q+
The I/Q modulator baseband balanced input for the Q channel. A
1.85 V typical DC bias is
required at both differential input pins.
20
Q-
Same as pin 19, except complementary input.
+
21
NC
No connection.
22
NC
No connection.
23
VCC_DIFF_DRV
Supply voltage for a differential amplifier in the upconverter block. A bypass capacitor with a short
trace is required.
24
NC
No connection.
25
CHIP_ENA
This is the IQ modulator, VGA, and upconverter enable signal. When the input is low, the chip is
disabled. When the input is high, the chip is enabled.
26
MIX_OUT
This is the output pin for the cellular upconverter. The RF output signal should be routed through
an image rejection filter before being connected to the driver input.
Vcc
27
VCC_DIV
Supply voltage for the divider and VCO buffer. A bypass capacitor with a short trace is required.
28
NC
No connection.
29
PLL+
This is the balanced output pin for the VCO. This output goes to an external PLL that locks the
VCO frequency.
30
PLL-
Same as pin 29, except complementary input.
+
Vcc
Vcc
31
NC
No connection.
32
AMPS/CDMA
This is the cellular mode control signal input. When the input is low, the AMPS mode is selected. If
the input is high, CDMA mode is selected.
33
VCO-
This is the balanced input pin for an external VCO tank circuit. The tank circuit values estimate the
frequency of oscillation (and the Q factor) of the LO. This tank circuit should contain a varactor to
modulate the IF frequency directly at the modulator output. The output frequency of the external
VCO is divided by 2 before applying to the I/Q modulator.
34
VCO+
Same as pin 33, except a complementary input.
+
35
VGA_GC
The VGA gain control signal. A DC control voltage should be applied to this pin to vary the gain of
the VGA.
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