LPC47M10x

PRELIMINARY

100 Pin Enhanced Super I/O Controller with LPC

Interface for Consumer Applications

FEATURES

3.3 Volt Operation (5 Volt Tolerant)

LPC Interface

ACPI 1.0 Compliant

Fan Control
-

Fan Speed Control Outputs

Fan Tachometer Inputs

Programmable Wake-up Event Interface

PC98, PC99 Compliant

Dual Game Port Interface

MPU-401 MIDI Support

General Purpose Input/Output Pins

ISA Plug-and-Play Compatible Register Set

Intelligent Auto Power Management

System Management Interrupt

2.88MB Super I/O Floppy Disk Controller

Licensed CMOS 765B Floppy Disk

Controller
-

Software and Register Compatible with
SMSC's Proprietary 82077AA
Compatible Core

Supports Two Floppy Drives Directly

Configurable Open Drain/Push-Pull
Output Drivers

Supports Vertical Recording Format

- 16-Byte

Data

FIFO

100% IBM Compatibility

Detects All Overrun and Underrun
Conditions

Sophisticated Power Control Circuitry
(PCC) Including Multiple Powerdown
Modes for Reduced Power
Consumption

DMA Enable Logic

Data Rate and Drive Control Registers

480 Address, Up to Eight IRQ and
Three DMA Options

Enhanced Digital Data Separator
-

2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps,
250 Kbps Data Rates

- Programmable

Precompensation

Modes

Keyboard Controller

8042 Software Compatible

8 Bit Microcomputer

2k Bytes of Program ROM

256 Bytes of Data RAM

Four Open Drain Outputs Dedicated for
Keyboard/Mouse Interface

Asynchronous Access to Two Data
Registers and One Status Register

Supports Interrupt and Polling Access

8 Bit Counter Timer

Port 92 Support

Fast Gate A20 and KRESET Outputs

Serial Ports
-

Two Full Function Serial Ports

High Speed NS16C550 Compatible
UARTs with Send/Receive 16-Byte
FIFOs

Supports 230k and 460k Baud

Programmable Baud Rate Generator

Modem Control Circuitry

480 Address and 15 IRQ Options

Infrared Port

Multiprotocol Infrared Interface

IrDA 1.0 Compliant

SHARP ASK IR

480 Addresses, Up to 15 IRQ

Multi-Mode Parallel Port with ChiProtect

ORDERING INFORMATION

Order Numbers:

LPC47M10xQFP � Rev. A (in 100 pin QFP Package)

LPC47M10xS-MC � Rev. B (in 100 pin QFP Package)

(Rev. A and Rev. B are in different process technologies)

Standard Mode IBM PC/XT�, PC/AT,
and PS/2 Compatible Bidirectional
Parallel Port

Enhanced Parallel Port (EPP)
Compatible - EPP 1.7 and EPP 1.9
(IEEE 1284 Compliant)

IEEE 1284 Compliant Enhanced
Capabilities Port (ECP)

ChiProtect Circuitry for Protection

480 Address, Up to 15 IRQ and Three
DMA Options

LPC Interface

Multiplexed Command, Address and
Data Bus

Serial IRQ Interface Compatible with
Serialized IRQ Support for PCI Systems

- PME

Interface

100 Pin QFP Package

GENERAL DESCRIPTION

The LPC47M10x* is a 3.3V (5V tolerant)
PC98/PC99 compliant Super I/O controller. The
LPC47M10x implements the LPC interface, a pin
reduced ISA bus interface which provides the
same or better performance as the ISA/X-bus
with a substantial savings in pins used. The
LPC47M10x provides fan control through two fan
speed control output pins and two fan tachometer
input pins. It also provides 37 general purpose
input/output (GPIO) pins, a dual game port
interface and MPU-401 MIDI support.

The LPC47M10x incorporates a keyboard
interface, SMSC's true CMOS 765B floppy disk
controller, advanced digital data separator, two
16C550A compatible UARTs, one Multi-Mode
parallel port which includes ChiProtect circuitry
plus EPP and ECP, on-chip 12 mA AT bus
drivers, one floppy direct drive support, and
Intelligent Power Management including PME
support. The true CMOS 765B core provides
100% compatibility with IBM PC/XT and PC/AT
architectures in addition to providing data
overflow and underflow protection. The SMSC
advanced digital data separator incorporates
SMSC's patented data separator technology,
allowing for ease of testing and use. Both on-
chip UARTs are

compatible with the NS16C550A. The parallel
port is compatible with IBM PC/AT architecture,
as well as IEEE 1284 EPP and ECP. The
LPC47M10x incorporates sophisticated power
control circuitry (PCC) which includes support for
keyboard and mouse wake-up events. The PCC
supports multiple low power-down modes.

The LPC47M10x supports the ISA Plug-and-Play
Standard (Version 1.0a) and provides the
recommended functionality to support Windows
'95. The I/O Address, DMA Channel and
hardware IRQ of each logical device in the
LPC47M10x may be reprogrammed through the
internal configuration registers. There are 480
I/O address location options, a Serialized IRQ
interface, and three DMA channels.

The LPC47M10x does not require any external
filter components and is therefore easy to use
and offers lower system costs and reduced board
area. The LPC47M10x is software and register
compatible with SMSC's proprietary 82077AA
core.

*The "x" in the part number is a designator that changes depending upon the particular BIOS used inside the
specific chip. "2" denotes AMI Keyboard BIOS and "7" denotes Phoenix 42i Keyboard BIOS.

TABLE OF CONTENTS

FEATURES.............................................................................................................................................. 1
GENERAL DESCRIPTION ...................................................................................................................... 2
PIN CONFIGURATION ............................................................................................................................ 5
DESCRIPTION OF PIN FUNCTIONS...................................................................................................... 6

Buffer Type Descriptions .................................................................................................................... 11
Pins That Require External Pullup Resistors ...................................................................................... 12

BLOCK DIAGRAM ................................................................................................................................ 13
REFERENCE DOCUMENTS ................................................................................................................. 13
3 VOLT OPERATION / 5 VOLT TOLERANCE...................................................................................... 14
POWER FUNCTIONALITY.................................................................................................................... 14

VCC Power......................................................................................................................................... 14
VTR Support....................................................................................................................................... 14
Internal PWRGOOD ........................................................................................................................... 14
32.768 kHz Trickle Clock Input ........................................................................................................... 14
Indication of 32kHz Clock ................................................................................................................... 14
Trickle Power Functionality................................................................................................................. 15
VREF Pin............................................................................................................................................ 17
Maximum Current Values ................................................................................................................... 17
Power Management Events (PME/SCI).............................................................................................. 17

FUNCTIONAL DESCRIPTION .............................................................................................................. 18

SUPER I/O REGISTERS.................................................................................................................... 18
HOST PROCESSOR INTERFACE (LPC) .......................................................................................... 18
LPC INTERFACE ............................................................................................................................... 19

FLOPPY DISK CONTROLLER ............................................................................................................. 24

FDC INTERNAL REGISTERS............................................................................................................ 24

COMMAND SET/DESCRIPTIONS ........................................................................................................ 46
INSTRUCTION SET............................................................................................................................... 49
SERIAL PORT (UART).......................................................................................................................... 74
INFRARED INTERFACE ....................................................................................................................... 88
MPU-401 MIDI UART............................................................................................................................. 89

Overview............................................................................................................................................. 89
Host Interface ..................................................................................................................................... 90
MPU-401 Command Controller .......................................................................................................... 92
MIDI UART ......................................................................................................................................... 93
MPU-401 Configuration Registers ...................................................................................................... 94

PARALLEL PORT.................................................................................................................................. 95

IBM XT/AT COMPATIBLE, BI-DIRECTIONAL AND EPP MODES....................................................... 97
EXTENDED CAPABILITIES PARALLEL PORT ................................................................................ 103

POWER MANAGEMENT ..................................................................................................................... 115
SERIAL IRQ......................................................................................................................................... 119
Timing Diagrams for SER_IRQ Cycle ............................................................................................... 119

8042 KEYBOARD CONTROLLER DESCRIPTION ............................................................................ 123

Latches On Keyboard and Mouse IRQs ........................................................................................... 130
Keyboard and Mouse PME Generation ............................................................................................ 132

GENERAL PURPOSE I/O ................................................................................................................... 133

GPIO Pins......................................................................................................................................... 133
EITHER EDGE TRIGGERED INTERRUPTS ................................................................................... 140
LED FUNCTIONALITY ..................................................................................................................... 140

SYSTEM MANAGEMENT INTERRUPT (SMI) .................................................................................... 141
PME SUPPORT ................................................................................................................................... 142

`WAKE ON SPECIFIC KEY' OPTION............................................................................................... 143

FAN SPEED CONTROL AND MONITORING ..................................................................................... 146

Fan Speed Control ........................................................................................................................... 146
Fan Tachometer Inputs..................................................................................................................... 147

SECURITY FEATURE ......................................................................................................................... 151

GPIO Device Disable Register Control............................................................................................. 151
Device Disable Register ................................................................................................................... 151

GAME PORT LOGIC ........................................................................................................................... 151

Power Control Register..................................................................................................................... 154
VREF Pin.......................................................................................................................................... 154

RUNTIME REGISTERS ....................................................................................................................... 155
CONFIGURATION ............................................................................................................................... 185
OPERATIONAL DESCRIPTION.......................................................................................................... 206

MAXIMUM GUARANTEED RATINGS* ............................................................................................ 206
DC ELECTRICAL CHARACTERISTICS........................................................................................... 206

TIMING DIAGRAMS ............................................................................................................................ 210
PACKAGE OUTLINE........................................................................................................................... 234
APPENDIX - TEST MODE................................................................................................................... 235

Board Test Mode .............................................................................................................................. 235

PIN CONFIGURATION

LPC47M10x

100 PIN QFP

GP40/DRVDEN0
GP41/DRVDEN1

nMTR0

nDSKCHG

nDS0

CLKI32

VSS

nDIR

nSTEP

nWDATA

nWGATE

nHDSEL

nINDEX

nTRK0

nWRTPRT

nRDATA

GP42/nIO_PME

VTR

CLOCKI

LAD0
LAD1
LAD2
LAD3

nLFRAME

nLDRQ

nPCI_RESET

nLPCPD

GP43/DDRC

PCI_CLK

SER_IRQ

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

nACK
BUSY
PE
SLCT
VSS
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
nSLCTIN
nINIT
VCC
GP37/A20M
GP36/nKBDRST
IRTX2/GP35
IRRX2/GP34
VSS
MCLK
MDAT
KCLK
KDAT
GP33/FAN1
GP32/FAN2
VCC
GP31/FAN_TACH1
GP30/FAN_TACH2

80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51

VSS

11/

J
1
B2

13/

J
2
B2

15/

J
1
Y

16/

J
2
X

/J2

21/

12/

YSO

25/

I
D

I
_
I
N

I
D

I
_

60/

/LE

57/

5
6
/
n
C

55/

54/

nDS

53/

(
I
R

52/

(IR

)

5
1
/
n
DC

5
0
/
n
R

I
2

nDC

nDT

Электронный компонент: LPC47M10x