LAN91C95
ISA/PCMCIA Full Duplex Single-Chip
Ethernet and Modem Controller with RAM
FEATURES
ISA/PCMCIA Single Chip Ethernet Controller
With Modem Support
6 Kbytes Built-In RAM
Supports IEEE 802.3 (ANSI 8802-3) Ethernet
Standards
Full Duplex Support
Hardware Memory Management Unit
Built-In AUI and 10BASE-T Network Interfaces
Simultasking
J
- Early Transmit and Early
Receive Functions
Advanced Power Management
Features/Including Magic Packet Frame
Control
Software Compatible with LAN91C92/
LAN91C94 (in ISA Mode)
Configuration Registers Implement Cardbus
Multi-Function Specification V3.0 with
Backward Compatibility to V2.1
Interfaces Directly to Lucent Technologies and
Conexant (formerly Rockwell) Modem
Chipsets
On-Chip Attribute Memory (CIS) of up to 512
Bytes (On Even Addresses) For Card
Configuration Information; Expandable
Externally
Option for Serial or Parallel EEPROM for CIS
Optional External Flash Capability for XIP
(Execute in Place)
Automatic Technology to Detect 10 BASE-T
TX/RX Polarity Reversal
Low Power CMOS Design
Supports Magic Packet Wakeup
128 Pin TQFP Package
Bus Interface
Direct Interface to ISA and PCMCIA with No
Wait States
High Impedance Speaker Interface
Flexible Bus Interface
16-Bit Data and Control Paths
Fast Access Time (40 ns)
Pipelined Data Path
Handles Block Word Transfers for Any
Alignment
High Performance Chained ("Back-to-
Back") Transmit and Receive
Flat Memory Structure for Low CPU
Overhead
Dynamic Memory Allocation Between
Transmit and Receive
Buffered Architecture, Insensitive to Bus
Latencies (No Overruns/Underruns)
Supports Boot PROM for Diskless ISA
Applications
Simultasking is a trademark and SMSC is a registered trademark of Standard Microsystems Corporation
2
TABLE OF CONTENTS
FEATURES ........................................................................................................................................1
PIN CONFIGURATION.......................................................................................................................3
GENERAL DESCRIPTION .................................................................................................................4
OVERVIEW ........................................................................................................................................4
PIN REQUIREMENTS ........................................................................................................................7
DESCRIPTION OF PIN FUNCTIONS .................................................................................................9
BUFFER TYPES ..............................................................................................................................16
FUNCTIONAL DESCRIPTION..........................................................................................................20
MODEM INTERFACE ......................................................................................................................23
BUFFER MEMORY ..........................................................................................................................24
INTERRUPT STRUCTURE ...............................................................................................................32
RESET LOGIC .................................................................................................................................33
POWERDOWN LOGIC.....................................................................................................................34
INTERNAL VS EXTERNAL ATTRIBUTE MEMORY MAP ................................................................40
PCMCIA CONFIGURATION REGISTERS: ADDRESS 8000-803EH................................................41
PCMCIA CONFIGURATION REGISTERS DESCRIPTION ...............................................................42
INTERNAL I/O SPACE MAP ............................................................................................................52
I/O REGISTERS DESCRIPTION ......................................................................................................53
THEORY OF OPERATION ...............................................................................................................83
MAGIC PACKET SUPPORT ............................................................................................................84
INTERNAL VS. EXTERNAL ATTRIBUTE MEMORY MAP ...............................................................93
FUNCTIONAL DESCRIPTION OF THE BLOCKS.............................................................................97
BOARD SETUP INFORMATION ....................................................................................................106
OPERATIONAL DESCRIPTION .....................................................................................................111
TIMING DIAGRAMS ......................................................................................................................115
Related Documentation
1. PCMCIA 5.0 standard (for multi-function extensions)
2. AT&T HSM288xCF Modem Chip Set Data Sheet - July 5, 1994, V.35 bis extension 1996
3. Rockwell ACL & ACFL series L39 based modem designer's guide, 1994/95/97
3
Network Interface
Integrated 10BASE-T Transceiver
Functions:
-
Driver and Receiver
-
Link Integrity Test
-
Receive Polarity Detection and
Correction
Integrated AUI Interface
Implements 10 Mbps Manchester
Encoding/Decoding and Clock Recovery
Automatic Retransmission, Bad Packet
Rejection, and Transmit Padding
External and Internal Loopback Modes
Four Direct Drive LED Outputs for Status/
Diagnostics
Software Drivers
Uses Certified LAN9000 Drivers for Major
Network Operating Systems
Software Driver Compatible with
LAN91C92, LAN91C94 and LAN91C100
(100 Mbps) and LAN91C110 (100 Mbps)
Controllers in ISA Mode
Software Driver Utilizes Full Capability of 32
Bit Microprocessor
PIN CONFIGURATION
LAN91C95
128 Pin TQFP
AVDD
TXP/nCOLL
TXN/nCRS
TPETXP
TEPTXDP
TPETXN
TPETXDN
AVSS
nTXLED/nTXEN
nRXLED/RXCLK
nLINKLED/TXD
nBSELED/RXD
VDD
SPKRIN
SPKROUT
nMIS16
MRDY
MINT
VSS
MRINGIN
nMRINGOA
MRINGOB
nMCS
nMRESET
VDD
MIDLEN1
nMPWDN
nMPDOUT
MFBK1
VSS
NC
ND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
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23
24
25
26
27
28
29
30
31
32
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
NC
NC
VSS
INTR3
INTR2/nSTSCHG
INTR1/nINPACK
INTR0/nIREQ
VDD
nIORD
nIOWR
nMEMR/nOE
nIOSC16/nIOIS16
VSS
IOCHRDY/nWAIT
BALE/nWE
nSBHE/nCE2
VDD
D15
D14
D13
D12
VSS
D11
D10
D9
VDD
D8
D7
D6
VSS
D5
D4
N
C
A
V
S
S
C
O
L
N
C
O
L
P
R
E
C
N
R
E
C
P
T
P
E
R
X
N
T
P
E
R
X
P
A
V
D
D
A
V
S
S
R
B
I
A
S
A
V
D
D
n
X
E
N
D
E
C
n
E
N
1
6
P
W
R
D
W
N
/
T
X
C
L
K
n
R
O
M
/
n
P
C
M
C
I
A
V
S
S
E
N
E
E
P
E
E
S
K
E
E
C
S
E
E
D
O
/
S
D
O
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T
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D
I
I
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S
2
I
O
S
1
V
D
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0
X
T
A
L
2
X
T
A
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1
W
A
K
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P
n
W
A
K
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P
_
E
N
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N
C
1
2
8
1
2
7
1
2
6
1
2
5
1
2
4
1
2
3
1
2
2
1
2
1
1
2
0
1
1
9
1
1
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1
1
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1
1
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1
1
5
1
1
4
1
1
3
1
1
2
1
1
1
1
1
0
1
0
9
1
0
8
1
0
7
1
0
6
1
0
5
1
0
4
1
0
3
1
0
2
1
0
1
1
0
0
9
9
9
8
9
7
3
3
3
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5
3
6
3
7
3
8
3
9
4
0
4
1
4
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4
4
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4
6
4
7
4
8
4
9
5
0
5
1
5
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4
5
5
5
6
5
7
5
8
5
9
6
0
6
1
6
2
6
3
6
4
N
C
A
E
N
/
n
R
E
G
A
0
A
1
V
D
D
A
2
A
3
A
4
A
5
A
6
A
7
V
S
S
A
8
A
9
A
1
0
A
1
1
A
1
2
A
1
3
V
D
D
A
1
4
A
1
5
A
1
6
/
n
F
W
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A
1
7
/
n
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A
1
8
A
1
9
/
n
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E
1
V
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S
D
0
D
1
D
2
V
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3
N
C
4
GENERAL DESCRIPTION
The LAN91C95 is a VLSI Ethernet Controller
that combines ISA and PCMCIA interfaces, as
well as an interface to a companion modem chip
set, in one chip. The LAN91C95 integrates all
the MAC and physical layer functions as well as
the packet RAM needed to implement a high
performance 10BASE-T (twisted pair) node. For
10BASE5 (thick coax), 10BASE2 (thin coax),
and 10BASE-F (fiber) implementations, the
LAN91C95 interfaces to external transceivers
via its AUI port. Only one additional IC is
required on most applications.
The LAN91C95 occupies 16 I/O locations and
no memory space except for PCMCIA attribute
memory space. The same I/O space is used for
both ISA and PCMCIA operations. The
LAN91C95 can directly interface the ISA and
PCMCIA buses and deliver no wait state
operation. Its shared memory is sequentially
accessed with 40ns access times to any of its
registers, including its packet memory. No DMA
services are used by the LAN91C95; virtually
decoupling network traffic from local or system
bus utilization. For packet memory
management, the LAN91C95 integrates a
unique hardware Memory Management Unit
(MMU) with enhanced performance and
decreased software overhead when compared to
ring buffer and linked list architectures. The
LAN91C95 is portable to different CPU and bus
platforms due to its flexible bus interface, flat
memory structure (no pointers), and its loosely
coupled buffered architecture (not sensitive to
latency).
The LAN91C95 interfaces directly with Rockwell
International L39/C39 controller-based modems
and Lucent Technologies' HSM288xCF modem.
OVERVIEW
A unique architecture allows the LAN91C95 to
combine high performance, flexibility, high
integration and simple software interface.
The LAN91C95 incorporates the LAN91C92/4
functionality for ISA environments with several
new features, as well as a PCMCIA interface
and attribute registers that comply with the
PCMCIA Multi-Function specification. Mode
selection between ISA and PCMCIA is static and
is done only once at the end of power on reset.
The LAN91C95 consists of the same logical I/O
register structure in ISA and PCMCIA modes.
However, some of the signals used to access
the PCMCIA differ from the ISA mode.
Additional registers exist in the PCMCIA
attribute space. The ROM memory space only
exists in ISA mode and the attribute space only
exists in PCMCIA mode.
I/O decoders are included in the LAN91C95's
PCMCIA interface, with independent decoders
for the LAN and for the modem functions.
These decoders are used whenever the
LAN91C95 is used as a multi-function card, and
they can be bypassed when only one function is
enabled. The LAN91C95 also merges the LAN's
internal interrupt source with the external
modem interrupt connected to the LAN91C95.
The MMU (Memory Management Unit)
architecture used by the LAN91C95 combines
the simplicity and low overhead of fixed areas
with the flexibility of linked lists providing
improved performance over other methods.
The LAN91C95 is designed to support full
duplex switched Ethernet where transmit and
5
receive are fully independent. It has 6 kbytes of
internal memory and the MMU manages
memory in 256 byte pages. The memory size
accommodates the increase in interrupt latency
resulting from simultaneous LAN and modem
operation as well as the potential for
simultaneous transmit and receive traffice in
some full duplex applications.
Packet reception and transmission are
determined by memory availability. All other
resources are always available if memory is
available. To complement this flexible
architecture, all ISA bus interface functions are
incorporated in the LAN91C95, as well as a 6K
byte packet RAM and serial EEPROM-based
setup. The user can select or modify
configuration choices.
The LAN91C95 stores the Configuration
Information Structure (CIS) on reset or power-up
from the serial EEPROM. This allows the host
to access data to allow the setup of the PCMCIA
multi-function card.
In ISA mode, the serial EEPROM acts as
storage for configuration and IEEE Ethernet
address information compatible with the existing
LAN9000 family of ISA Ethernet controllers.
In PCMCIA mode, the serial EEPROM stores
the CIS, as well as the IEEE address,
information, but it does not store any I/O or IRQ
information since this information is handled by
the host's socket controller. For CIS
requirements above 512 bytes, an optional
external parallel EEPROM can be used in
conjunction with the internal CIS. This allows
additional external, non-volatile storage for
applications that require XIP and use the
modem function. If the serial EEPROM is not
used in PCMCIA mode, the parallel EEPROM
must be used. In this case, the parallel
EEPROM is selected for the first 512 bytes of
storage as well, allowing the CIS to be stored in
the parallel EEPROM and, on power-up, to be
read directly by the host. The remaining parallel
EEPROM can be used for XIP applications, if
needed.
The LAN91C95 integrates most of the 802.3
functionality, incorporating the MAC layer
protocol, the physical layer encoding and
decoding functions with the ability to handle the
AUI interface. For twisted pair networks, the
LAN91C95 integrates the twisted pair
transceiver as well as the link integrity test
functions.
The LAN91C95 is a true 10BASE-T single chip
able to interface a system or a local bus.
Directly-driven LEDs for installation and run-
time diagnostics are provided, as well as 802.3
statistics gathering to facilitate network
management.
The LAN91C95 offers:
High integration:
Single chip adapter including:
Packet RAM
ISA bus interface
PCMCIA interface
EEPROM interface
Encoder decoder with AUI interface
Full duplex, magic packet 10BASE-T
transceiver
Lucent Technologies and Rockwell
International modem interface
High performance:
Chained ("back-to-back") packet handling
with no CPU intervention:
Queues transmit packets
Queues receive packets
Full duplex operation for higher network
throughput
Stores results in memory along with
packet
Queues Ethernet and modem interrupts
Optional single interrupt upon
completion of transmit chain
Fast block move operation for load/unload:
CPU sees packet bytes as if stored
contiguously
Handles 16 bit transfers regardless of
address alignment
Access to packet through fixed window
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