ChipFind - документация

Электронный компонент: CXA1390AR

Скачать:  PDF   ZIP
Description
The CXA1390AQ/AR are CCD camera's signal
processing ICs which extract signals from the CCD
output. These bipolar ICs perform correlated double
sampling. AGC, color separation, high luminance
detection and others. Additionary, these ICs are not
affected by irregular pulses which occure during the
CCD shutter mode.
Featuers
Pin compatible upgraded version of CXA1390Q/R
which can be swapped out while using same
peripheral chips
Almost completely corrects irregular pulses and
their negative affects
Correlated double sampling function alllows for the
suppression of low band noise in the CCD output
AGC amplifier, which has High S/N ratio and wide
gain control range, enhances the camera sensitivity
Output for iris adjustment. High luminance
detection output
Usage of Vg (regulator) output allows for the
formation of IRIS and AGC LOOP which are not
affected by supply voltage functation
Operating Conditions
Supply voltage
V
CC
4.75 to 5.25
V
Block Diagram and Pin Configuration (Top View)
Application
S/H and AGC for CCD camera
Structure
Bipolar silicon monolithic IC
Absolute Maximum Ratings (Ta = 25C)
Supply voltage
V
CC
12
V
Operating temperature
Topr
20 to +75
C
Storage temperature
Tstg
65 to +150
C
Allowable power dissipation
P
D
600 (QFP)
mW
950 (VQFP)
mW
(40mm
40mm, t = 0.8mm with a mounted glass epoxy
substrate)
1
CXA1390AQ/AR
E90941A78
S/H and AGC for CCD Camera
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXA1390AQ
48 pin QFP (Plastic)
CXA1390AR
48 pin LQFP (Plastic)
DE
T
OUT
V
CC
2
IR
IS
G
C
I
R
I
S
L
EVEL
DE
T
CL
P
GN
D
IR
IS
C
L
P
IR
IS
O
U
T
VG
O
U
T
WN
D
PBL
K
CL
P
1
CSAGC SL
CSAGC GC
CS OUT
CS CCD GC
CS CCD SL
CS CLP
F3 OUT
F2 OUT
F1 OUT
GY OUT
DC OUT
XSH1
DET LEVEL
AGC CLP
AGC OUT
OP IN +
OP IN
OP OUT
AGC CONT
AGC MAX
AGC SEL
XSHP
XSHD
CLP4
P
G
IN
D
A
T
A
IN
V
CC
1
XSP3
XSP2
XSP1
GN
D
FS
H
1
F3 C
L
P
F2 C
L
P
F1 C
L
P
XSH
2
CLP
CL
P
CL
P
WN
D
BL
K
WN
D
SH
SH
LPF
GATE
SLICE
OR
VG
MA
X
SLICE
GC
GC
CLP
BLK
SH
LPF
CLP
BLK
CL
P
BL
K
SH
SH
SH
SH
GC
OP
AG
C
COM
XSHD
COM
XSH
P
XSH
P
XSH
P
XSH
D
CL
P4
CL
P
4
XSP3
XSP2
PBLK
PBLK
SH
LPF
CLP
BLK
XSP1
PBLK
MO
D
E
SW
CLP1
CLP1
CLP1
CL
P
1
WN
D
PBL
K
CL
P
1
WN
D
PBL
K
CL
P
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
19
20
21
22
23
24
25
26
27
28
29
30
40
39
38
37
36
35
34
31
32
33
41
42
43
44
45
46
47
48
1
18
2
CXA1390AQ/AR
Pin Description and Standard Pin voltage
(V
CC
= 5V)
PIn
No.
1
34
35
40
41
42
48
2
3
4
5
6
27
7
18
20
26
45
46
47
10
17
24
Symbol
XSH1
XSHP
High speed pulse input
pin for S/H (active at L)
DC output pin of f
1
to f
3
output black level
Signal output pin
Capacitor connecting
pin for clamp
Signal output pin
Signal output pin Vcc
fluctuations effect is
minor on DC level
XSHD
XSP3
XSP2
XSP1
XSH2
DC OUT
GY OUT
F1 OUT
F2 OUT
F3 OUT
AGC OUT
CS CLP
IRIS CLP
DET CLP
AGC CLP
F3 CLP
F2 CLP
F1 CLP
CS OUT
IRIS OUT
DET OUT
1.7 to 2.2V
H: 4V and above
L: 1V and below
1.8 to 2.1V
Black level
1.8 to 2.1V
2.6 to 3.3V
2.0 to 2.6V
1.9 to 2.6V
2.3 to 2.8V
2.0 to 2.6V
2.0 to 2.6V
2.0 to 2.6V
1.7 to 2.0V
1.7 to 2.0V
Voltage
Equivalent circuit
Description
200
130
200
40
35
34
41
42
48
1
2
1k
180A
3
4
5
6
27
300
360A
130
7
18
20
26
45
46
47
300
200A
10
17
24
3
CXA1390AQ/AR
8
9
11
12
21
22
25
31
32
CS CCD SL
CS CCD GC
CSAGC GC
CSAGC SL
IRIS LEVEL
IRIS GC
DET LEVEL
AGC CONT
AGC MAX
Level adjustment pin of high
luminance detection pin of the
input signal
Gain adjustment pin of input
signal high luminance part
Gain adjustment pin of high
luminance port after AGC
Level adjustment pin of high
luminance detection after AGC
Adjustment pin of IRIS output
weighting (Active at WND = L)
Gain adjustment pin of IRIS
output
Adjustment pin of DET output
weighting (Active at WND = L)
AGC amplifier gain
adjustment pin
AGC amplifier MAX gain
adjustment pin
CLP1 pulse input pin
Active at H (OPB clamp)
Pre BLK pulse input pin
Active at L
Window pulse input pin
Active at L
CLP4 pulse input pin
Active at H
Regulator output pin
(Used for the formation of
AGC and IRIS loop)
Operation amplifier non
inverted input pin
Operation amplifier inverted
input pin
(Test mode at 0V)
H: 4V and above
L: 1V and below
2.6 to 3.1V
1 to 3.3V
13
CLP1
14
P BLK
15
WND
36
CLP4
16
VG OUT
28
OP IN +
29
OP IN
130
8
9
11
12
21
22
25
31
32
130
13
14
130
15
36
100A
16
28
29
130
130
PIn
No.
Symbol
Voltage
Equivalent circuit
Description
4
CXA1390AQ/AR
30
OP OUT
Output pin
H: 4.2V and above
L: 1.2V and below
33
AGC SEL
AGC amplifier gain
selection pin
V
CC
: Low Gain mode
GND: High Gain mode
37
38
PG IN
DATA IN
CCD signal input pin
Black level
2.7 to 3.2V
44
FSHI
Adjustment pin for color
separation S/H follow up
speed
(Normally used OPEN)
1.4 to 1.8V
PIn
No.
Symbol
Voltage
Equivalent circuit
Description
500A
3.6V
30
50k
33
3.3V
100A
38
37
8.5k
130
44
5
CXA1390AQ/AR
Electrical Characteristics
(Ta = 25C, V
CC
= 5.0V)
Current consumption
CONT Min.
CONT Max.
Max. Min.
AGC
Color
sepa-
ration
IRIS
DET
ID
ACON
Min.
AGC OUT/DATA IN
AGC CONT = 1.5V
AGC MAX = 5V
AGC SEL = 0V
AGC OUT/DATA IN
AGC CONT = 4.5V
AGC MAX = 5V
AGC SEL = 0V
AGC OUT/DATA IN
AGC CONT = 4.5V
AGC MAX = 1.5V
AGC SEL = 0V
ACON
Max.
MAX
Min.
Gain shift
AGC OUT (SEL = 5V) /AGC OUT
(SEL = 0V)
GSHI
BLK offset
Note 1)
BLK
Gain
Color separation output/AGC OUT
(f
1
, f
2
, f
3
)
f Gain
BLK offset
Gain Cont Max.
Gain Cont Min.
Window Level Max.
Window Level Min.
Gain
Window Level Max.
Window Level Min.
DC OUT
Gate Gain
Note 1)
f
BLK
DC
GY OUT/AGC OUT
GY
IRIS OUT/DATA IN
IRIS GC = 5V
WND = 5V
IR Max.
IRIS OUT/DATA IN
IRIS GC = 1.5V
WND = 5V
IR Min.
Gain Cont Max. ratio (attenuation)
IRIS GC = 1.5V
IRIS LEVEL = 5V
WND = 0V
IRW
Max.
Gain Cont Max. ratio (attenuation)
IRIS GC = 1.5V
IRIS LEVEL = 1.5V
WND = 0V
IRW
Min.
DET OUT/AGC OUT
WND = 5V
DET G
DET OUT/AGC OUT
DET LEVEL = 5V
WND = 0V
DET
Max.
Level Max. ratio
DET LEVEL = 1.5V
WND = 0V
DET
Min.
Symbol
Item
Conditions
Min.
Typ.
Max.
Unit
32
48
65
mA
6
8
dB
30
32
dB
17
20
dB
5
4
3
dB
10
0
+10
mV
0.5
0
+0.5
dB
10
0
+10
mV
1.8
1.95
2.1
V
0.5
0
+0.5
dB
4
8
dB
14
dB
18
22
dB
1
0
dB
2
1
+0.5
dB
2
1
+0.5
dB
13
dB
6
CXA1390AQ/AR
Max. Gain
CS
CCD
CS
AGC
CSC
Max.
CSOUT differential/
DATA IN differential
CS CCD SL = 4.1V
CS CCD GC = 5V
PBLK = 0V
13
16
dB
Min. Gain
CSC
Min.
CSOUT differential/
DATA IN differential
CS CCD SL = 4.1V
CS CCD GC = 1.5V
PBLK = 0V
1
1
dB
Max. SLICE
CSC
Max. SL
Input conversion slice level
CS CCD SL = 1.5V
Note 1)
0.7
V
Min. SLICE
CSC
Min. SL
Input conversion slice level
CS CCD SL = 5V
Note 1)
40
100
mV
Max. Gain
CSA
Max.
CS OUT DATA IN = 0.2Vpp
CS AGC GC = 5V
CS AGC SL = 4.2V
CS CCD GC = 1.5V
CS CCD SL = 1.5V
Note 2)
0.5
Vpp
Min. Gain
CSA
Min.
CS OUT differential/
AGC OUTdifferential
CS AGC GC = 1.5V
CS AGC SL = 4.2V
CS CCD GC = 1.5V
CS CCD SL = 1.5V
Note 2)
1
1
dB
Max. SLICE
CSA
Max. SL
AGC OUT conversion
CS AGC SL = 1.5V
Note 3)
1.2
V
Min. SLICE
CSA
Min. SL
AGC OUT conversion
CS AGC SL = 5V
Note 3)
0.06
0.1
V
TEST mode
TEST
DATA IN = 0.5Vpp
CS CCD GC = 0V
Note 4)
0.5
Vpp
H level
OPH
OP IN + = 2.1V
OP IN = 2.0V
4.2
V
L level
OPL
OP IN + = 2.0V
OP IN = 2.1V
0.9
1.2
V
Vg
At no load
2.6
2.85
3.1
V
OP-
Amp
Vg OUT
Symbol
Item
Conditions
Min.
Typ.
Max.
Unit
7
CXA1390AQ/AR
Note 1)
Note 2)
Voltage between DATA IN input black level and the high luminance level determined by CS CCD SL pin voltage.
Note 3)
Voltage between the black level at AGC OUT and the high luminance level determined by CS AGC SL pin voltage.
Note 4)
S/H output DATA IN input can be monitored by turning CS CCD GC (Pin 9) to 0V.
Indicates the specification
Output signal
BLK input
5
0
Black level
High luminance level
Indicates the specification
DATA IN
CS OUT
Black level
High luminance level
Indicates the specification
AGC OUT
CS OUT
8
CXA1390AQ/AR
Test Circuit
Note 1) Capacitor unit value at F.
Note 2) Voltage in parentheses are those not specified in the Electrical Characteristics Test Conditions.
Note 3) indicates a test pin. (For both AC and DC)
(3V )
(3V)
(3V)
(3V)
(3V)
(2V)
(2V)
(1.5V)
(5V)
(0V)
CSAGC SL
CSAGC GC
CS OUT
CS CCD GC
CS CCD SL
CS CLP
F3 OUT
F2 OUT
F1 OUT
GY OUT
DC OUT
XSH1
DET LEVEL
AGC CLP
AGC OUT
OP IN +
OP IN
OP OUT
AGC CONT
AGC MAX
AGC SEL
XSHP
XSHD
CLP4
P
G
IN
D
A
T
A
IN
V
CC
1
XSP3
XSP2
XSP1
GN
D
FS
H
1
F3 C
L
P
F2 C
L
P
F1 C
L
P
XSH
2
DE
T
OUT
V
CC
2
IR
IS
G
C
I
R
I
S
L
EVEL
DE
T
CL
P
GND
IR
IS
C
L
P
IR
IS
O
U
T
VG
O
U
T
WN
D
PBL
K
CL
P
1
CLP
CL
P
CL
P
WN
D
BL
K
WN
D
SH
SH
LPF
GATE
SLICE
OR
VG
MA
X
SLICE
GC
GC
CLP
BLK
SH
LPF
CLP
BLK
CL
P
BL
K
SH
SH
SH
SH
GC
OP
AG
C
COM
XSH
D
COM
XSH
P
XSH
P
XSH
P
XSH
D
CL
P4
CL
P
4
XSP3
XSP2
PBLK
PBLK
SH
LPF
CLP
BLK
XSP1
PBLK
MO
D
E
SW
CLP1
CLP1
CLP1
CL
P
1
WN
D
PBL
K
CL
P
1
WN
D
PBL
K
CL
P
1
0.1
CLP4
0.1
0.1
V
CC
5V
IN
0.1
0.1
0.1
0.1
10
0.1
0.1
(3V)
(3V)
(3V)
(3V)
CLP2
V
CC
5V
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
19
20
21
22
23
24
25
26
27
28
29
30
40
39
38
37
36
35
34
31
32
33
41
42
43
44
45
46
47
48
1
18
10
9
CXA1390AQ/AR
Timing Diagram for Testing
5V
0
5V
0
2sec
2sec
1H
Equivalent to black
Differs with every test
Output signal level
DATA IN input
CLP 1
CLP 4
Output waveform
AGC OUT
IRIS OUT
F
1
to F
3
OUT
GY OUT
DET OUT
CS OUT
10
CXA1390AQ/AR
Standard Control Characteristics (V
CC
= 5V, Ta = 25C)
dB
0
5
10
15
20
1
2
3
4
5
V
DET WINDOW control characteristics
(Weighting characteristics)
(WND = 0V)
Gain control characteristics
when DET LEVEL = 5V is set at 0dB
DET LEVEL voltage
dB
25
20
15
10
5
0
0
1
2
3
4
5
V
IRIS gain control characteristics
IRIS GC voltage
dB
0
5
10
15
20
1
2
3
4
5
V
IRIS WINDOW control characteristics
(Weighting characteristics)
(WND = 0V)
Gain control characteristics
when IRIS LEVEL=5V is set at 0dB
IRIS LEVEL voltage
dB
30
20
10
5
0
1
2
3
4
5
V
AGC maximum control characteristics
(AGC CONT = 5V)
AGC maximum voltage
dB
30
25
20
15
10
5
0
1
2
3
4
5
V
AGC amplifier gain control characteristics
(AGC Max. = 5V)
AGC CONT voltage
11
CXA1390AQ/AR
dB
20
15
10
5
0
CS CCD gain control characteristics
0
1
2
3
4
5
V
CS CCD GC voltage
V
0
0.2
0.4
0.6
0.8
1.0
CS CCD slice control characteristics
0
1
2
3
4
5
V
CS CCD SL voltage
V
1.6
1.2
0.8
0.4
0
CS AGC slice control characteristics
1
2
3
4
5
V
CS AGC SL voltage
(High luminance detection
level control after AGC)
Input conversion value
dB
20
15
10
5
0
CS AGC gain control characteristics
1
2
3
4
5
V
CS AGC GC voltage
SLICE
GCA
CS CCD SL
CS CCD GC
CS OUT
DATA IN
Note 1-a, 1-b
SLICE
GCA
CS AGC SL
CS AGC GC
CS OUT
COLOR
SEPARATION
Note 2-a, 2-b
AGC
Black level
Detection level
Note 1-b
Voltage indicated at CS CCD
slice control characteristics
Note 1-a
Characteristics indicated at CS CCD
gain control characteristics
=ratio of 3 and 2 (dB)
Note 2-b
Voltage indicated at CS AGC
slice control characteristics
Note 2-a
Characteristics indicated at CS AGC
slice control characteristics
=ratio of 3 and 2 (dB)
(3)
(2)
(1)
(1)
(2)
(3)
(1)
(2)
(3)
(3)
(2)
(1)
(High luminance detection
level control)
Input conversion value
Note 1-a
Note 1-b
Note 2-b
Note 2-a
Black level
Detection level
12
CXA1390AQ/AR
Supply voltage Characteristics Standard Design Documentation (Ta = 25C)
dB
30
25
20
15
10
5
0
1
2
3
4
5
AGC amplifier gain control characteristics
(AGC Max. = V
CC
)
AGC CONT voltage
5V
5.25V
4.75V
V
CC
5
(
)
dB
25
20
15
10
5
0
0
1
2
3
4
5
IRIS gain control characteristics
IRIS GC volage
5V
5.25V
4.75V
V
CC
5
dB
0
5
10
15
20
1
2
3
4
5
DET WINDOW control
(Weighting characteristics)
WND=0V
Gain control characteristics when
DET LEVEL=Vcc is set at 0dB
DET LEVEL voltage
5V
5.25V
4.75V
V
CC
5
(
)
dB
0
5
10
15
20
1
2
3
4
5
IRIS WINDOW control characeristics
(Weighting characteristics)
WND = 0V
Gain control characteristics when
IRIS LEVEL = Vcc is set at 0dB
IRIS LEVEL voltage
5V
5.25V
4.75V
V
CC
5
(
)
dB
30
20
10
5
0
1
2
3
4
5
AGC maximum control characteristics
AGC maximum voltage
(AGC CONT = V
CC
)
5V
5.25V
4.75V
V
CC
5
(
)
13
CXA1390AQ/AR
dB
20
15
10
5
0
CS AGC gain control characteristics
1
2
3
4
5
CS AGC GC voltage
(
)
V
CC
5
5V
4.75V
5.25V
V
1.6
1.2
0.8
0.4
0
CS AGC slice control characteristics
1
2
3
4
5
CS AGC SL voltage
(High luminance detection
level control after AGC)
Input conversion value
(
)
V
CC
5
5V
4.75V
5.25V
V
0
0.2
0.4
0.6
0.8
1.0
CS CCD slice control characteristics
0
1
2
3
4
5
CS CCD SL voltage
(
)
V
CC
5
5V
4.75V
5.25V
dB
20
15
10
5
0
CS CCD gain control characteristics
0
1
2
3
4
5
(
)
CS CCD GC voltage
5V
4.75V
5.25V
V
CC
5
SLICE
GCA
CS CCD SL
CS CCD GC
CS OUT
DATA IN
Note 1-a, 1-b
SLICE
GCA
CS AGC SL
CS AGC GC
CS OUT
COLOR
SEPARATION
Note 2-a, 2-b
AGC
Black level
Detection level
Note 1-b
Voltage indicated at CS CCD
slice control characteristics
Note 1-a
Characteristics indicated at CS CCD
gain control characteristics
=ratio of 3 and 2 (dB)
Black level
Detection level
Note 2-b
Voltage indicated at CS AGC
slice control characteristics
Note 2-a
Characteristics indicated at CS AGC
slice control characteristics
=ratio of 3 and 2 (dB)
(3)
(2)
(1)
(1)
(2)
(3)
(1)
(2)
(3)
(3)
(2)
(1)
(High luminance detection
level control)
Input conversion value
Note 1-b
Note 1-a
Note 2-a
Note 2-b
14
CXA1390AQ/AR
Standard Design Documentation Temperature Characteristics (V
CC
= 5V)
dB
25
20
15
10
5
0
0
1
2
3
4
5
IRIS gain control characteristics
IRIS GC voltage
20C
25C
75C
V
dB
30
25
20
15
10
5
0
1
2
3
4
5
AGC amplifier gain control characteristics
(AGC Max. = V
CC
)
AGC CONT voltage
20C
V
25C
75C
dB
30
20
10
5
0
1
2
3
4
5
AGC maximum control characteristics
AGC maximum voltage
(AGC CONT = V
CC
)
20C
25C
75C
V
dB
0
5
10
15
20
1
2
3
4
5
IRIS WINDOW control characteristics
(Weighting characteristics)
IRIS LEVEL voltage
75C
V
dB
0
5
10
15
20
1
2
3
4
5
DET WINDOW control
(Weighting characteristics)
DET LEVEL voltage
20C
25C
75C
V
(WND = 0V)
Gain control characteristics
when DET LEVEL = V
CC,
Ta = 25C
is set at 0dB.
25C
(WND = 0V)
Gain control characteristics
when IRIS LEVEL = V
CC,
Ta=25C
is set at 0dB.
20C
15
CXA1390AQ/AR
dB
20
15
10
5
0
CS CCD gain control characteristics
0
1
2
3
4
5
V
CS CCD GC voltage
20C
25C
75C
V
0
0.2
0.4
0.6
0.8
1.0
CS CCD slice control characteristics
0
1
2
3
4
5
CS CCD SL voltage
(High luminance detection
level control)
Input conversion value
20C
25C
75C
V
V
1.6
1.2
0.8
0.4
0
CS AGC slice control characteristics
1
2
3
4
5
CS AGC SL voltage
(High luminance detection
level control after AGC)
Input conversion value
20C
25C
75C
V
dB
20
15
10
5
0
CS AGC gain control characteristics
1
2
3
4
5
CS AGC GC voltage
20C
25C
75C
V
SLICE
GCA
CS CCD SL
CS CCD GC
CS OUT
DATA IN
Note 1-a, 1-b
SLICE
GCA
CS AGC SL
CS AGC GC
CS OUT
COLOR
SEPARATION
Note 2-a, 2-b
AGC
Black level
Detection level
Note 1-b
Voltage indicated at CS CCD
slice control characteristics
Note 1-a
Characteristics indicated at CS
CCD gain control characteristics
=ratio of 3 and 2 (dB)
Black level
Detection level
Note 2-b
Voltage indicated at CS AGC
slice control characteristics
Note 2-a
Characteristics indicated at CS
AGC slice control characteristics
=ratio of 3 and 2 (dB)
(3)
(2)
(1)
(1)
(2)
(3)
(1)
(2)
(3)
(3)
(2)
(1)
Note 2-b
Note 2-a
Note 1-a
Note 1-b
16
CXA1390AQ/AR
CXA1390 Series System Diagram
(The title insertion function can be removed by doing away with CXA1393AN)
PG
-
I
N
DA
T
A
-
I
N
V
CC
1
XSP3
XSP2
XSP1
GN
D
FS
H
I
F3
-
C
L
P
F2
-
C
L
P
F1
-
C
L
P
XSH
2
CLP
4
XSHD
XSHP
AGC
-SEL
AGC
-M
AX
AG
C-CO
NT
OP-O
UT
OPIN
-N
OPIN
-P
AGC
-O
UT
AG
C-CL
P
DET
-
LEVEL
XSH1
DC-O
UT
GY-O
UT
F1-O
UT
F2-O
UT
F3-O
UT
CS-C
LP
CS-CCD-
SL
CS-CCD-
GC
CS-O
UT
CS
-AG
C-G
C
CS-A
GC
-
SL
DE
T
-
OU
T
V
CC
2
IR
IS
-
G
C
I
R
I
S
-
L
EVEL
DE
T
-
CL
P
GN
D
IR
IS
-
C
L
P
IR
IS
-
O
U
T
VG
-
O
U
T
WN
D
PBL
K
CL
P
1
C
X
A
1390A
Q
/
A
R
DL
Y
0
-
OU
T
DL
Y
1
-
O
UT
Y1
-
G
AI
N
DL
Y
1
-
I
N
DL
Y
2
-
I
N
Y2
-
G
AI
N
GN
D
LP
F
-
A
D
J
1
LP
F
-
A
D
J
2
LP
F
-
A
D
J
3
V
CC
YG
AM
-
CO
NT
YH
-
I
N
YO-
CLP
S1-I
N
S2-I
N
DLC1
-IN
C1-G
AIN
DLCO
-O
UT
R-M
IX
MPX2
-C
LP
MPX1
-C
LP
B-M
TX
ID
B-G
AIN
B-CO
NT
R-CO
NT
R-G
AIN
B-C
LP
G-C
LP
R-CL
P
C
LEVEL
YH-
CLP
DLY
H-I
N
DLY
H-C
LP
DLY
H-O
UT
YH-O
UT
1
YH-O
UT
2
TP
DL
YH-G
AIN
CLP
4
CLP
2
VAP-O
UT
VAP-G
AIN
VAP-C
LP
VAP-SL
IC
E
CS-C
LP
CS-I
N
R-Y
GA
IN
B-Y G
AIN
B-Y O
UT
C-
SL
I
C
E
WB
-
D
C
WB
-
B
WB
-
G
WB
-
R
CG
A
M
-
C
O
N
T
GN
D
YL
-
O
U
T
CS
-
O
UT
VC
S-
G
A
I
N
R-
Y
HUE
B-
Y H
U
E
R-
Y
OU
T
C
X
A
1391 Q
/
R
YT
BL
K
N
O
I
SE-
SL
I
C
E
YH
-
C
L
P
YH
-
I
N
Y
L
-
Y
H CL
P
YL
-
Y
H
I
N
AG
N
D
CL
P
4
CL
P
2
B-
L
EVEL
B-
Y I
N
B-
Y
CL
P
SHP-
LEVEL
DLE
SHP-
CL
P1
DLD
SHP-
CL
P2
SHP-
OU
T
Y-L
EVEL
FA
DER-
MO
DE
FA
DER-
SIG
SETU
P
SYNC
-L
EVEL
SYNC
R-Y
IN
R-Y
CLP
DV
CC
4FS
C
LALT
NC
NC
FSC
-O
UT
BFG
BF
CBL
K
CTB
LK
WC
SET
U
P
-
CL
P
V-
O
U
T
V
I
D
E
O-
OU
T
CHRO
M
A
-
O
UT
DG
ND
C-
I
N
AV
CC
C-
O
U
T
CS
-
Y
CS
-
A
G
C
MO
D
E
C
X
A
1392Q
/
R
DR-O
UT
CT-B
LK
DY-O
UT
YT-B
LK
DY-C
LP
DY-I
N
V
CC
YG-I
N
YR-I
N
YB-IN
YT-G
C
CT-G
C
CLP
4
DB-O
UT
DB-I
N
DR-IN
GND
CB-I
N
CG-I
N
CR-IN
HYS-
CONT
TH-C
ON
T
COM
P-I
N
COM
P-
OUT
2
3
4
5
6
7
8
9
10
11
12
1
13
14
15
16
17
18
19
20
21
23
24
22
DET
ECT
OR
LP
F
LP
F
I
HDL
DL
I
HDL
I
HDL
I
HDL
W/
B
CO
NT
RO
L
L
E
R
DL
LP
F
BPF
5V
5V
C
X
A
1393A
N
/
A
M
5V
5V
CCD
Y
Vi
d
C
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
36
35
34
31
32
33
40
39
38
37
41
42
43
44
45
46
47
48
2
3
4
5
6
7
8
9
10
11
12
1
20
21
22
23
24
25
26
27
28
29
30
31
32
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
1
40
39
38
37
36
35
34
33
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
63
64
61
62
26
27
28
29
30
36
35
34
31
32
33
25
40
39
38
37
41
42
43
44
45
46
47
48
2
3
4
5
6
7
8
9
10
11
12
1
13
14
15
16
17
18
19
20
21
22
23
24
TG
SG
CO
NT
RO
L
L
E
R
FO
R
TI
TL
E
R
5V
5V
XSH
1

XSP1
XSP2
CL
P
4
XSH
D
XSH
P
CL
P
2
BF
G
WN
D
BL
K
CR
YR

DL
XSH
2
C
L
P1
I
D
PBL
K
CG
YG
CB
YB
BF
SYN
C
L
AL
T
4
f
S
C
17
CXA1390AQ/AR
Package Outline
Unit: mm
CXA1390AQ
CXA1390AR
SONY CODE
EIAJ CODE
JEDEC CODE
M
PACKAGE STRUCTURE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE WEIGHT
EPOXY RESIN
SOLDER / PALLADIUM
PLATING
COPPER / 42 ALLOY
48PIN QFP (PLASTIC)
15.3 0.4
12.0 0.1
+ 0.4
0.8
0.3 0.1
+ 0.15
0.12
13
24
25
36
37
48
1
12
2.2 0.15
+ 0.35
0.9
0.2
0.1 0.1
+ 0.2
13.5
0.15
0.15 0.05
+ 0.1
QFP-48P-L04
QFP048-P-1212-B
0.7g
SONY CODE
EIAJ CODE
JEDEC CODE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE WEIGHT
EPOXY / PHENOL RESIN
SOLDER PLATING
42 ALLOY
PACKAGE STRUCTURE
48PIN LQFP (PLASTIC)
9.0 0.2
7.0 0.1
1
12
13
24
25
36
37
48
(0.22)
0.18 0.03
+ 0.08
0.5 0.08
(8.0)
0.5
0.2
0.127 0.02
+ 0.05
0.1 0.1
0.5
0.2
A
1.5 0.1
+ 0.2
0 to 10
DETAIL A
0.2g
LQFP-48P-L01
QFP048-P-0707-A
0.1
NOTE: Dimension "
" does not include mold protrusion.