--1--
E96303A8Z
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
Absolute Maximum Ratings (Ta=25 C)
Supply voltage
V
CC
7.0
V
Operating temperature
Topr
20 to +75
C
Storage temperature
Tstg
65 to +150
C
Operating Condition
Supply voltage
V
CC
1.1 to 4.0
V
Description
The CXA3107N is a low current consumption FM
IF amplifier which employs the newest bipolar
process. It is suitable for M-ary FSK pagers.
Features
Low current consumption: 570 A
(typ. at V
CC
=1.4 V)
Low voltage operation: V
CC
=1.1 to 4.0 V
Small package 20-pin SSOP
Needless of IF decoupling capacitor
Reference power supply for operational amplifier
and comparator
Bit rate filter with variable cut-off
Misoperation prevention function for continuous
data
RSSI function
IF input, Vcc standard
Applications
M-ary FSK pagers
Function
Plastic
Structure
Bipolar silicon monolithic IC
IF Amplifier for M-ary FSK Pagers
20 pin SSOP (Plastic)
CXA3107N
For the availability of this product, please contact the sales office.
--2--
CXA3107N
V
C
C
R
E
G
O
U
T
R
E
G
C
O
N
T
C
H
A
R
G
E
R
S
S
I
D
I
S
K
G
N
D
I
F
I
N
R
E
G
U
L
A
T
O
R
L
I
M
F
I
L
T
E
R
Q
U
A
D
D
E
T
Q
U
I
C
K
C
H
A
R
G
E
A
L
A
R
M
L
E
V
E
L
C
O
M
P
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
2
0
1
9
N
R
Z
C
O
M
P
L
V
A
N
R
Z
O
U
T
B
S
F
I
L
S
W
L
E
V
E
L
T
H
C
O
N
T
F
S
K
R
E
F
C
H
G
C
O
N
T
C
1
C
2
C
3
A
U
D
I
O
1
2
3
4
5
6
7
8
9
1
0
Block Diagram
--3--
CXA3107N
Pin Description
Pin
Symbol
Pin voltage
Equivalent circuit
Description
No.
1
2
3
4
5
6
IF IN
GND
TH CONT
FSK REF
DISK
CHG OFF
1.4 V
--
--
0.2 V
1.4 V
--
IF limiter amplifier input.
Ground.
Determines the level
comparator threshold value.
The threshold value can be
adjusted by inserting the
resistor between Pin 3 and
V
CC
.
Normally, short to V
CC
.
Connects the capacitor that
determines the low cut-off
frequency for the entire
system.
Connects the phase shifter of
FM detector circuit.
Sets off the quick charge
circuit current. The charge
current is off by setting Pin 15
low and Pin 6 high.
V
CC
1.5k
GND
1.5k
20k 20k
1
V
CC
GND
3
25k
V
CC
GND
72
4
V
CC
22k
GND
20p
20k
5
20k
GND
72k
6
100k
--4--
CXA3107N
Pin
Symbol
Pin voltage
Equivalent circuit
Description
No.
7
8
9
10
11
16
17
12
13
C1
C2
C3
AUDIO
LEVEL
NRZ OUT
LVA OUT
RSSI
FIL SW
0.2 V
0.2 V
--
--
--
0.1 V
--
Connects the capacitor that
determines the LPF cut-off.
Level comparator and NRZ
comparator inputs.
The operational amplifier
output is connected.
Level comparator, NRZ
comparator and LVA
comparator outputs.
They are open collectors.
(Applied voltage range:
0.5 V to +7.0 V)
RSSI circuit output.
Switches the LPF cut-off.
Cut-off is decreased by setting
this pin high.
(Applied voltage range:
0.5 V to +7.0 V)
V
CC
GND
35k
7
50k
8
9
V
CC
GND
72
72
10
72
GND
11
16
17
V
CC
GND
7k
7k
70k
12
20k
GND
72
13
140k
--5--
CXA3107N
Pin
Symbol
Pin voltage
Equivalent circuit
Description
No.
14
15
18
19
20
B.S.
CHARGE
REG CONT
REG OUT
V
CC
--
--
--
1.0 V
Controls the battery saving.
Setting this pin low suspends
the operation of IC.
(Applied voltage range:
0.5 V to +7.0 V)
Controls the charge speed of
the quick charge circuit.
Set this pin high to execute the
quick charge.
(Applied voltage range:
0.5 V to +7.0 V)
Output for internal constant-
voltage source amplifier.
Connects the base of PNP
transistor.
(Current capacity: 100 A)
Constant-voltage source
output.
Controlled to maintain 1.0 V.
Power supply.
20k
GND
72
14
140k
15
20k
100k
GND
18
V
CC
GND
72
19
V
CC
GND
78k
1k
22k
--6--
CXA3107N
Electrical Characteristics
(V
CC
=1.4 V, Ta=25 C, F
S
=455 kHz, F
MOD
=1.6 kHz, F
DEV
=4.8 kHz, AM
MOD
=30 %)
Item
Current consumption
Current consumption
AM rejection ratio
NRZ output saturation voltage
NRZ output leak current
NRZ hysteresis width
VB output current
VB output saturation current
REG OUT voltage
LVA operating voltage
LVA output leak current
LVA output saturation voltage
Detector output voltage
Logic input voltage high level
Logic input voltage low level
Limiting sensitivity
Detector output level ratio deviation
to level comparator window width
Level comparator output saturation
voltage
Level comparator output leak current
RSSI output offset
IF limiter input resistance
Symbol
I
CC
I
CCS
AMRR
V
SATNRZ
I
LNRZ
V
TWNRZ
I
OUT
V
SATVB
V
REG
V
LVA
I
LLVA
V
SATLVA
V
ODET
V
THBSV
V
TLBSV
V
IN
(
LIM
)
V
LCWR
V
SATLC
I
LLC
V
ORSSI
R
INLIM
Conditions
Measurement circuit 1
V2=1.0 V
Measurement circuit 1
V2=0 V
Measurement circuit 2
30 k LPF
Measurement circuit 4
Vin=0.3 V
Measurement circuit 3
Vin=0.1 V
Measurement circuit 3
Vin=0.1 to 0.3 V
Measurement circuit 5
Measurement circuit 5
Output current
0 A
Measurement circuit 6
V1=1.4 to 1.0 V
Measurement circuit 6
1=1.0 V
Measurement circuit 7
Measurement circuit 2
--
--
Measurement circuit 2,
data filter fc=2.4 kHz
--
Measurement circuit 9
Measurement circuit 8
Measurement circuit 10
--
Min.
Typ.
Max.
Unit
390
570
780
A
--
6
20
A
25
--
--
dB
--
--
0.4
V
--
--
5.0
A
5
10
20
mV
100
--
--
A
--
--
0.4
V
0.92
0.96
1.02
V
1.00
1.05
1.10
V
--
--
5.0
A
--
--
0.4
V
50
63
80
mVrms
0.9
--
--
V
--
--
0.35
V
--
83
--
dBm
15
0
+15
%
--
--
0.4
V
--
--
5.0
A
--
100
250
mV
1.2
1.5
1.8
k
--7--
CXA3107N
Electrical Characteristics Measurement Circuit
1
2
3
4
5
6
7
8
9
1
0
V
2
M
e
a
s
u
r
e
m
e
n
t
c
i
r
c
u
i
t
1
A
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
V
C
C
1
V
V
1
1
.
4
V
M
e
a
s
u
r
e
m
e
n
t
c
i
r
c
u
i
t
4
V
C
C
V
1
1
.
4
V
1
V
V
2
V
i
n
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
1
2
3
4
5
6
7
8
9
1
0
V
5
0
V
2
M
e
a
s
u
r
e
m
e
n
t
c
i
r
c
u
i
t
2
V
C
C
0
V
V
1
1
.
4
V
0
.
0
1
5
0
V
i
n
1
1
2
0
0
p
8
.
2
k
V
1
2
0
0
p
1
2
0
0
p
1
2
3
4
5
6
7
8
9
1
0
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
M
e
a
s
u
r
e
m
e
n
t
c
i
r
c
u
i
t
5
V
C
C
V
1
1
.
4
V
1
V
V
2
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
1
2
3
4
5
6
7
8
9
1
0
V
1
0
0
V
3
0
.
5
V
M
e
a
s
u
r
e
m
e
n
t
c
i
r
c
u
i
t
3
V
C
C
V
1
1
.
4
V
1
V
V
2
V
i
n
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
A
1
2
3
4
5
6
7
8
9
1
0
V
1
0
0
k
M
e
a
s
u
r
e
m
e
n
t
c
i
r
c
u
i
t
6
V
C
C
V
1
1
V
V
2
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
A
1
2
3
4
5
6
7
8
9
1
0
V
1
0
0
k
1
.
4
V
t
o
1
.
0
V
--8--
CXA3107N
M
e
a
s
u
r
e
m
e
n
t
c
i
r
c
u
i
t
7
V
C
C
V
1
1
.
4
V
1
V
V
2
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
1
2
3
4
5
6
7
8
9
1
0
V
5
0
M
e
a
s
u
r
e
m
e
n
t
c
i
r
c
u
i
t
1
0
1
2
3
4
5
6
7
8
9
1
0
V
i
n
0
.
1
V
1
V
V
2
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
V
1
0
0
p
V
1
1
.
4
V
M
e
a
s
u
r
e
m
e
n
t
c
i
r
c
u
i
t
8
V
C
C
V
1
1
.
4
V
1
V
V
2
V
i
n
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
A
1
2
3
4
5
6
7
8
9
1
0
V
1
0
0
k
0
.
2
V
M
e
a
s
u
r
e
m
e
n
t
c
i
r
c
u
i
t
9
V
C
C
V
1
1
.
4
V
1
V
V
2
V
i
n
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
1
2
3
4
5
6
7
8
9
1
0
V
5
0
0
.
1
V
--9--
CXA3107N
Block Diagram and Application Circuit
G
N
D
C3
C1
0.0
1
10
G
N
D
C4
10
2
2
0
10
0k
R5
C5
0.0
1
G
N
D
10
0k
R6
R3
78
k
R2
22
k
G
N
D
R
E
G
C
H
A
R
G
E
S4
S3
S2
C1
2
10
0p
1
1
1
2
1
3
1
5
1
7
1
9
2
0
1
6
1
4
1
8
G
N
D
10
0k
R8
C
O
M
P
O
U
T
R
S
S
I
B
S
F
I
L
S
W
C
H
A
R
G
E
L
E
V
E
L
C
O
M
P
C1
0
12
00
p
G
N
D
C1
1
12
00
p
G
N
D
C9
12
00
p
S1
8.2
k
R7
DIS
K
I
F
L
I
M
F
I
L
T
E
R
G
N
D
C6
1
G
N
D
2
3
4
8
9
1
0
7
1
6
5
0
.
0
1
C
2
50
R1
P1
9
P1
7
P1
6
P1
2
P1
1
RE
G
LV
A
NR
Z
RS
SI
LE
VE
L
P
2
0
1
V
C
C
P
2
0
2
G
N
D
G
N
D
B
1
R
F
P1
0
G
N
D
C8
C7
0.0
1
10
AU
DIO
P2
03
GN
D
C
H
G
O
F
F
A
U
D
I
O
Q
U
A
D
D
E
T
R
4
V
B
R
E
G
N
R
Z
C
O
M
P
L
V
A
P
N
P
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility fo
r
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same
.
--10--
CXA3107N
Application Note
1) Power Supply
The CXA3107N, with built-in regulator, is designed to permit stable operation at wide range of supply
voltage from 1.1 to 4.0 V. Decouple the wiring to V
CC
(Pin 20) as close to the pin as possible.
2) IF Limiter Amplifier
The gain of this IF limiter amplifier is approximately 100 dB. Take notice of the following points in making
connection to the IF limiter amplifier input pin (Pin 1).
a) Wiring to the IF limiter amplifier input (Pin 1) should be as short as possible.
b) As the IF limiter amplifier output appears at QUAD (Pin 5), wiring to the ceramic discriminator connected
to QUAD should be as short as possible to reduce the interface with the mixer output and IF limiter
amplifier input.
Fig. 1
3) Quick Charge
In order to hasten the rising time from when power is turned on, the CXA3107N features a quick charge
circuit. Therefore, the quick charge circuit eliminates the need to insert a capacitor between the detector
output and the LPF as is the case with conventional ICs. But a capacitor should be connected to Pin 4 to
determine the average signal level during steady-state reception. The capacitance value connected to Pin
4 should be chosen such that the voltage does not vary much due to discharge during battery saving.
Connect a signal for controlling the quick charge circuit to Pin 15. Setting this pin high enables the quick
charge mode, and setting this pin low enables the steady-state reception mode. Quick charge is used
when the power supply is turned on. The battery saving must be set high at the time.
Connect Pin 15 to GND when quick charge is not being used.
Fig. 2
4
5
6
3
1
2
As short as possible
H
L
H
L
active
battery
saving
Timing
Power supply
(Pin 20)
Quick charge
(Pin 15)
Battery save
(Pin 14)
--11--
CXA3107N
4) Detector
The detector is of quadrature type. To perform phase shift, connect a ceramic discriminator to Pin 5.
The phase shifting capacitor for the quadrature detector is incorporated. The FM (FSK) signal demodulated
with the detector will be output to AUDIO (Pin 10) through the internal LPF.
The AUDIO output is the anti-phase output to NRZ OUT.
The CDBM455C50 (MURATA MFG. CO., LTD) ceramic discriminator is recommended for the CXA3107N.
For the 2-level system, the CDBM455C28 can also used.
Fig. 3
5) Filter Buffer, Level Comparator and NRZ Comparator
The LPF circuit is built in this IC.
The LPF output is connected internally to the NRZ comparator, level comparator and quick charge circuit.
Fig. 4
Using the LPF, remove noise from the demodulated signal and input the signal to the above three circuits.
The level comparator and the NRZ comparator shape waveform of this input signal and output it as a
square wave. The comparator output stage is for open collector.
Thus, if the CPU is of CMOS type and the supply voltage is different, a direct interface as illustrated in the
figure below can be implemented.
Fig. 5
6) REG CONT
Controls the base bias of the external transistors.
8.2k
V
CC
4
5
6
Ceramic discriminator
CDBM455C50
L.C.
10
16
0.2V
4
11
LPF
DET
V
CC
(11)
V
CC
1.4V
CMOS IC
16
20
CMOS power supply
Comparator output
--12--
CXA3107N
7) LVA OUT
The pin goes high (open) when the supply voltage becomes low. Since the output is an open collector, it
can be used to directly drive CMOS device. The setting voltage of the LVA is 1.05 V (typ.), and it
possesses a hysteresis with respect to the supply voltage. The hysteresis width is 50 mV (typ.).
8) B.S.
Operation of the CXA3107N can be halted by setting this pin low. This pin can be connected directly to
CMOS device. The current consumption for battery saving is 20 A or less (at 1.4 V).
Fig. 6
9) M-ary (M = 2- or 4-level) FSK Demodulation System
Polarity discrimination output and MSB comparator output are used to demodulate the 4-level waveform
shown below.
[4-level FSK demodulating waveform]
[NRZ OUT] Polarity discrimination output
(When the input frequency is higher than the local frequency)
[L.C. OUT] MSB comparator output
B.S.
14
01
00
10
11
01
10
00
+4.8kHz
+1.6kHz
1.6kHz
4.8kHz
0
0
1
1
0
1
0
POS
NEG
1
0
0
1
1
0
0
1.6kHz
4.8kHz
(The polarity can be inverted by setting the local
frequency higer than the input frequency.)
--13--
CXA3107N
The 4-level FSK demodulating data is divided into NRZ OUT and L.C. OUT shown above. Here, NRZ OUT
corresponds to a conventional NRZ comparator output. L.C. OUT is made comparing the demodulated
waveform amplitude to the IC internal reference voltage levels. When the threshold value of L.C. OUT is not
appropriate to the detector output, the resistance value on Pin 5 should be varied for the detector output level
adjustment or the resistor should be inserted between Pin 3 and V
CC
for the level comparator threshold value
adjustment.
For the 2-level FSK demodulation, it corresponds to a conventional NRZ comparator output.
10) Principle of Quick Charge Operation
BUF in Fig. 7 is the detector buffer amplifier and AMP is the operational amplifier used to construct the
LPF. COMP is the level comparator or the NRZ comparator. The CXA3107N has a feedback loop from
the comparator input to the input circuit of the detector output buffer. This equalizes the average value of
the comparator input voltage to the reference voltage, with the quick charge circuit of CHG being set in the
feedback loop. Switching the current of the quick charge circuit enables reduction of the rise time.
In this block, CHG is a comparator which compares input voltages and outputs a current based on this
comparison. The current on CHG is switched between high and low at Pin 15. When the power is turned
on, switch the current to high to increase the charge current at C in Fig. 7 and shorten the time constant.
During steady-state reception mode, switch the current to low, lengthening the charge time constant and
allowing for stable data retrieval. Also, controlling Pin 6 can make the current off. This is effective when
the same data are received continuously.
Fig. 7
11) S Curve Characteristics
Even if the IF IN input signal frequency is deviated, the feedback is applied to the DETOUT operating point
so as to match it to the comparator reference voltage by the quick charge operation shown in Fig. 7.
Therefore, this feedback must be halted in order to evaluate the S curve characteristics.
To execute the evaluation, measure the average voltage on Pin 10 first and input this voltage to Pin 4 from
the external power supply.
3
R
V
CC
CHG
BUF
COMP
Reference voltage
4
16
10
LPF
C
--14--
CXA3107N
12) Control Pins
The function controls are as shown below.
Note) Pin 6 control should be performed with Pin 15 low.
When each function is not controlled externally, set it to the state with asterisk (
).
13) LPF Constant
The data filter cut-off (fc) is expressed with the following equation.
fc
1
2
CR
C: External capacitance
R: IC internal resistance
R is approximately 55 k
20 % when Pin 13 is low. The table below shows the example of constant to
data rate.
14) Misoperation Prevention Function for Continuous Data
The offset to the comparator threshold value of the detector output is canceled with the feedback loop
indicated in the paragraph 10). This operation assumes that "0" and "1" are in equal numbers in the data.
The offset is occurred when the "0" or "1" data are received continuously. In this case, setting Pin 6 high to
make the charge current off prevents the offset occurrence.
Without using this function, the stability for the same data continuously received depends on the
capacitance value on Pin 4 shown in the paragraph 10). When this capacitance value is increased, the
data is demodulated more stably; however, it takes more time for the IC to rise. If this function is not used,
be sure to connect Pin 6 to GND.
Fig. 8
Pin 13 filter switch
H
L
H
L
H
L
H
L
Capacitance (pF)
6800
1500
1200
1200
fc (Hz)
--
430
950
1900
1200
2400
1200
2400
Data rate
--
512 bps (2 levels)
1200 bps (2 levels)
2400 bps (2 levels)
1600 bps (2 levels)
3200 bps (2 levels)
3200 bps (2 levels)
6400 bps (2 levels)
H
L
Sync part
Data
Sync part
Data
Reception signal
CHG OFF
(Pin 6)
PIN No.
Symbol
Function
Input high
Input low
13
FIL SW
Data filter cut-off
control
fc: Low
fc: High
6
CHG OFF
Pin 4 charge
current control
Slow charge off
Slow charge operation
14
BS
Battery saving
mode control
IC operation
Sleep
15
CHARGE
Pin 4 charge
speed control
Quick charge
Slow charge
--15--
CXA3107N
60
A
u
d
i
o
r
e
s
p
o
n
s
e
(
d
B
)
0
10
100
Audio respnse and RSSI output voltage characteristics
90
80
C
o
m
p
a
r
a
t
o
r
o
u
t
p
u
t
v
o
l
t
a
g
e
(
V
)
50
40
30
20
70
60
50
40
30
20
10
200
1000
400
600
800
0
R
S
S
I
o
u
t
p
u
t
v
o
l
t
a
g
e
(
m
V
)
S+N+D
RSSI
S/N
10
20
30
40
50
60
70
80
(dBm)
(dB)
0.2
0
0.6
1.0
1.4
150
200
250
300
Level comparator characteristics
0.4
0.8
1.2
160
162
263
264
48mV
52mV
1.0
2.0
3.0
4.0
C
u
r
r
e
n
t
c
o
n
s
u
m
p
t
i
o
n
(
A
)
Supply voltage vs. Current consumption
400
500
600
700
800
900
1000
70
0dBm=66.5mVrms
IF 455kHz
Dev. 4.8kHz
AUDIO 1.6kHz
V
CC
=1.4V
25C
Supply voltage (V)
Input level (dB)
Comparator input voltage (mV)
5.93A (V
CC
=1.4V) in BS mode
Example of Representative Characteristics
--16--
CXA3107N
D
e
t
e
c
t
o
r
o
u
t
p
u
t
l
e
v
e
l
(
m
v
r
m
s
)
70
60
50
20
25
50
0
Detector output level temperature characteristics
0.2
C
o
m
p
a
r
a
t
o
r
o
u
t
p
u
t
v
o
l
t
a
g
e
(
V
)
0
0.6
1.0
1.4
160
180
200
220
240
NRZ comparator characteristics
260
280
75
0.4
0.8
1.2
48mV
200
500
1k
5k
10k
60
50
40
30
20
10
0
f
CL
=1.2kHz
f
CH
=2.4kHz
R
e
s
p
o
n
s
e
(
d
B
)
Variable cut-off characteristics of audio filter
207
214
Comparator input voltage (mV)
Input frequency (Hz)
Pin 13 voltage
: L
: H
25C
Temperature (C)
--17--
CXA3107N
100
T
h
r
e
s
h
o
l
d
l
e
v
e
l
2
1
4
(
m
V
)
50
0
50
100
20
0
25
50
75
Threshold level characteristics
: L
H
: H
L
Temperature (C)
20PIN SSOP (PLASTIC)
SONY CODE
EIAJ CODE
JEDEC CODE
PACKAGE STRUCTURE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE MASS
EPOXY RESIN
SOLDER / PALLADIUM
42/COPPER ALLOY
0.1g
SSOP-20P-L01
SSOP020-P-0044
PLATING
0.1 0.1
0
.
5
0
.
2
0 to 10
DETAIL A
NOTE: Dimension "
" does not include mold protrusion.
b=0.22 0.05
+ 0.1
0
.
1
5
0
.
0
2
+
0
.
0
5
(0.22)
(
0
.
1
5
)
0
.
1
5
0
.
0
1
DETAIL B : SOLDER
DETAIL B : PALLADIUM
+
0
.
0
3
b=0.22 0.03
6.5 0.1
4
.
4
0
.
1
0.65
20
11
10
1
A
0.1
1.25 0.1
+ 0.2
6
.
4
0
.
2
0.13 M
b
Package Outline Unit : mm
CXA3107N
--18--
NOTE : PALLADIUM PLATING
This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame).
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